JPH05152137A - Chip-shaped impedance element and its manufacture - Google Patents

Chip-shaped impedance element and its manufacture

Info

Publication number
JPH05152137A
JPH05152137A JP31573991A JP31573991A JPH05152137A JP H05152137 A JPH05152137 A JP H05152137A JP 31573991 A JP31573991 A JP 31573991A JP 31573991 A JP31573991 A JP 31573991A JP H05152137 A JPH05152137 A JP H05152137A
Authority
JP
Japan
Prior art keywords
chip
impedance element
sintered body
copper
alloy wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31573991A
Other languages
Japanese (ja)
Inventor
Hironobu Chiba
博伸 千葉
Osamu Makino
治 牧野
Akihiko Ibata
昭彦 井端
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP31573991A priority Critical patent/JPH05152137A/en
Publication of JPH05152137A publication Critical patent/JPH05152137A/en
Pending legal-status Critical Current

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  • Manufacturing Cores, Coils, And Magnets (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

PURPOSE:To realize a titled element wherein its impedance is high, its irregularity is small in terms of characteristics and its mass productivity is excellent as a component which is used as measures against noise and which restrains the propagation of high-frequency noise generated from various kinds of electronic apparatuses on which a microcomputer is mounted. CONSTITUTION:A chip-shaped impedance element whose impedance is high and whose irregularity is small can be obtained by providing the following: a ferrite sintered body 11 which is square pillar-shaped or square plate-shaped; an alloy wire 13 which is passed through the central part of the ferrite sintered body 11 and which is composed mainly of silver or copper; and one pair of edge electrodes 12 which have been connected to the allay wire 13 at both end parts of the ferrite sintered body 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はノイズ対策部品として使
用することを目的としたチップ型インピーダンス素子及
びその製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip-type impedance element intended for use as a noise countermeasure component and a method for manufacturing the same.

【0002】[0002]

【従来の技術】近年、フェライト焼結体の貫通孔に内部
導体を設けたチップ型インピーダンス素子やフェライト
グリーンシートと内部導体を積層し焼結体としたチップ
型インピーダンス素子がノイズ対策部品として小形・薄
型化されたデジタル機器に数多く使用されている。特
に、これらチップ型インピーダンス素子の複数個を一体
化して小型高密度実装を可能としたチップ型複合インピ
ーダンス素子が広く用いられつつある。
2. Description of the Related Art In recent years, a chip type impedance element having an internal conductor provided in a through hole of a ferrite sintered body or a chip type impedance element formed by stacking a ferrite green sheet and an internal conductor as a sintered body has been miniaturized as a noise countermeasure component. Widely used in thin digital devices. In particular, a chip-type composite impedance element that is capable of compact and high-density mounting by integrating a plurality of these chip-type impedance elements is being widely used.

【0003】以下、従来の積層型のチップ型インピーダ
ンス素子について説明する。図10は従来の積層型のチ
ップ型インピーダンス素子の構造図を示すものである。
図10において1は磁性フェライト、2は取り出し用の
端面電極、3は内部導体である。以上のように構成され
た従来の積層型のチップ型インピーダンス素子は電気絶
縁性の複数の磁性フェライトシート上に内部導体3を印
刷しラミネート等によって積層し、焼成一体化し焼結体
端面に導電ペーストを塗布・焼き付けて端面電極2を形
成し製造している。
A conventional laminated chip type impedance element will be described below. FIG. 10 is a structural diagram of a conventional laminated chip type impedance element.
In FIG. 10, 1 is a magnetic ferrite, 2 is an end face electrode for extraction, and 3 is an internal conductor. In the conventional laminated chip-type impedance element configured as described above, the internal conductors 3 are printed on a plurality of electrically insulating magnetic ferrite sheets, laminated by lamination or the like, fired and integrated, and conductive paste is applied to the end faces of the sintered body. Is applied and baked to form the end face electrode 2 for manufacturing.

【0004】また、従来の積層型のチップ型複合インピ
ーダンス素子について説明する。図11は従来の積層型
のチップ型複合インピーダンス素子の外観斜視図を示す
ものである。図12はこの従来の積層型のチップ型複合
インピーダンス素子の分解斜視図である。図において4
は磁性フェライト、5は取り出し用の端面電極、6は内
部導体、7,8は印刷によって内部導体を並列に形成し
た磁性フェライトシート、9は表裏被覆用磁性フェライ
トシートである。以上のように構成された従来の積層型
のチップ型複合インピーダンス素子は7,8,9を2枚
ずつ交互に重ね合わせ、隣合う内部導体がちどりに配置
されるようラミネート等によって積層し、焼成一体化し
焼結体端面に導電ペーストを塗布・焼き付けて端面電極
5を形成し製造している。
A conventional laminated chip-type composite impedance element will be described. FIG. 11 is a perspective view showing the appearance of a conventional laminated chip-type composite impedance element. FIG. 12 is an exploded perspective view of the conventional laminated chip-type composite impedance element. 4 in the figure
Is a magnetic ferrite, 5 is an end surface electrode for extraction, 6 is an internal conductor, 7 and 8 are magnetic ferrite sheets in which the internal conductors are formed in parallel by printing, and 9 is a magnetic ferrite sheet for covering the front and back surfaces. In the conventional laminated chip-type composite impedance element configured as described above, two sheets of 7, 8 and 9 are alternately stacked, laminated by lamination or the like so that adjacent inner conductors are arranged in a small line, and fired. The integrated body is manufactured by applying and baking a conductive paste on the end surface of the sintered body to form the end surface electrode 5.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来の構成では製品形状に起因する特性面、量産性の面で
問題点を有している。第1に、同一形状で大きなインピ
ーダンスを得るには内部導体3,6の厚みと幅の比が等
しいことが望まれるが、印刷による内部導体は厚くでき
ない。このため、磁界形成時の有効面積が大きく取れな
い。第2に、磁性フェライトシート上に内部導体3,6
を印刷し、その上に磁性フェライトをラミネートしてし
まうと内部導体3,6の位置を正確に把握することがで
きず焼成前の切断時に、内部導体3,6が中央にないと
いう位置ずれを発生してしまう。このことから、チップ
型インピーダンス素子の高インピーダンス化を難しくし
ているばかりでなく、製品の特性ばらつきの原因となる
という問題点を有している。
However, the above-mentioned conventional structure has problems in terms of characteristics and mass productivity due to the product shape. First, in order to obtain a large impedance with the same shape, it is desired that the thickness ratio of the inner conductors 3 and 6 is equal to the width, but the inner conductor formed by printing cannot be made thick. Therefore, a large effective area cannot be obtained when the magnetic field is formed. Secondly, the inner conductors 3, 6 are placed on the magnetic ferrite sheet.
However, if magnetic ferrite is laminated on it, the positions of the inner conductors 3 and 6 cannot be accurately grasped, and the position of the inner conductors 3 and 6 is not in the center when cutting before firing. Will occur. For this reason, not only is it difficult to increase the impedance of the chip-type impedance element, but there is also a problem that it causes variations in the characteristics of products.

【0006】本発明は上記従来の問題点を解決するもの
で従来の積層型のチップ型インピーダンス素子では実現
できなかった高い位置精度での量産性を可能にしたチッ
プ型インピーダンス素子及び製造方法を提供することを
目的とする。
The present invention solves the above-mentioned conventional problems, and provides a chip-type impedance element and a manufacturing method which enable mass productivity with high positional accuracy, which cannot be realized by the conventional laminated-type chip-type impedance element. The purpose is to do.

【0007】[0007]

【課題を解決するための手段】この目的を達成するため
に本発明は、角柱状または角板状のフェライト焼結体
と、前記フェライト焼結体の中央部を貫通する銀または
銅を主成分とする合金線と、前記フェライト焼結体の両
端部に前記合金線と電気的に接続された一対の端面電極
を備えた構成を有するものである。
In order to achieve this object, the present invention is based on a prism-shaped or rectangular plate-shaped ferrite sintered body and silver or copper as a main component which penetrates through the central portion of the ferrite sintered body. And a pair of end face electrodes electrically connected to the alloy wire at both ends of the ferrite sintered body.

【0008】また、本発明は角柱状または角板状のフェ
ライト焼結体と、前記フェライト焼結体を並列に貫通す
る銀または銅を主成分とする複数の合金線と、前記フェ
ライト焼結体の両端部に前記合金線と電気的に接続され
た複数の端面電極対を備えた構成を有するものである。
Further, according to the present invention, a prismatic or rectangular plate-shaped ferrite sintered body, a plurality of alloy wires containing silver or copper as a main component and penetrating the ferrite sintered body in parallel, and the ferrite sintered body. 2 has a structure in which a plurality of end face electrode pairs electrically connected to the alloy wire are provided at both ends.

【0009】[0009]

【作用】本発明によれば内部導体に銀または銅を主成分
とする合金線を複数列平行に並べることによって、効率
的な磁界形成による高インピーダンス化がはかれ、従来
の積層型のチップ型インピーダンス素子に比べ、高イン
ピーダンスで特性的にばらつきの少ない優れた量産性を
有するチップ型インピーダンス素子を提供できる。
According to the present invention, by arranging a plurality of rows of alloy wires containing silver or copper as a main component in parallel on the inner conductor, high impedance can be achieved by efficient magnetic field formation, and the conventional laminated chip type It is possible to provide a chip-type impedance element that has high impedance and excellent mass productivity with less variation than the impedance element.

【0010】[0010]

【実施例】【Example】

(実施例1)以下、本発明の一実施例のチップ型インピ
ーダンス素子を図面を参照しながら説明する。
(Embodiment 1) A chip type impedance element according to an embodiment of the present invention will be described below with reference to the drawings.

【0011】図1は本発明の第1の実施例におけるチッ
プ型インピーダンス素子の内部構造を示す斜視図であ
る。図において11はフェライト焼結体、12は銀を主
成分とする厚膜端面電極、13は銀または銅を主成分と
する合金線をそれぞれ示す。
FIG. 1 is a perspective view showing the internal structure of a chip-type impedance element according to the first embodiment of the present invention. In the figure, 11 is a ferrite sintered body, 12 is a thick film end face electrode containing silver as a main component, and 13 is an alloy wire containing silver or copper as a main component.

【0012】図1に示すようなチップ型インピーダンス
素子を得る場合には図2(a)に示すようにNi−Zn
−Cu系からなるフェライトグリーンシート10の上に
一定間隔をおいて銀または銅を主成分とする合金線13
を平行に並べる。但し、この時銀または銅を主成分とす
る合金線13は磁界形成を最大限に引き出すために直径
100μm以下の合金線を使用する。この作業を数回繰
り返し最後に最上部のNi−Zn−Cu系からなるフェ
ライトグリーンシートを載せ熱圧着等により成型体とし
た後、はみ出した合金線を切断する。次に、図2(b)
に示すようにこの成型体を規格寸法に切断して得られた
板状成型体14を、更に内部導体の長さ方向の規格寸法
に切り揃え1次分割成型体15を得(図3(a))、こ
れを図3(b)に示すように製品の厚みとなる一定間隔
に切り揃え2次分割成型体16を得る。これを更に図4
(a)に示すように一つ一つの形状が焼成後の収縮率を
考慮に入れた寸法に切り揃えて3次分割成型体17を得
た後、それらを800〜1100℃の温度で焼成する。
この焼成後の図4(b)に示すようにフェライト焼結体
の端面に銀または銅を主成分とする厚膜電極ペーストを
塗布しこれをフェライトの焼成温度以下で焼成して端面
電極12を形成しチップ型インピーダンス素子を得る。
When a chip type impedance element as shown in FIG. 1 is obtained, as shown in FIG.
An alloy wire 13 containing silver or copper as a main component at regular intervals on a ferrite green sheet 10 made of a Cu system
Are arranged in parallel. However, at this time, as the alloy wire 13 containing silver or copper as a main component, an alloy wire having a diameter of 100 μm or less is used in order to maximize the magnetic field formation. This operation is repeated several times, and finally, the uppermost ferrite green sheet made of Ni-Zn-Cu system is placed to form a molded body by thermocompression bonding, and the protruding alloy wire is cut. Next, FIG. 2 (b)
As shown in Fig. 3, the plate-shaped molded body 14 obtained by cutting this molded body to the standard size is further cut to the standard dimension in the length direction of the internal conductor to obtain the primary divided molded body 15 (Fig. 3 (a )), As shown in FIG. 3 (b), the secondary divided molded body 16 is obtained by cutting and aligning it at a constant interval that is the thickness of the product. This is further illustrated in FIG.
As shown in (a), each shape is trimmed to a dimension that takes into account the shrinkage rate after firing to obtain a third divisional molded body 17, and then they are fired at a temperature of 800 to 1100 ° C. ..
As shown in FIG. 4 (b) after this firing, a thick film electrode paste containing silver or copper as a main component is applied to the end faces of the ferrite sintered body, and this is fired at a firing temperature of ferrite or lower to form the end face electrodes 12. Formed to obtain a chip-type impedance element.

【0013】このようにして得られたチップ型インピー
ダンス素子の100MHzにおけるインピーダンス値
(Z)と導体抵抗値(R)の関係を従来のチップ型イン
ピーダンス素子の値とともに(表1)に示す。
The relationship between the impedance value (Z) at 100 MHz and the conductor resistance value (R) of the thus obtained chip type impedance element is shown in Table 1 together with the values of the conventional chip type impedance element.

【0014】[0014]

【表1】 [Table 1]

【0015】この表から、本実施例のチップ型インピー
ダンス素子は従来のチップ型インピーダンス素子と比べ
て導体抵抗が低くかつ、高いインピーダンスを得ること
ができるということがわかる。
From this table, it can be seen that the chip-type impedance element of this embodiment has a lower conductor resistance and a higher impedance than the conventional chip-type impedance element.

【0016】(実施例2)次に本発明の第2の実施例に
ついて説明する。実施例1と同様の手順で板状成型体1
4を規格寸法に揃えて、図2(a)の状態にした後、図
5(a)に示すように銀を主成分とする厚膜電極ペース
トを塗布して1次分割成型体18とし、さらに図5
(b)に示すよう1個のチップとなるように縦横にさら
に分割して図5(b)に示すように3次分割成型体19
とし、800〜1100℃の温度範囲で焼成して端面電
極12を形成した。実施例1と同様に評価し、その結果
を(表1)に示す。
(Second Embodiment) Next, a second embodiment of the present invention will be described. The plate-shaped molded body 1 was manufactured in the same procedure as in Example 1.
4 to the standard size, and in the state of FIG. 2 (a), as shown in FIG. 5 (a), a thick film electrode paste containing silver as a main component is applied to form a primary divided molded body 18, Furthermore, FIG.
As shown in FIG. 5B, it is further divided vertically and horizontally into one chip, and as shown in FIG.
And was fired in the temperature range of 800 to 1100 ° C. to form the end face electrode 12. Evaluation was performed in the same manner as in Example 1, and the results are shown in (Table 1).

【0017】焼成温度が800℃より低いときには、フ
ェライト焼結体がポーラスとなり充分なインピーダンス
が得られない。また、1100℃を越える温度で焼成し
た場合にフェライト焼結体が過焼結となり、合金線の焼
結マッチングが得られないばかりか、素子同志の反応が
起こり好ましくない。
When the firing temperature is lower than 800 ° C., the ferrite sintered body becomes porous and sufficient impedance cannot be obtained. Further, when the ferrite sintered body is over-sintered when fired at a temperature exceeding 1100 ° C., not only sintering matching of alloy wires cannot be obtained, but also reactions between elements occur, which is not preferable.

【0018】なお、本発明の実施例において用いた以外
の系のフェライト組成でもよい。 (実施例3)次に本発明の第3の実施例について説明す
る。
The ferrite composition of the system other than that used in the embodiments of the present invention may be used. (Embodiment 3) Next, a third embodiment of the present invention will be described.

【0019】図6は本実施例におけるチップ型複合イン
ピーダンス素子の内部構造を示す斜視図である。この図
中の11はフェライト焼結体、12a〜12dは銀を主
成分とする厚膜端面電極、13は銀または銅を主成分と
する合金線をそれぞれ示す。
FIG. 6 is a perspective view showing the internal structure of the chip-type composite impedance element in this embodiment. In this figure, 11 is a ferrite sintered body, 12a to 12d are thick film end face electrodes containing silver as a main component, and 13 is an alloy wire containing silver or copper as a main component.

【0020】図6に示すようなチップ型複合インピーダ
ンス素子を得る場合には、第1の実施例とほぼ同様の工
程で図7(a),(b)、図8(a),(b)に示す工
程を経た後に、図9に示すようにフェライト焼結体の端
面に銀または銅を主成分とする厚膜電極ペーストを塗布
し、それらを800〜1100℃の温度で焼成する。こ
のようにして得られたチップ型複合インピーダンス素子
は合金線をちどり配置にすることで隣接する線間のクロ
ストークを少なくすることが可能である。
When a chip-type composite impedance element as shown in FIG. 6 is obtained, the steps shown in FIGS. 7A, 7B, 8A and 8B are carried out in substantially the same steps as in the first embodiment. After the step shown in FIG. 9, a thick film electrode paste containing silver or copper as a main component is applied to the end surface of the ferrite sintered body as shown in FIG. 9, and they are fired at a temperature of 800 to 1100 ° C. The chip-type composite impedance element thus obtained can reduce crosstalk between adjacent wires by arranging the alloy wires in a fine arrangement.

【0021】このようにして得られたチップ型複合イン
ピーダンス素子の1素子の100MHzにおけるインピー
ダンス値(Z)と導体抵抗値(R)の関係を従来のチッ
プ型複合インピーダンス素子の値とともに(表2)に示
す。
The relationship between the impedance value (Z) at 100 MHz and the conductor resistance value (R) of one element of the thus obtained chip-type composite impedance element is shown together with the value of the conventional chip-type composite impedance element (Table 2). Shown in.

【0022】[0022]

【表2】 [Table 2]

【0023】[0023]

【発明の効果】以上のように本発明によれば磁性体から
なるグリーンシートを積層し、内部導体を銀または銅を
主成分とする合金線を使用することによりスクリーン印
刷による内部導体の幅以下にでき従来の積層体よりも高
インピーダンスを実現することができる。
As described above, according to the present invention, the green sheets made of a magnetic material are laminated, and the inner conductor is made of an alloy wire containing silver or copper as a main component. It is possible to realize higher impedance than the conventional laminated body.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例におけるチップ型インピ
ーダンス素子の内部構造を示す斜視図
FIG. 1 is a perspective view showing an internal structure of a chip-type impedance element according to a first embodiment of the present invention.

【図2】(a),(b)はそれぞれ同チップ型インピー
ダンス素子の製造工程における外観斜視図
2A and 2B are perspective views showing the appearance of the same chip type impedance element in a manufacturing process, respectively.

【図3】(a),(b)はそれぞれ同チップ型インピー
ダンス素子の製造工程における外観斜視図
3A and 3B are perspective views showing the appearance of the same chip type impedance element in a manufacturing process, respectively.

【図4】(a),(b)はそれぞれ同チップ型インピー
ダンス素子の製造工程における外観斜視図
4A and 4B are perspective views showing the appearance of the same chip type impedance element in a manufacturing process.

【図5】(a),(b)はそれぞれ本発明の第2の実施
例におけるチップ型インピーダンス素子の製造工程にお
ける外観斜視図
5 (a) and 5 (b) are perspective views showing the appearance of a chip-type impedance element in a manufacturing process according to a second embodiment of the present invention.

【図6】本発明の第3の実施例におけるチップ型複合イ
ンピーダンス素子の内部構造を示す斜視図
FIG. 6 is a perspective view showing the internal structure of a chip-type composite impedance element according to the third embodiment of the present invention.

【図7】(a),(b)はそれぞれ同チップ型複合イン
ピーダンス素子の製造工程における外観斜視図
7A and 7B are perspective views showing the appearance of the same chip-type composite impedance element in a manufacturing process, respectively.

【図8】(a),(b)はそれぞれ同チップ型複合イン
ピーダンス素子の製造工程における外観斜視図
8A and 8B are perspective views showing the appearance of the same chip-type composite impedance element in a manufacturing process.

【図9】同チップ型複合インピーダンス素子の製造工程
における外観斜視図
FIG. 9 is an external perspective view in the manufacturing process of the same chip-type composite impedance element.

【図10】従来のチップ型インピーダンス素子の内部構
造を示す斜視図
FIG. 10 is a perspective view showing an internal structure of a conventional chip-type impedance element.

【図11】従来のチップ型複合インピーダンス素子の外
観斜視図
FIG. 11 is an external perspective view of a conventional chip-type composite impedance element.

【図12】同従来のチップ型複合インピーダンス素子の
内部構造を示す分解斜視図
FIG. 12 is an exploded perspective view showing an internal structure of the conventional chip-type composite impedance element.

【符号の説明】[Explanation of symbols]

11 フェライト焼結体 12 厚膜端面電極 13 合金線 14 板状成型体 15,18 1次分割成型体 16 2次分割成型体 17,19 3次分割成型体 11 Ferrite Sintered Body 12 Thick Film End Surface Electrode 13 Alloy Wire 14 Plate-Shaped Molded Body 15, 18 Primary Split Molded Body 16 Secondary Split Molded Body 17, 19 Third Split Molded Body

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】角柱状または角板状のフェライト焼結体
と、前記フェライト焼結体の中央部を貫通する銀または
銅を主成分とする合金線と、前記フェライト焼結体の両
端部に前記合金線と電気的に接続された一対の端面電極
を備えたことを特徴とするチップ型インピーダンス素
子。
1. A prism-shaped or plate-shaped ferrite sintered body, an alloy wire containing silver or copper as a main component, which penetrates a central portion of the ferrite sintered body, and both ends of the ferrite sintered body. A chip type impedance element comprising a pair of end face electrodes electrically connected to the alloy wire.
【請求項2】角柱状または角板状のフェライト焼結体
と、前記フェライト焼結体を並列に貫通する銀または銅
を主成分とする複数の合金線と、前記フェライト焼結体
の両端部に前記合金線と電気的に接続された複数の端面
電極対を備えたことを特徴とするチップ型インピーダン
ス素子。
2. A prismatic or rectangular plate-shaped ferrite sintered body, a plurality of alloy wires mainly containing silver or copper, which penetrate the ferrite sintered body in parallel, and both end portions of the ferrite sintered body. A chip type impedance element comprising a plurality of end face electrode pairs electrically connected to the alloy wire.
【請求項3】端面電極が銀または銅を主成分とする厚膜
導体からなることを特徴とする請求項1または2記載の
チップ型インピーダンス素子。
3. The chip-type impedance element according to claim 1, wherein the end face electrode is made of a thick film conductor containing silver or copper as a main component.
【請求項4】銀または銅を主成分とする合金線を同一厚
みのフェライトグリーンシートで挟んで積層し、800
〜1100℃の温度で焼成して焼結体を得て、前記焼結
体の両端部に前記合金線と電気的に接続する端面電極対
を形成することを特徴とする請求項1記載のチップ型イ
ンピーダンス素子の製造方法。
4. An alloy wire containing silver or copper as a main component is sandwiched between ferrite green sheets having the same thickness, and laminated.
The chip according to claim 1, wherein a sintered body is obtained by firing at a temperature of ˜1100 ° C., and end face electrode pairs electrically connected to the alloy wire are formed at both ends of the sintered body. Type impedance element manufacturing method.
【請求項5】銀または銅を主成分とする合金線を同一厚
みのフェライトグリーンシートで挟んで積層して積層体
を得て前記積層体の両端部に前記合金線と電気的に接続
するよう銀または銅を主成分とする厚膜端面電極対を形
成し、800〜1100℃の温度範囲で焼成することを
特徴とする請求項1記載のチップ型インピーダンス素子
の製造方法。
5. An alloy wire containing silver or copper as a main component is sandwiched between ferrite green sheets having the same thickness to obtain a laminate, and both ends of the laminate are electrically connected to the alloy wire. The method of manufacturing a chip-type impedance element according to claim 1, wherein a thick film end face electrode pair containing silver or copper as a main component is formed and fired in a temperature range of 800 to 1100 ° C.
【請求項6】銀または銅を主成分とする複合の合金線を
同一厚みのフェライトグリーンシートで挟んで積層して
積層体を得て、前記積層体の両端部に前記合金線と電気
的に接続するよう銀または銅を主成分とする端面電極対
を形成し、800〜1100℃の温度範囲で焼成するこ
とを特徴とする請求項2記載のチップ型インピーダンス
素子の製造方法。
6. A composite alloy wire containing silver or copper as a main component is sandwiched between ferrite green sheets having the same thickness to obtain a laminate, and both ends of the laminate are electrically connected to the alloy wire. The method for manufacturing a chip-type impedance element according to claim 2, wherein an end face electrode pair containing silver or copper as a main component is formed so as to be connected, and the end face electrode pair is fired in a temperature range of 800 to 1100 ° C.
JP31573991A 1991-11-29 1991-11-29 Chip-shaped impedance element and its manufacture Pending JPH05152137A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31573991A JPH05152137A (en) 1991-11-29 1991-11-29 Chip-shaped impedance element and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31573991A JPH05152137A (en) 1991-11-29 1991-11-29 Chip-shaped impedance element and its manufacture

Publications (1)

Publication Number Publication Date
JPH05152137A true JPH05152137A (en) 1993-06-18

Family

ID=18068959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31573991A Pending JPH05152137A (en) 1991-11-29 1991-11-29 Chip-shaped impedance element and its manufacture

Country Status (1)

Country Link
JP (1) JPH05152137A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462638B2 (en) 1997-07-04 2002-10-08 Murata Manufacturing Co., Ltd. Complex electronic component
WO2016056426A1 (en) * 2014-10-09 2016-04-14 株式会社村田製作所 Inductor component

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02106908A (en) * 1988-10-17 1990-04-19 Tokin Corp Impedance element
JPH02205308A (en) * 1989-02-04 1990-08-15 Tokin Corp Impedance element and production device thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02106908A (en) * 1988-10-17 1990-04-19 Tokin Corp Impedance element
JPH02205308A (en) * 1989-02-04 1990-08-15 Tokin Corp Impedance element and production device thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462638B2 (en) 1997-07-04 2002-10-08 Murata Manufacturing Co., Ltd. Complex electronic component
WO2016056426A1 (en) * 2014-10-09 2016-04-14 株式会社村田製作所 Inductor component
US10734156B2 (en) 2014-10-09 2020-08-04 Murata Manufacturing Co., Ltd. Inductor component

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