JPH05145048A - Gate array - Google Patents

Abstract

PURPOSE:To facilitate change of the resistance value of a feedback resistor, without externally mounting a feedback resistor necessary to constitute an oscillation circuit by using a gate array. CONSTITUTION:An oscillation circuit is constituted of a buffer 10 for oscillation circuit in a gate array 1, a feedback resistor 20, a gate array 1, an externally mounted crystal resonator XL, etc. The feedback resistor 20 is constituted of a plurality of resistor blocks 21. This resistor block 21 is constituted by using pull-up resistors and pull-down resistors in I/O buffers different from the buffer 10 for oscillation circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gate array in which an oscillator circuit is constructed by using an oscillator circuit buffer.

[0002]

2. Description of the Related Art A conventional example of this type of gate array will be described with reference to FIG. In the figure, 1 is a gate array. The gate array 1 includes an oscillator circuit including an oscillator circuit buffer 10, a crystal oscillator XL, a feedback resistor Rf, a stabilizing capacitor C, and the like. All of these circuit components except the oscillator circuit buffer 10 are the gate array 1
It is externally attached.

[0003]

However, in the case of the above-mentioned conventional example, there are many external circuit components, and the peripheral circuits of the gate array 1 are complicated. In some full-custom LSIs, the feedback resistor of the oscillation circuit is built in without being attached externally. In this regard, although the peripheral circuit is simplified, it is difficult to adjust the resistance value of the feedback resistor because it is a full-custom LSI. In particular, when the resistance value is greatly changed, it is necessary to remake the mask, which requires a lot of time and cost.

The present invention was created under the background described above, and its purpose is to make it easy to adjust / change the resistance value of the feedback resistor without externally attaching the feedback resistor of the oscillation circuit. It is to provide a gate array that can be performed.

[0005]

According to a first aspect of the present invention, in a gate array in which an oscillation circuit buffer is used to form an oscillation circuit, a feedback resistor of the oscillation circuit is prepared in advance in the gate array. It is characterized in that it is configured by a resistor block.

A gate array according to a second aspect of the present invention is a gate array in which an oscillator circuit is formed using an oscillator circuit buffer, and the feedback resistance of the oscillator circuit is different from that of the oscillator circuit buffer used in the oscillator circuit. It is characterized by being configured by using a pull-up resistor or a pull-down resistor in another input / output buffer.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a gate array according to the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of an oscillator circuit configured in a gate array, and FIG. 2 is a circuit diagram of an input / output buffer.

In the figure, reference numeral 1 is a gate array provided with a large number of circuit blocks and the like. The gate array 1 includes an oscillation circuit and the like. The oscillator circuit includes an oscillator circuit buffer 10, a feedback resistor 20, a resistor R, a crystal oscillator XL, a stabilizing capacitor C, and the like.

A resistor R and a crystal unit X which form an oscillation circuit
The L and the stabilizing capacitor C are externally attached to the gate array 1 as in the conventional case, while the feedback resistor 20 is built in the gate array 1.

The feedback resistor 20 is connected between the output of the buffer 11 and the input of the buffer 13 among the circuit blocks of the buffers 11 and 13, IBFO 12 and OSC 14 in the oscillator circuit buffer 10, and a plurality of resistor blocks are connected. 21 is connected in series.

In this resistance block 21, pull-up resistors 211 and pull-down resistors 212 (see FIG. 3) in the input / output buffer 30 are used as resistors in other circuit blocks different from the oscillator circuit buffer 10. Has been.

For more detailed explanation, a circuit diagram of a conventional input / output buffer is shown in FIG. The I / O terminal of the input / output buffer shown in the figure has a pull-up resistor Tr.
1, Tr2 is connected as a pull-down resistor. That is, Tr1 and 2 are turned on or off by applying a voltage of "H" or "L" to each gate of Tr1 and Tr2, and two types of resistance values are obtained depending on the on resistance or off resistance of Tr1 and Tr2 at this time. The pull-up resistor and the pull-down resistor having the above are respectively obtained.

On the other hand, in this embodiment, pull-up resistance and pull-down resistance are obtained as follows. It will be described with reference to FIG. 2, which is a circuit diagram of the input / output buffer 30.
Tr1 as a pull-up resistor and Tr2 as a pull-down resistor are connected to the I / O terminal of the input / output buffer 30 shown in the figure. Here, the voltage of "H" is applied to the gate of Tr1 and the voltage of "L" is applied to the gate of Tr1, respectively, and pull-up resistance and pull-down resistance are respectively obtained by this ON resistance.

As shown in the figure, the resistor block 21 cuts each point of r, s, and t on the circuit line, and then cuts the points of p and q.
The line of dots is taken out and used as the input / output of the resistance block 21. As shown in FIG. 1, the feedback resistor 20 is formed by connecting a plurality of resistor blocks 21 in series.

A plurality of resistance blocks 21 are prepared in advance on the chip of the gate array 20, and the resistance blocks 21 are connected in series according to the value of the feedback resistance which is different depending on the frequency of the oscillation circuit. I'm trying to determine the number.

Therefore, in the case of this embodiment, the number of components externally attached to the gate array 1 is reduced by the amount of the feedback resistor 20,
The peripheral circuit of the gate array 1 can be simplified. Further, the resistance value of the feedback resistor 20 may be adjusted by changing the number of the resistor blocks 21, but this can be easily performed by slicing the gate array (after the MR mask). Therefore, it is very advantageous in terms of delivery time and cost as compared with the full custom LSI.

The gate array according to the present invention is not limited to the above embodiment, and a plurality of resistance blocks are prepared in advance on the chip in the gate array, and the resistance blocks are combined to form a feedback resistance. May be. Further, the circuit configuration of the oscillator circuit is not limited to the above-described embodiment, and the connection position of the feedback resistor and the circuit configuration without external parts can be adopted.

[0018]

As described above, in the gate array according to the first aspect of the present invention, since the feedback resistor is configured by the resistance block prepared in advance in the gate array, the number of external parts is reduced and the gate array is reduced. The peripheral circuit of can be simplified. In addition, the resistance value of the feedback resistor can be easily changed by changing the combination of the resistance blocks in the process of forming the gate array, which is a great advantage in time and cost as compared with the full custom LSI. ..

In the gate array according to claim 2 of the present invention, the feedback resistor of the oscillation circuit is configured by using the pull-up resistors and pull-down resistors of the input / output buffers which are prepared in advance in the gate array. Therefore, not only the above-mentioned merits are obtained, but also the existing I / O buffers can be fully utilized, so that further significant merits can be expected in terms of cost.

[Brief description of drawings]

FIG. 1 is a diagram for explaining an embodiment of the present invention,
It is a circuit diagram of an oscillation circuit configured in a gate array.

FIG. 2 is a circuit diagram of an input / output buffer of the same.

FIG. 3 is a diagram for explaining a conventional gate array and is a diagram corresponding to FIG. 1;

FIG. 4 is a diagram corresponding to FIG.

[Explanation of symbols]

 1 Gate array 10 Oscillator buffer 20 Feedback resistor 21 Resistor block 211 Pull-up resistor 212 Pull-down resistor

Claims (2)

[Claims] 1. A gate array in which an oscillation circuit is formed by using a buffer for an oscillation circuit, wherein a feedback resistor of the oscillation circuit is formed by a resistance block prepared in advance in the gate array. .. 2. A gate array in which an oscillator circuit is configured using an oscillator circuit buffer, and a feedback resistor of the oscillator circuit is a pull-up resistor or a pull-down resistor in another input / output buffer different from the oscillator circuit buffer. A gate array characterized by being configured by using.