JPH05144816A - Face-down bonding method - Google Patents

Abstract

PURPOSE:To provide a face-down bonding method with which the flux washing of the connection part between a wiring substrate and a semiconductor chip can be conducted easily by increasing the gap between a wiring substrate and a semiconductor chip even when the height of the solder bump on the semiconductor chip side is low and also subsequent sealing of gap can be conducted easily. CONSTITUTION:A wiring substrate 10 is formed by providing the connection electrode 15 of a conductor 12, which is provided on a substrate 11 through bonding agent 30, in such a manner that the substrate 10 is protruding higher than the coating layer 14 of the solder resist formed on the above-mentioned conductor 12. A bump 22, which is formed protruding to the lower part of a semiconductor chip 20, is heat-welded to the connection electrode 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a face-down bonding method capable of obtaining favorable effects in a flux cleaning and sealing process when mounting a semiconductor chip.

[0002]

2. Description of the Related Art FIGS. 4 to 6 show a conventional example of a face-down bonding method. Of these, FIG. 4 is a partial plan view of the wiring board, FIG. 5 is a partial vertical side view of the wiring board,
FIG. 6 is a partial vertical cross-sectional side view of a wiring board to which a semiconductor chip is bonded. A conventional face-down bonding method will be described with reference to these drawings. In the semiconductor chip wiring board 100, a conductor 120 is arranged on a hard substrate 110 such as glass epoxy with an adhesive 130, and the conductor 120 is provided. A solder resist 140 is formed on top. An opening 141 is formed in the portion of the solder resist 140 corresponding to the connecting electrode portion 121 of the conductor 120. On the other hand, the semiconductor chip 20
Solder resist 210 and solder bumps 220 are formed on the lower surface side of 0. And
The solder bump 220 of the semiconductor chip 200 is heat-treated and welded to the connecting electrode portion 121 of the conductor 120 of the semiconductor chip wiring board 300.

[0003]

However, in the above-described conventional face-down bonding method, the upper end surface of the connecting electrode portion 121 of the conductor 120 of the wiring board 100 has the same height as the upper end surface of the conductor 120 as shown in FIG. The semiconductor chip 200 is drawn in the opening 141 of the solder resist 140 in substantially the same manner, and the semiconductor chip 200 is attached to the connecting electrode portion 121 via the solder bump 220. Therefore, when the height of the solder bump 220 on the semiconductor chip 200 side is small (for example, 40 to 50 μm), the connected wiring board 1 is connected.
00 is a gap between the semiconductor chip 200 and the semiconductor chip 200, the flux cannot be washed at the connecting portion, and the sealing resin 230 does not enter the gap in the subsequent gap sealing step. was there. The present invention has been made in view of such circumstances, and the semiconductor chip 200
Even when the height of the solder bumps 220 on the side is small, the gap a between the connected wiring board 100 and the semiconductor chip 200 is increased to facilitate flux cleaning of the connection portion and to reduce the gap after that. An object of the present invention is to provide a face-down bonding method that facilitates sealing.

[0004]

In order to achieve the above-mentioned object, a face-down bonding method according to the present invention has a structure in which a connecting electrode portion of a conductor arranged on a substrate of a wiring board is connected to a solder on the conductor. Pads are formed that project above the cover layer of resist. After that, a bump formed so as to protrude below the semiconductor chip is heat-welded to the upper end portion of the pad of the wiring board. The pads may be formed by plating the conductor. The substrate may be a hard substrate.

[0005]

According to the present invention, the connecting electrode portion of the conductor of the wiring board is formed so as to project higher than the coating layer of the solder resist, and the upper end portion of the connecting electrode portion projects below the semiconductor chip. Since the formed bumps are connected by heat welding, the gap between the connected wiring board and the semiconductor chip is increased by the height of the connecting electrode portion protruding above the conductor, and Even when the height of the bumps on the chip side is small, the face-down bonding method is one in which flux cleaning of the gap is easy and the sealing material easily enters the gap thereafter. If the connection electrode is formed by plating a conductor,
Its formation is easy.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to illustrated embodiments. 1 to 3 show an embodiment of the present invention. Among them, FIG. 1 is a partial vertical sectional side view showing a connection structure of a semiconductor chip to a wiring substrate, FIG. 2 is a partial plan view of the wiring substrate, and FIG. 3 is a partial vertical sectional side view of the wiring substrate.

In the face-down bonding method of this embodiment, the connecting electrode portion 15 of the conductor 12 provided on the substrate 11 via the adhesive 13 is covered with the solder resist coating layer formed on the conductor 12. The wiring board 10 is formed by forming the wiring board 10 so as to project higher than 14. Then, a bump 22 formed so as to project downward from the semiconductor chip 20 is heat-welded to the upper end portion of the connecting electrode portion 15.

Each of the constituent parts will be described in more detail. The substrate 11 of the wiring board 10 is formed of a non-conductive hard substrate such as glass. As shown in FIG. 3, a conductor 12 made of a copper (Cu) foil or the like is laminated on the substrate 11 via an adhesive 13 to form a pattern, and the connecting electrode portion 12a of the conductor 12 is avoided. Thus, the coating layer 14 of the solder resist is formed. As a material of the solder resist, for example, an epoxy resin is used, and has a function as a mask material at the time of plating or soldering, a function as an insulating layer, and the like.

The connecting electrode portion 15 is formed, for example, by solder plating or nickel / gold plating (Ni / Au plating) so as to project higher than the solder resist coating layer 14.

On the other hand, on the lower surface of the semiconductor chip 20, a coating layer 21 of solder resist is formed on the entire surface excluding the connecting electrode portion 20a, and the bump 22 is formed on the connecting electrode portion 20a by soldering or the like. It is formed in a protruding state.

The connecting electrode portion 15 of the wiring board 10 and the bumps 22 of the semiconductor chip 20 are constructed as described above,
Face down bonding is performed as follows.

That is, the bumps 22 of the semiconductor chip 20 are heated by a thermocompression bonding head or the like to be heat-welded and connected to the connecting electrode portions 15 of the wiring board 10 as shown in FIG.

In such a connected state, the gap b between the wiring substrate 10 and the semiconductor chip 20 is such that the connecting electrode portion 12a is a solder resist coating layer 14
The amount c protruding upward becomes larger than the conventional interval a (FIG. 6).

After that, the flux in the gap is cleaned and then the sealing resin 30 is injected into the gap to be solidified and sealed. As described above, the wiring substrate 10 and the semiconductor chip are sealed. Since the gap b between the gap and the gap 20 is larger than the conventional gap a (FIG. 6), the flux cleaning of the connecting portion is easy and the gap is easily sealed thereafter.

[0015]

According to the present invention, the gap between the connected wiring substrate and the semiconductor chip is increased by the amount that the connecting electrode portion of the conductor projects above the conductor. Even when the height of the bump is small, the flux cleaning for the connection can be easily performed, and the sealing material can easily enter the gap thereafter, which is a face-down bonding method. If the connection electrode is formed by plating on the conductor, the formation can be simplified.

[Brief description of drawings]

FIG. 1 is a partial vertical sectional side view showing a connection structure of a semiconductor chip to a wiring board.

FIG. 2 is a partial plan view of a wiring board.

FIG. 3 is a partial vertical cross-sectional side view of a wiring board.

FIG. 4 is a partial plan view of a conventional wiring board.

FIG. 5 is a partial plan view of the wiring board.

FIG. 6 is a partial vertical cross-sectional side view of a conventional wiring board to which a semiconductor chip is bonded.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Wiring board 11 Substrate 12 Conductor 12a Connection electrode portion 14 Solder resist coating layer 20 Semiconductor chip 21 Solder resist coating layer 22 Bump

Claims (3)

[Claims] 1. A solder resist is provided on a wiring board, wherein a conductor is provided on a substrate, and a coating layer of a solder resist is formed on the conductor leaving a connection electrode portion of the conductor. The method of forming a face-down bond, wherein the bump is formed so as to protrude higher than the coating layer and the bump formed so as to protrude below the semiconductor chip is heat-welded to the upper end portion of the connecting electrode portion. 2. The face-down bonding method according to claim 1, wherein the connecting electrode is formed by plating the conductor. 3. The face-down bonding method according to claim 1 or 2, wherein the substrate is a hard substrate.