JPH05133998A - Ic testing device - Google Patents

Abstract

PURPOSE:To make the time spent until a generated current (or voltage) is measured after a testing voltage (or current) is applied across an IC to be tested constant. CONSTITUTION:A controller 1 selects an arbitrary measuring unit and transfers an address signal A for selecting the operation of the measuring unit, data C, and command B for designating the operating timing in the measuring unit to the measuring unit through a data bus 2. The controller 1, in addition, sends data designating time (t). Since a measuring timing signal generation circuit 31 is provided, the point of time for impressing a voltage or current is detected by inputting the address signal A, command B, and data C (including the time (t)) and a measuring timing signal D is transferred to the measuring unit after the elapse of the time (t). The measuring unit designated by the address signal A measures a current or voltage synchronously to the measuring timing signal D.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC tester,
In particular, the present invention relates to a circuit that generates a timing signal necessary for measuring a current / voltage after a certain period of time has elapsed since the voltage / current was applied to the IC under test.

[0002]

2. Description of the Related Art In an IC tester, a bus structure is used when a large number of measuring units 3 ₁ , 3 ₂ , ... Are controlled by a controller 1 using a computer as shown in FIG. An address signal A for selecting each measurement unit 3 _i via the bus 2 or an operation in each measurement unit, data (parallel data) C, and each measurement unit 3 _i stores the data C. A command B that specifies the timing of fetching or other operation is transferred. Each of these signals is shown in FIG. 3B. The time lengths T ₁ , T _2, ... Of the address signal A correspond to the instructions 1, 2 ,.

In the IC test apparatus, a so-called DC operation test is performed in which a voltage or current is applied to the IC under test 4 and the generated current or voltage is measured. This operation is shown in Figure 4.
Will be described. Measuring unit 3 of controller 1
_The address signal A, the command B, and the data C are transferred via the bus 2 in response to the instructions 1, 2, ... For _i (i = 1, 2, ...). T ₁ period: When the coincidence detection circuit 5 detects that the address signal A is equal to preset data n, a signal of H (high) level from the corresponding output terminal is input to one input terminal of the AND gate 6. The gate is opened. As a command B, a write signal W ₁ (for example, represented by parallel bits 0 and 1) is given to the decoder 7 and decoded, and an L (low) level signal W ₁ ′ is output from the decoder 7 to the other side of the AND gate 6 at almost the same timing. Given to the input terminal of. And Gade 6 is open,
The write signal W ₁ ′ passes through the AND gate 6 and is given to the clock terminal of the register 8. This allows register 8
Stores the data (indicating the test voltage value applied to the IC under test 4) C ₁ input to the data input terminal at that time, and at the same time, the stored data C ₁ is supplied to the D / A converter 9. It

The signal converted into an analog signal by the D / A converter 9 is input to the voltage applied current measuring circuit 10,
The circuit 10 applies a DC test voltage V ₁ to a predetermined terminal p _{1 of the} IC under test 4. Further, the current I ₁ flowing through the predetermined terminal p ₁ to which V ₁ is applied is measured by the circuit 10.
As is clear from the above description, during the period T _1, the controller 1 issues the command 1 for applying the test voltage V ₁ of the predetermined magnitude to the predetermined measurement unit 3 _i at the predetermined timing and executes it. It is nothing but the period of time. T ₂ period: The controller 1 is the predetermined measurement unit 3
_{Since the} same signal as the address data set in the _i coincidence detection circuit 5 is not transmitted, the coincidence detection output from the circuit 5 is not generated. Therefore, during this T ₂ period, the IC under test is
In the state in which the test voltage V ₁ is applied to 4, the waiting period is waiting for the next command.

That is, the T ₂ period can be said to be instruction 2 "wait" and its execution period. T ₃ period: A = m as the address signal A and the write signal W as the command B are sent from the controller 1. When A = m is detected by the coincidence detection circuit 5, an H level signal is applied to one input terminal of the AND gate 12 from the corresponding output terminal to open the gate. The write signal W ₂ of the command B is detected by the decoder 7, and the write signal W of L level is output from the circuit 7 at almost the same timing.
₂ 'through the AND gate 12 A / D converter 13
Is supplied to. In the A / D converter 13, data obtained by converting the measured analog data of the current I ₁ input from the voltage application current measurement circuit 10 into digital data is stored in a built-in register. Thus, during the T ₃ period, the controller 1 issues the command 3 “Measure the current I ₁ ”,
It is the period in which it was executed. T ₄ period: Address signal A = x from controller 1
And the read signal R is output as the command B. The address A = x is detected by the coincidence detection circuit 5, and the AND gate 15 is opened. When the decoder 7 detects a read signal R (for example, represented by parallel bits 1 and 0), a signal R'having substantially the same timing L level is output, and is supplied to one input terminal of the AND gate 16 via the AND gate 15. Given, the gate 16 is opened. As a result, the measured digital data of the current I ₁ stored in the register in the A / D converter 13 is transferred to the controller 1 through the AND gate 16 and the bus 2. During this T ₄ period, the controller 1 issues a command 4 to the measuring unit 3 _i , “transfer the measured data of the current I ₁ ”,
It is the period in which it was executed.

[0006]

The voltage V₁To apply
Command 1 and current I₁Command 3 to measure
The interval t (see FIG. 4B) between the runs is the controller 1
The difference in the model of the internal computer, and the control between instructions 1 to 3
It changes when there is interrupt processing of the roller 1. Current I ₁Is a figure
4B I₁In case of ', the measured value even if t becomes long
Does not change, but I₁In case of ″, t becomes longer
And the measured value changes, and it is impossible to measure accurately.
was there.

Also, in order to test the device efficiently,
Even when the optimum value of the time t between the instructions 1 to 3 is obtained or the changing state of the current I ₁ is measured, if the time t changes, accurate measurement cannot be performed, which is inconvenient. An object of the present invention is to solve these conventional problems, to make the time t from voltage application to current measurement constant, and improve the measurement accuracy.

[0008]

(1) A plurality of measuring units for applying a predetermined test voltage or current to a predetermined terminal of an IC under test to measure the current or voltage at a predetermined terminal, and the measuring units. An IC test having a controller for transferring an address signal A for selecting and selecting an operation in the measurement unit, a data C, and a command B designating a timing of the operation in the measurement unit to the measurement unit through a data bus. In the apparatus according to the first aspect of the present invention, the controller sends data specifying a time interval t from the time when the test voltage or the current is applied to the IC under test until the current or the voltage is measured.

The address signal A, the command B, and the data C (including the data of the time interval t) transferred from the controller are input to detect the time point at which the voltage or current is applied to the IC under test. The measurement timing signal generating circuit transfers the measurement timing signal D to the measurement unit through the data bus at a time point delayed by the time interval t from that time point.

A predetermined measurement unit designated by the address signal A measures the current or voltage of the IC under test in synchronization with the measurement timing signal D. (2) In the invention of claim 2, the timing signal generating circuit sets a delay time equal to the time interval t based on a register for storing a part of the data C as an address and data indicating the time interval t. The delay circuit to be set, the data stored in the register, and the address signal A
And a coincidence detection circuit for detecting a time point at which a voltage or a current is applied to the IC under test.
The detection output of the coincidence detection circuit is input to the delay circuit,
The measurement timing signal D is obtained from the output of the delay circuit.

[0011]

EXAMPLE A test voltage V is applied to the IC4 under test.₁By applying
Current I after a lapse of a fixed time (t)₁To be able to measure
To execute the command, as shown in FIG.
4B t₁), A delay circuit that outputs a pulse after t time
The path 22 to each measuring unit 3 _iCould be added to
It In FIG. 5, the switching circuit 2 is provided so that the same operation as the conventional one can be performed.
When 1 is provided and the coincidence detection circuit 5 detects A = m,
Either the output or the output when A = n is detected
It is selected by the data from the controller 1. Switching times
The delay time of the delay circuit 22 is set from the path 21.

By the way, in the DC operation test of the IC, as shown in FIG.
Pin p at the first instruction as shown in₁Test voltage V₁Mark
In addition, the next command gives a specified pin, for example pin p.₂To test power
Pressure V ₂Is applied, and after t time from that point, pin p₁Electric power
Flow I₁It is desirable to consider when measuring. On the spot
If so, the coincidence detection circuit 5 and the switching circuit 21 are expanded.
FIG. 7 shows the measurement unit in this case. Voltage V₂
Current after application I₁Measuring unit 3₁
In the match detection circuit 5 of₁₂= N₂Is set to. Any
V_iAfter applying I₁To be able to measure_1i=
n_i(I = 2 to n). A = m₁₁, A =
m_{twenty one}When the same detection output as in Figure 4A is used,
To use.

However, in such a method, each measurement unit is
The coincidence detection circuit 5 and the switching circuit 21 become complicated,
The device is large and expensive. So this invention
Then, as shown in FIG.
(Several hundred) Match detection circuit 5 and switching times of measurement unit
The path 21 should be as simple as possible and the controller 1 side
The measurement timing signal common to each measurement unit
A signal generation circuit (hereinafter referred to as TG) 31 is provided. In Figure 1
Portions corresponding to those in FIGS. 3 to 7 are denoted by the same reference numerals. Figure
A, b, c and A, B, C, etc. are attached to the main part of
The waveform of the main part is shown in the timing chart of Fig. 2.
It Next, the operation of the apparatus will be described with reference to FIGS.
To do. When address signal A = Y, TG31 coincidence detection
The circuit 32 detects this, and the H level output becomes
Input to one input terminal of the gate 33 and the gate is opened.
Be done. Applied to the other input terminal of AND gate 33
Command B₁Passes through the AND gate 33 and registers
Data is supplied to the clock terminal of
C = n 'is stored. The stored data n ′ is the same
Sometimes applied to one input terminal F of the match detection circuit 37
It When the address signal A = Z, the coincidence detection circuit 32
H level output is one input terminal of AND gate 35
The gate is opened. Mark the other input terminal
Command B added₂Passed through the AND gate 35,
It is supplied to the clock terminal of the register 36, and the register 35
The data C = t is stored in. The stored data t
Are simultaneously supplied to the delay circuit 39 and the delay time is set to t.
Is determined. The data n ′ is the other data in the match detection circuit 37.
Compared with the address signal A input to the input terminal E,
= N 'is detected, one input of the AND gate 38
H level output is given to the terminal, the gate is opened,
Command B applied to the other input terminal_FourBut Ande
It is supplied to the delay circuit 39 through the gate 38. In the delay circuit 39, the output B of the AND gate 38_Four′
At the time t after the input of
D is output and each measurement unit 3 is connected via the bus 2. _iTo serve
Be paid. Measuring unit 3₁In the match detection circuit 5 of
When issued, command B from AND gate 6₃Same as
A clock signal is applied to the register 8 during
Time data C = v₁(V₁Data corresponding to
Stored in the data 8 and at the same time the stored data v₁Is D / A
Input to converter 9, D / A converted, voltage applied current measurement
It is supplied to the constant circuit 10. Test voltage V from the circuit 10₁
Is the terminal p of IC4 to be measured₁Applied to. Similar to measurement unit 3₂Then address A =
n'is detected, command B_FourAt the same timing as
C = v₂(V₂(Data corresponding to
Test voltage V as delivered₂Is terminal p₂Applied to. From delay circuit 39 to measurement unit 3₁Supplied to the measurement
The timing signal D is selected by the switching circuit 21 and is set to A /
It is applied to the D converter 13 and the A / D conversion at that time is performed.
The stored digital data is stored in the built-in register. Address signal A = x is measurement unit 3₁Detected by
Then, command B_FiveAnd gate 15
Write signal is input to AND gate 16 and gate
Is opened and stored in the register of the A / D converter 13.
Current I₁Measurement data of AND gate 16 and bus
2 is transferred to the controller 1 via 2.

Voltage V₁, V₂And then the current I₁To
This is the end of the explanation of the measuring operation.
If an imming signal generating circuit is used, V₁By applying
I after a certain time t₁Of course, it is possible to measure. next
Let me explain it briefly. In this case, instruction 1 in FIG.
, Set n instead of data n ', and delete instruction 4
Be removed. By doing this, one instruction
The output of the match detection circuit 37 becomes H, and the command B₃In Thailand
Trigger signal from AND gate 38 (Fig. 2h
(Indicated by a line) is input to the delay circuit 39,
After that, the measurement timing signal D is output from the delay circuit 39.
Measurement unit 3₁Current I at ₁Is measured.

In the above description, it is assumed that the IC test apparatus applies voltage and measures current, and the measuring unit 3 _i
Although the case where the voltage applied current measuring circuit 10 is provided is described above, the present invention is not limited to this case, and the same applies to the case where the current is applied to measure the voltage, and thus the circuit 10 is used as the current applied voltage measuring circuit. Clearly applicable to

In the measuring unit 3 _i shown in FIG. 1, the match detection circuit 5 detects the address A = m as in the conventional case, and A / A is detected at the timing of the command B within the detection period.
A switching circuit 21 is provided so that the measured value can be stored in the D converter 13 so that either the output of the AND gate 12 or the measurement timing signal D can be selected by an instruction from the controller 1.

Although the measurement timing signal generation circuit (TG) 31 is provided adjacent to the controller 1 in FIG.
The TG 31 may be provided in the controller 1 or the bus 2
It may be provided in the middle of.

[0018]

According to the present invention, the test voltage V _i (or current I _i ) is applied to the predetermined terminal p _i of the IC under test regardless of the type of computer in the controller 1 and the presence or absence of interrupt processing. It is possible to measure the current I _i (or voltage V _i ) at the terminal p _i after a fixed time t after the application. Therefore, in the conventional technique, the measurement accuracy is lowered because the time t changes, but the present invention can significantly improve the measurement accuracy.

In the present invention, a large number of measuring units
Common to each measurement unit
Since a constant timing signal generation circuit is provided,
Redemption is achieved. According to the present invention, any IC under test can be used.
Terminal p_iTest voltage V_i(Or current I _i) Apply
After that, any other terminal p_jTest voltage V_j(Or current
I_j) Is applied and its V_j(I_j) Is applied
Terminal p after a certain time t_iCurrent I_i(Or voltage V_i)
It can be easily measured. Thus, according to the present invention
If so, the function of the device is improved and the usability is extremely good.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a timing chart of FIG.

3A is a block diagram showing an outline of a configuration of a conventional IC test apparatus, and B is a timing chart of A. FIG.

4A is a block diagram of the measurement unit in FIG. 3, and B is A.
Timing chart.

FIG. 5 is a block diagram of a measurement unit considered in a stage before obtaining the present invention.

[6] A, after the application of the test voltages V ₁ from the measurement unit 3 ₁ to the terminal p ₁ under test the IC, and test voltage V ₂ is applied to the measurement unit 3 ₂ to the terminal p _2, the V ₂ 3 is a block diagram showing the connection between the measurement unit and the IC under test when measuring the current I ₁ of the terminal p ₁ after a predetermined time t from the time of application, and B is a timing chart of A. FIG.

FIG. 7 is a block diagram of another measurement unit considered in the stage before obtaining the present invention.

Claims (2)

[Claims] 1. A plurality of measuring units for applying a predetermined test voltage or current to a predetermined terminal of an IC under test to measure the current or voltage of a predetermined terminal, respectively, and selecting the measuring units, or measuring units. Signal A for selecting the operation within the unit, data C, and command B for specifying the timing of the operation within the measuring unit
In the IC test apparatus, which includes a controller for transferring the current and voltage to the measurement unit through the data bus, a time interval t from when the test voltage or the current is applied to the IC under test by the controller until the current or the voltage is measured, respectively. The address signal A transmitted from the controller.
The command B and the data C (including the data of the time interval t) are input to detect the time when the voltage or current is applied to the IC under test, and the measurement timing is detected at the time delayed by the time interval t from that time. A measurement timing signal generation circuit for transferring the signal D to the measurement unit through the data bus is provided, and a predetermined measurement unit designated by the address signal A is synchronized with the measurement timing signal D to be tested I.
An IC test device characterized by measuring the current or voltage of C. 2. A register in which the measurement timing signal generating circuit stores a part of the data C as an address, and a delay in which a delay time is set equal to the time interval t based on the data indicating the time interval t. The circuit includes a circuit, a coincidence detection circuit that detects coincidence between the data stored in the register and the address signal A, and thereby detects a time point at which a voltage or a current is applied to the IC under test. 2. The IC test apparatus according to claim 1, wherein the output is input to the delay circuit, and the measurement timing signal D is obtained from the output of the delay circuit.