JPH0513100B2 - - Google Patents

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Publication number
JPH0513100B2
JPH0513100B2 JP60107447A JP10744785A JPH0513100B2 JP H0513100 B2 JPH0513100 B2 JP H0513100B2 JP 60107447 A JP60107447 A JP 60107447A JP 10744785 A JP10744785 A JP 10744785A JP H0513100 B2 JPH0513100 B2 JP H0513100B2
Authority
JP
Japan
Prior art keywords
substrate
multilayer
conductor
green sheet
composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60107447A
Other languages
Japanese (ja)
Other versions
JPS61266348A (en
Inventor
Koichi Kumagai
Shinji Shimazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60107447A priority Critical patent/JPS61266348A/en
Publication of JPS61266348A publication Critical patent/JPS61266348A/en
Publication of JPH0513100B2 publication Critical patent/JPH0513100B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上に利用分野 本発明は熱処理によつて結晶化しうる無機誘電
体組成物であつて、主として、多層電子回路用の
基板材料に用いられる誘電体組成物に関するもの
である。 従来の技術 近年、電子回路には、厚膜印刷法により簡便に
回路形成できる熱放散性の優れたセラミツク基板
を使用した電子回路が使用されている。そして、
より小型高性能化を実現する為に多層電子回路基
板が使用されはじめている。 多層回路基板を製造する方法は一般には次に述
ベる(a)(b)(c)の三種類である。 (a) セラミツク焼結体上での印刷多層法 (b) グリーンシート上での印刷多層法 (c) グリーンシート積層多層法 (a)のセラミツク焼結体上での印刷多層法による
多層基板の製造方法を説明すると、第1図にその
プロセスを示すように、まず基板となるセラミツ
ク焼結体上に第1導体層を印刷・乾燥・焼成し
(ステツプ1〜3)、次に第1絶縁層を印刷・乾
燥・焼成し(ステツプ4〜6)、その上に第2絶
縁層を印刷・乾燥し(ステツプ7,8)、第2導
体層を印刷・乾燥し(ステツプ9,10)、第2絶
縁層ごと一括焼成(ステツプ11)する。この際、
第1及び第2絶縁層はヴイアホールと呼ばれる微
小孔が形成されるように印刷し、その微小孔中に
第2導体層に用いられる材料が充填されるように
第2導体層を印刷する事により第1導体層と第2
導体層とが接続される。次に第2導体層上に第3
絶縁層を印刷・乾燥・焼成し、第2絶縁層以降と
同手順で層数を重ねていく(ステツプ1〜11)。 (b)のグリーンシート上での印刷多層法による多
層基板の製造方法は、第2図にそのプロセスを示
すように、まず焼成後基板となるセラミツクのグ
リーンシート上に第1導体層を印刷・乾燥し(ス
テツプ12,13)、次にその上に第1絶縁層を印
刷・乾燥し(ステツプ14〜15)、引き続き第2導
体層、第2絶縁層の印刷・乾燥を行ない(ステツ
プ16〜19)、以降同手順で層数を繰り返し(ステ
ツプ12〜19)、グリーンシートと導体層と絶縁層
とを一括焼成する(ステツプ20)。 (c)のグリーンシート積層多層法による多層基板
の製造方法は、第3図にそのプロセスを示すよう
に、まず複数枚のセラミツクのグリーンシートそ
れぞれに異なるパターンの微小孔を形成し(ステ
ツプ22〜24)、それぞれ異なるパターンの導体層
を印刷・乾燥する(ステツプ25〜30)。次に導体
パターンの異なるグリーンシート同士を所望枚数
積層し(ステツプ31)、適度な圧力と適度な温度
のもとで圧着し(ステツプ32)、所望の外形寸法
に切断してから焼成する(ステツプ33,34)。各
導体層間の導通はグリーンシートの微小孔に充填
された導体により行なわれる。 (b),(c)の製造方法においては共に基板焼成の後
に最上層の厚膜形成を行なう(ステツプ21,35)。 (a),(b),(c)三種類の製造方法を比較すると、(a)
は比較的簡単な技術で多層化が可能であるが、実
質的な層数限界は4〜6層でありそれ以上の層数
は表面の凹凸が激しくなり実用に耐えない。(b)は
グリーンシートと印刷した絶縁層と導体層とを一
度に焼成する事によりプロセスの合理化を行なう
事ができる。しかし(b)も(a)同様に、層数を増すと
表面の凹凸が大きくなるのでやはり限界層数は4
〜6層である。(c)は理論的に層数は無限に可能で
あり、現実的にも30〜40層程度の多層基板が報告
されている。し かし、その製造にはきわめて高
度な技術を要し、プロセス的課題も多い。 以上の(a),(b),(c)三種類の製造方法のうち、本
発明は(c)のグリーンシート積層多層法に関するも
のである。第3図を参照にしてより詳細に従来技
術を述べる。 まず、アルミナパウダーと有機物の混合体を所
定の厚みに成形したグリーンシート複数枚に対
し、ヴイアホールとなる微小孔をそれぞれに異な
るパターンで形成し(ステツプ22〜24)、それぞ
れ異なるパターンの導体層を印刷・乾燥する(ス
テツプ25〜30)。導体材料には主にW,Moが使
用される。ヴイアホールへの導体材料の充填は導
体の印刷工程と同時に行なう(ステツプ25〜27)
か、もしくは印刷工程の前にヴイアホール単独に
導体材料を充填する。導体の乾燥後に各々異なる
導体パターンを形成したグリーンシートを所定枚
数積層し(ステツプ31)、適度な温度下で加圧一
体化する(ステツプ32)。次に、所望の外形寸法
に切断し(ステツプ33)、約1600℃の還元性雰囲
気中で焼成し(ステツプ34)、多層基板となる。
焼成された基板は充分洗浄され、以降最上層の厚
膜形成工程(ステツプ35)へと進む。 発明が解決しようとする問題点 しかしながら上記のような従来技術では、焼成
温度が高く還元性雰囲気を使用する為に設備費用
が高く、取扱いも不便であつた。また、グリーン
シート材料にアルミナを使用しており焼成温度が
高い為、導体材料にはW,Mo等の高融点金属し
か使用出来ず、結果として導体の抵抗値が高くな
るという問題点を有していた。 本発明は上記問題点に鑑み、導体材料にAu,
Ag,Ag/Pd等の抵抗値が低い低融点金属を使用
し、焼成温度は低く空気中焼成を可能にして設備
費用を小さくし、取り扱いも容易にする事を目的
として、空気中低温焼成可能な多層基板用誘電体
組成物を提供するものである。 問題点を解決するための手段 上記問題点を解決するために本発明の誘電体組
成物は、酸化物に換算して、SiO2 20〜60%,
ZnO 5〜20%,BaO 10〜40%、B2O3,Sb2O3
うち少なくとも1種2〜15%の組成(重量%)か
らなる基本組成物に、同じく酸化物に換算して、
SnO2,CaO,MgO,SrO,PbOのうち少なくと
も1種1〜6%、K2O,Na2O,Li2Oのうち少な
くとも1種0.2〜3%、Al2O3,ZrO2のうち少な
くとも1種3〜40%の組成(重量%)の添加物を
含むものである。 作 用 本発明の多層基板用誘電体組成物は、約870
℃〜980℃の低温で焼結可能な材料であり、しか
も電子回路形成用のセラミツク基板としての特性
を充分発揮する。 本発明の材料の使用により、低融点金属Au,
Ag,Ag/Pd,Cuの使用が可能となる。Au,
Ag,Ag/Pdは空気中でも酸化しない為還元性雰
囲気は不必要であり、またAu,Ag,Cuは抵抗値
がW,Moよりも低い。従つて、空気中低温焼成
により設備費用も小さく済み、取り扱いも簡便に
なる。 本発明の組成物における限定理由は次の通りで
ある。 SiO2は基板を構成する基本組成物であつてガ
ラス形成の主材料である。SiO2が20%未満では
焼結温度が高くなり、Ag,Au,Ag/Pd,Cuの
低融点金属を内部導体として使用出来なくなる。
またSiO2が60%を超えると曲げ強さが小さくな
り過ぎ、基板として実用性に耐えない。 BaOはガラス形成及び結晶の成分である。
BaOが10%未満ではガラスの溶融中に失透を主
成し誘電正接が劣化する。BaOが40%を超える
と軟化温度、結晶化温度が高くなり、結果として
焼結温度が高くなり過ぎる。 ZnOもまたガラス形成の成分であり、基板とし
て基本的な組成物である。ZnOが5%未満及び
ZnOが20%を超えると充分緻密に焼結せず吸水性
を帯びる。 B2O3,Sb2O3もまた基板構成の基本組成物であ
り、B2O3,Sb2O3のうち少なくとも1種が2%未
満では吸水性を帯び曲げ強さも低い。B2O3
Sb2O3のうち少なくとも1種が15%を超えると焼
結時にセラミツクの変形が著しくなる。 SnO2,CaO,MgO,SrO,PbOは基板の焼結
性向上及び熱膨脹係数の制御、さらには誘電正接
を良好にする目的で少なくとも1種、通常は2〜
3種の組合せで添加される。SrO2,CaO,
MgO,SrO,PdOのうち少なくとも1種が1%
未満では焼結が不充分であり吸水率が大きくな
り、また誘電正接が大きくなり好ましくない。
SrO2,CaO,MgO,SrO,PbOのうち少なくと
も1種が6%を超えると誘電正接が大きくなり好
ましくない。熱膨脹係数は基板の用途により種々
制御されるが、通常の厚膜混成集積回路として用
いる場合、特に厚膜導体ペースト及び厚膜抵抗ペ
ーストにより回路形成を行なう場合はアルミナの
熱膨脹係数6.0〜6.5×10-6/℃に一致させるのが
好ましく、またICのシリコンチツプを直接基板
に実装する場合はシリコンの熱膨脹係数4×
10-6/℃に一致させるのが好ましい。熱膨脹係数
だけで基板の良否判断は難かしいが、両者の値と
比較して大きく離れた値を実つ基板は実用に耐え
ない。 K2O,Na2O,Li2Oは基板の焼結性向上及び吸
水性の防止、さらには基板の変形を抑ある目的で
添加する。K2O,Na2O,Li2Oのうち少なくとも
1種が0.2%未満では基板の変形が著しくなり、
大きく基板が反る。K2O,Na2O,Li2Oのうち少
なくとも1種が3%を超えると焼結が不充分とな
り吸水性を帯びる。 Al2O3,ZrO2は基板のフイラーとして使われ、
主に曲げ強さの向上の為に添加される。Al2O3
ZrO2のうち少なくとも1種が3%未満では曲げ
強さが小さ過ぎ実用に耐えない。またAl2O3C,
ZrO2のうち少なくとも1種が40%を超えると焼
結温度が高くなりかつ焼結が不充分で吸水性を帯
び、また曲げ強さも小さくなる。 実施例 以下本発明の多層基板用誘電体組成物の実施例
について説明する。 まずガラスの調整に当つては、後掲の第1表に
示した組成になるように基本組成物のの各原料を
秤量してバツチを調整し、このバツチを1400〜
1500℃で1〜3時間加熱して溶融し、例えばロー
ルアウト法等によりガラス板を成形する。次いで
このガラス板をアルミナボールなどで平均粒径
0.5〜5μmの粉末とし、同粒径程度の添加物を加
える事により本発明の誘電体組成物が製造され
る。なお、この際用いられる原料粉末は明確化の
ため酸化物に換算表記したが、鉱物・酸化物・炭
酸塩・水酸化物などの形でも通常の方法により使
用されるのは勿論である。 次に、このようにして得られた誘電体組成物を
使用したグリーンシート積層多層法によるセラミ
ツク多層基板の一製造方法の一例を述べる。 まず上記組成物100重量部に対して、ポリビニ
ルブチラール10重量部、ジブチルフタレートを6
重量部、グリセリルモノオレエート0.4重量部、
1―1―1トリクロルエタンを20重量部、イソプ
ロピルアルコールを39重量部加え、24時間ボール
ミル混合を行ないスラリを造つた。このスラリで
ポリエステルフイルム上にドクターブレード法に
より厚み0.1mmのグリーンシートを製造し、充分
なエージング行ない、ヴイアホールとなる微小孔
を機械的な加工により形成した。次いでこのヴイ
アホールにムメタルマスクを用いた印刷法により
導体材料を充填した。使用した導体材料はAuで
融点は1062℃であつた。 次に、同じ導体材料により導体層をグリーンシ
ートに印刷・乾燥した。ヴイアホールパターン、
導体印刷パターンが各々異なるグリーンシート複
数枚を、80℃の温度下で200Kg/cm2の圧力で密着
させ加圧一体化した。次に外形切断の後に最大温
度870〜1340℃最大温度保持時間60分にて焼成し
た。焼成された多層基板は、純水で超音波洗浄後
表裏の最上層厚膜を形成して電子回路としての機
能が発揮される基板として完成した。 上記製造法により出来た基板としての特性を誘
電体組成物の組成別に第1表に示す。 特性は、上記の電子回路としての機能が発揮さ
れる基板について曲げ強さ、吸水率、誘電正接を
測定し、結果を第1表に示した。また、同表の焼
結温度はそれぞれの組成物について予じめ示差熱
分析よりおおよその焼結温度を推定しておき、吸
水率0.0%であり、なおかつ曲げ強さが最大にな
る焼結温度を選択した。反り変形の有無について
は、基板焼結後、外観形状を目視で観察して、基
板表面の凹凸及び反りうねり、また大きな変形が
あるものに関して実用に耐えないとした。
INDUSTRIAL APPLICATION FIELD The present invention relates to an inorganic dielectric composition that can be crystallized by heat treatment, and mainly relates to a dielectric composition used as a substrate material for multilayer electronic circuits. BACKGROUND OF THE INVENTION In recent years, electronic circuits using ceramic substrates with excellent heat dissipation properties and which can be easily formed by thick film printing have been used. and,
Multilayer electronic circuit boards are beginning to be used to achieve smaller size and higher performance. There are generally three methods for manufacturing multilayer circuit boards: (a), (b), and (c) described below. (a) Printing multilayer method on ceramic sintered body (b) Printing multilayer method on green sheet (c) Green sheet lamination multilayer method Multilayer substrate by printing multilayer method on ceramic sintered body in (a) To explain the manufacturing method, as shown in Figure 1, first a first conductor layer is printed, dried, and fired on a ceramic sintered body that will become a substrate (steps 1 to 3), and then a first insulating layer is printed, dried, and fired (steps 1 to 3). printing, drying, and firing the layer (steps 4 to 6), printing and drying the second insulating layer on top of it (steps 7 and 8), printing and drying the second conductive layer (steps 9 and 10), The second insulating layer is fired all at once (step 11). On this occasion,
The first and second insulating layers are printed so that micro holes called via holes are formed, and the second conductor layer is printed so that the material used for the second conductor layer is filled into the micro holes. The first conductor layer and the second conductor layer
The conductor layer is connected. Next, a third layer is placed on the second conductor layer.
The insulating layer is printed, dried, and fired, and the layers are stacked using the same procedure as for the second insulating layer and subsequent layers (steps 1 to 11). As shown in Figure 2, the manufacturing method of a multilayer board using the printing multilayer method on a green sheet (b) is as follows: First, the first conductor layer is printed on a ceramic green sheet that will become the substrate after firing. Dry (steps 12 and 13), then print and dry the first insulating layer thereon (steps 14-15), and then print and dry the second conductive layer and second insulating layer (steps 16-15). 19) After that, the same procedure is repeated for the number of layers (steps 12 to 19), and the green sheet, conductor layer, and insulating layer are fired all at once (step 20). In the method for manufacturing a multilayer board using the green sheet lamination multilayer method (c), as shown in FIG. 24) Print and dry conductor layers with different patterns (steps 25 to 30). Next, a desired number of green sheets with different conductor patterns are laminated (step 31), crimped under moderate pressure and temperature (step 32), cut to desired external dimensions, and fired (step 31). 33, 34). Electrical conduction between each conductor layer is achieved by conductors filled in micropores in the green sheet. In both manufacturing methods (b) and (c), the thick film of the top layer is formed after baking the substrate (steps 21 and 35). Comparing the three manufacturing methods (a), (b), and (c), (a)
Although multi-layering is possible with a relatively simple technique, the practical limit on the number of layers is 4 to 6 layers, and a larger number of layers would result in severe surface irregularities and would not be practical. In (b), the process can be streamlined by firing the green sheet, printed insulating layer, and conductive layer at the same time. However, in (b) as well as (a), as the number of layers increases, the surface unevenness increases, so the limit number of layers is still 4.
~6 layers. The number of layers in (c) is theoretically possible to be infinite, and in reality, multilayer substrates with about 30 to 40 layers have been reported. However, their production requires extremely advanced technology and there are many process issues. Among the above three manufacturing methods (a), (b), and (c), the present invention relates to the green sheet lamination multilayer method (c). The prior art will be described in more detail with reference to FIG. First, micropores that will become via holes are formed in different patterns on multiple green sheets made of a mixture of alumina powder and organic matter molded to a predetermined thickness (steps 22 to 24), and conductor layers with different patterns are formed on each green sheet. Print and dry (steps 25-30). W and Mo are mainly used as conductor materials. Filling the via holes with conductor material is done at the same time as the conductor printing process (steps 25 to 27).
Alternatively, the via holes alone are filled with conductive material before the printing process. After the conductors are dried, a predetermined number of green sheets each having a different conductor pattern are laminated (step 31), and the sheets are pressed together at an appropriate temperature (step 32). Next, it is cut into desired external dimensions (step 33) and fired in a reducing atmosphere at about 1600° C. (step 34) to obtain a multilayer substrate.
The fired substrate is thoroughly cleaned and then proceeds to the step of forming a thick film for the uppermost layer (step 35). Problems to be Solved by the Invention However, in the conventional techniques as described above, the firing temperature is high and a reducing atmosphere is used, resulting in high equipment costs and inconvenience in handling. In addition, since alumina is used as the green sheet material and the firing temperature is high, only high melting point metals such as W and Mo can be used as the conductor material, resulting in a problem of high conductor resistance. was. In view of the above problems, the present invention uses Au as a conductor material.
By using low melting point metals with low resistance values such as Ag, Ag/Pd, etc., the firing temperature is low and firing in air is possible, reducing equipment costs and making handling easier. The present invention provides a dielectric composition for a multilayer substrate. Means for Solving the Problems In order to solve the above problems, the dielectric composition of the present invention contains 20 to 60% SiO 2 in terms of oxide,
A basic composition consisting of 5 to 20% ZnO, 10 to 40% BaO, and 2 to 15% of at least one of B 2 O 3 and Sb 2 O 3 (weight%), also calculated in terms of oxide. ,
1 to 6% of at least one of SnO 2 , CaO, MgO, SrO, and PbO, 0.2 to 3% of at least one of K 2 O, Na 2 O, and Li 2 O, and 0.2 to 3% of at least one of Al 2 O 3 and ZrO 2 It contains at least one additive with a composition of 3 to 40% (wt%). Effect The dielectric composition for multilayer substrates of the present invention has a dielectric composition of about 870
It is a material that can be sintered at a low temperature of 980°C to 980°C, and also exhibits sufficient characteristics as a ceramic substrate for forming electronic circuits. By using the material of the present invention, low melting point metal Au,
It becomes possible to use Ag, Ag/Pd, and Cu. Au,
Since Ag and Ag/Pd do not oxidize even in air, a reducing atmosphere is unnecessary, and Au, Ag, and Cu have lower resistance values than W and Mo. Therefore, low-temperature firing in air reduces equipment costs and facilitates handling. The reasons for the limitations in the composition of the present invention are as follows. SiO 2 is the basic composition constituting the substrate and the main material for forming glass. If SiO 2 is less than 20%, the sintering temperature will be high, making it impossible to use low melting point metals such as Ag, Au, Ag/Pd, and Cu as internal conductors.
Moreover, if the SiO 2 content exceeds 60%, the bending strength becomes too small to be practical as a substrate. BaO is a component of glass formation and crystallization.
When BaO is less than 10%, devitrification occurs mainly during glass melting, and the dielectric loss tangent deteriorates. When BaO exceeds 40%, the softening temperature and crystallization temperature become high, and as a result, the sintering temperature becomes too high. ZnO is also a component of glass formation and is the basic composition as a substrate. ZnO is less than 5% and
If ZnO exceeds 20%, it will not be sintered sufficiently densely and will become water absorbent. B 2 O 3 and Sb 2 O 3 are also basic compositions of the substrate structure, and if at least one of B 2 O 3 and Sb 2 O 3 is less than 2%, it becomes water absorbent and has low bending strength. B 2 O 3 ,
If at least one of Sb 2 O 3 exceeds 15%, the ceramic will be significantly deformed during sintering. At least one type of SnO 2 , CaO, MgO, SrO, and PbO is used, usually two or more, for the purpose of improving the sinterability of the substrate, controlling the coefficient of thermal expansion, and improving the dielectric loss tangent.
It is added in a combination of three types. SrO 2 , CaO,
1% of at least one of MgO, SrO, and PdO
If it is less than this, sintering will be insufficient, water absorption will increase, and dielectric loss tangent will increase, which is not preferable.
If at least one of SrO 2 , CaO, MgO, SrO, and PbO exceeds 6%, the dielectric loss tangent becomes large, which is not preferable. The coefficient of thermal expansion is controlled in various ways depending on the use of the substrate, but when used as a normal thick film hybrid integrated circuit, especially when forming a circuit using thick film conductor paste and thick film resistor paste, the coefficient of thermal expansion of alumina is 6.0 to 6.5 × 10. -6 /°C, and when mounting an IC silicon chip directly on a board, the thermal expansion coefficient of silicon is 4 x
Preferably, it corresponds to 10 -6 /°C. It is difficult to judge the quality of a substrate based on the coefficient of thermal expansion alone, but a substrate with a value that is significantly different from both values cannot be put to practical use. K 2 O, Na 2 O, and Li 2 O are added for the purpose of improving the sinterability of the substrate, preventing water absorption, and further suppressing deformation of the substrate. If at least one of K 2 O, Na 2 O, and Li 2 O is less than 0.2%, the substrate deforms significantly.
The board warps significantly. If at least one of K 2 O, Na 2 O, and Li 2 O exceeds 3%, sintering will be insufficient and water absorption will occur. Al 2 O 3 , ZrO 2 are used as fillers for substrates,
It is mainly added to improve bending strength. Al 2 O 3 ,
If at least one of ZrO 2 is less than 3%, the bending strength is too low to be of practical use. Also, Al 2 O 3 C,
If the content of at least one of ZrO 2 exceeds 40%, the sintering temperature will be high and the sintering will be insufficient, resulting in water absorption, and the bending strength will also decrease. Examples Examples of the dielectric composition for multilayer substrates of the present invention will be described below. First, to prepare the glass, weigh each raw material of the basic composition to prepare a batch so that it has the composition shown in Table 1 below.
The mixture is melted by heating at 1500° C. for 1 to 3 hours, and a glass plate is formed by, for example, a roll-out method. Next, the average particle size of this glass plate is measured using an alumina ball, etc.
The dielectric composition of the present invention is produced by preparing a powder of 0.5 to 5 μm and adding additives of approximately the same particle size. Note that the raw material powder used in this case is expressed in terms of oxide for clarity, but it goes without saying that minerals, oxides, carbonates, hydroxides, and other forms can also be used in the usual manner. Next, an example of a method for manufacturing a ceramic multilayer substrate by a green sheet lamination multilayer method using the dielectric composition thus obtained will be described. First, 10 parts by weight of polyvinyl butyral and 6 parts by weight of dibutyl phthalate were added to 100 parts by weight of the above composition.
parts by weight, 0.4 parts by weight of glyceryl monooleate,
20 parts by weight of 1-1-1 trichloroethane and 39 parts by weight of isopropyl alcohol were added and mixed in a ball mill for 24 hours to prepare a slurry. Using this slurry, a green sheet with a thickness of 0.1 mm was produced on a polyester film by the doctor blade method, and after sufficient aging, micropores to serve as via holes were formed by mechanical processing. Next, this via hole was filled with a conductive material by a printing method using a metal mask. The conductor material used was Au, and its melting point was 1062°C. Next, a conductive layer was printed on a green sheet using the same conductive material and dried. via hole pattern,
Multiple green sheets, each with a different printed conductor pattern, were brought together under pressure of 200 kg/cm 2 at a temperature of 80°C. Next, after cutting the outer shape, it was fired at a maximum temperature of 870 to 1340°C for a maximum temperature holding time of 60 minutes. After the fired multilayer substrate was ultrasonically cleaned with pure water, a thick film was formed on the top layer on the front and back sides, and the board was completed to function as an electronic circuit. Table 1 shows the characteristics of the substrates produced by the above manufacturing method according to the composition of the dielectric composition. As for the characteristics, the bending strength, water absorption rate, and dielectric loss tangent were measured for the substrate that functions as an electronic circuit, and the results are shown in Table 1. In addition, the sintering temperature in the same table is determined by estimating the approximate sintering temperature for each composition in advance from differential thermal analysis, and the sintering temperature at which the water absorption rate is 0.0% and the bending strength is maximum. selected. Regarding the presence or absence of warpage deformation, the external shape was visually observed after the substrate was sintered, and those with irregularities and warp undulations on the surface of the substrate, as well as large deformations, were determined to be unsuitable for practical use.

【表】【table】

【表】 * 比較例
参考として第2表に従来の材料である96%
Al2O3の特性を示す。
[Table] * Comparative example For reference, Table 2 shows 96% of conventional materials.
Shows the properties of Al 2 O 3 .

【表】 第1表、第2表、及び以上述べたように、本発
明による組成物は870〜980℃と低温で焼成でき、
しかも電子回路形成用のセラミツク基板としての
特性を充分発揮しており、その特性は従来材料で
ある96%Al2O3に比較し、より優れている。 発明の効果 以上の説明より明らかなように、本発明の材料
を使用することにより低融点金属Au,Ag,
Ag/Pd,Cuの使用が可能となり、Au,Ag,
Ag/Pdは空気中でも酸化しない為還元性雰囲気
は不必要であり、またAu,Ag,Cuは抵抗値が
W,Moよりも小さい。従つて空気中低温焼成に
より設備費用も小さくて済み、取り扱いも簡便に
なる。
[Table] As shown in Table 1 and Table 2, and as described above, the composition according to the present invention can be fired at a low temperature of 870 to 980°C,
Moreover, it fully exhibits the characteristics as a ceramic substrate for forming electronic circuits, and its characteristics are superior to that of the conventional material, 96% Al 2 O 3 . Effects of the invention As is clear from the above explanation, by using the material of the present invention, low melting point metals Au, Ag,
Ag/Pd, Cu can be used, Au, Ag,
Since Ag/Pd does not oxidize even in air, a reducing atmosphere is unnecessary, and Au, Ag, and Cu have smaller resistance values than W and Mo. Therefore, low-temperature firing in air reduces equipment costs and makes handling easier.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はセラミツク焼結体上での印刷多層法に
よる多層基板の製造プロセスを示すフローチヤー
ト、第2図はグリーンシート上での印刷多層法に
よる多層基板の製造プロセスを示すフローチヤー
ト、第3図はグリーンシート積層多層法による多
層基板の製造プロセスを示すフローチヤートであ
る。
Figure 1 is a flowchart showing the manufacturing process of a multilayer board by printing multilayer on a ceramic sintered body, Figure 2 is a flowchart showing the manufacturing process of a multilayer board by printing multilayer on a green sheet, and Figure 3 is a flowchart showing the manufacturing process of a multilayer board by printing multilayer on a green sheet. The figure is a flowchart showing the manufacturing process of a multilayer board using the green sheet lamination multilayer method.

Claims (1)

【特許請求の範囲】 1 酸化物に換算して、 SiO2 20〜60%, ZnO 5〜20%, BaO 10〜40%, B2O3,Sb2O3のうち少なくとも1種2〜15% SnO2,CaO,MgO,SrO,PbOのうち少なくと
も1種1(M)〜6%, K2O,Na2O,Li2Oのうち少なくとも1種0.2〜3
%, Al2O3,ZrO2のうち少なくとも1種3〜40%の組
成(重量%)からなる誘電体組成物。
[Claims] 1. At least one of SiO 2 20-60%, ZnO 5-20%, BaO 10-40%, B 2 O 3 , Sb 2 O 3 2-15 in terms of oxides % At least one of SnO 2 , CaO, MgO, SrO, PbO 1 (M) to 6%, At least one of K 2 O, Na 2 O, Li 2 O 0.2 to 3
%, Al 2 O 3 and ZrO 2 at a composition of 3 to 40% (weight %).
JP60107447A 1985-05-20 1985-05-20 Dielectric composition Granted JPS61266348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60107447A JPS61266348A (en) 1985-05-20 1985-05-20 Dielectric composition

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60107447A JPS61266348A (en) 1985-05-20 1985-05-20 Dielectric composition

Publications (2)

Publication Number Publication Date
JPS61266348A JPS61266348A (en) 1986-11-26
JPH0513100B2 true JPH0513100B2 (en) 1993-02-19

Family

ID=14459381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60107447A Granted JPS61266348A (en) 1985-05-20 1985-05-20 Dielectric composition

Country Status (1)

Country Link
JP (1) JPS61266348A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251688A (en) * 1988-03-31 1989-10-06 Ngk Insulators Ltd Wiring substrate
JP4248165B2 (en) * 2001-06-27 2009-04-02 日本碍子株式会社 Low-temperature fired porcelain and electronic components

Also Published As

Publication number Publication date
JPS61266348A (en) 1986-11-26

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