JPH0512854B2 - - Google Patents
Info
- Publication number
- JPH0512854B2 JPH0512854B2 JP59059468A JP5946884A JPH0512854B2 JP H0512854 B2 JPH0512854 B2 JP H0512854B2 JP 59059468 A JP59059468 A JP 59059468A JP 5946884 A JP5946884 A JP 5946884A JP H0512854 B2 JPH0512854 B2 JP H0512854B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- pressure
- temperature
- electrode
- bonding tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims 2
- 239000000956 alloy Substances 0.000 claims 1
- 229910045601 alloy Inorganic materials 0.000 claims 1
- 238000007796 conventional method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/79—Apparatus for Tape Automated Bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は金属突起物を有するリード群と半導体
素子上の電極群との接続方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of connecting a lead group having metal protrusions and an electrode group on a semiconductor element.
（従来例の構成とその問題点）
本発明者らはフイルムキヤリアを用いた新規な
る実装方式として特願昭56−34799号において転
写バンプ方式を提案した。(Structure of conventional example and its problems) The present inventors proposed a transfer bump method in Japanese Patent Application No. 56-34799 as a new mounting method using a film carrier.
この方式を第１図に従つて説明する。ここでは
接続体１としてフイルムキヤリアを用いる。前記
接続体１には複数本のSnメツキされたCuリード
群２があり、その先端部分には他の基板（図示せ
ず）上に形成されたAu突起物３が転写され接合
している。前記接続体１のリード群２のAu突起
物３と半導体素子４上のAl電極５とを同時に一
活して接続するための方法を示す。半導体素子４
を載置するステージ６があり、その上方に加熱機
能を備えたボンデイングツール７が設置されてい
る。 This method will be explained with reference to FIG. Here, a film carrier is used as the connecting body 1. The connecting body 1 has a plurality of Sn-plated Cu leads 2, and Au protrusions 3 formed on another substrate (not shown) are transferred and bonded to the tips of the groups 2. A method for connecting the Au projections 3 of the lead group 2 of the connection body 1 and the Al electrodes 5 on the semiconductor element 4 at the same time is shown. Semiconductor element 4
There is a stage 6 on which a bonding tool 7 is placed, and a bonding tool 7 with a heating function is installed above the stage 6.
半導体素子４上のAl電極５と複数本の金属リ
ード群２の先端のAu突起物３とを位置合わせし
た後にこれらをボンデイングツール７で加圧し圧
接する。この時ボンデイングツール７の加熱温度
は500℃程度である。接続体１の材料にはポリイ
ミドを用いており、この材料の最高使用温度は
400℃程度であるため、リード群２のAu突起物３
と半導体素子４上の電極群５との接続時にボンデ
イングツール７が接続体１に接近することにより
接続体１は大きく熱変形してしまう。そのためリ
ード群２間のピツチに狂いが生じ、また、リード
群２が半導体素子４のエツヂ部にシヨートするこ
とがあつた。 After aligning the Al electrode 5 on the semiconductor element 4 and the Au protrusion 3 at the tip of the plurality of metal lead groups 2, they are pressurized by the bonding tool 7 and pressed together. At this time, the heating temperature of the bonding tool 7 is about 500°C. Polyimide is used as the material for connecting body 1, and the maximum operating temperature of this material is
Since the temperature is about 400℃, the Au protrusion 3 of lead group 2
When the bonding tool 7 approaches the connecting body 1 during connection with the electrode group 5 on the semiconductor element 4, the connecting body 1 is significantly thermally deformed. As a result, the pitch between the lead groups 2 was distorted, and the lead groups 2 were sometimes shot onto the edge portions of the semiconductor element 4.
従来法による接続時の半導体素子上の温度と半
導体素子に加わる圧力のシーケンス図を第２図に
示す。ボンデイングツール７が半導体素子上に降
下した時をボンデイング開始とし、この時点から
一定の圧力下で半導体素子４上のAl電極５とリ
ード群２の先端部に形成されたAu突起物が加熱
される。 FIG. 2 shows a sequence diagram of the temperature on the semiconductor element and the pressure applied to the semiconductor element during connection by the conventional method. Bonding starts when the bonding tool 7 descends onto the semiconductor element, and from this point on, the Al electrode 5 on the semiconductor element 4 and the Au protrusions formed at the tips of the lead group 2 are heated under constant pressure. .
（発明の目的）
そこで本発明はボンデイングツール７の加熱温
度を低下させ前記欠点を除去する接続方法を提供
するものである。(Objective of the Invention) Therefore, the present invention provides a connection method that reduces the heating temperature of the bonding tool 7 and eliminates the above-mentioned drawbacks.
（発明の構成）
本発明は、基板上に形成した金属突起物をフイ
ルムキヤリアのリード先端部に転写接合し、しか
るのち加熱ツールに第１の圧力を印加した状態で
半導体素子上の電極と前記金属突起物とを加圧
し、その後、第２の圧力を印加してなる接続方法
である。(Structure of the Invention) According to the present invention, metal protrusions formed on a substrate are transferred and bonded to lead tips of a film carrier, and then, while a first pressure is applied to a heating tool, an electrode on a semiconductor element is connected to the metal protrusion formed on a substrate. This is a connection method in which pressure is applied to the metal protrusion, and then a second pressure is applied.
（実施例の説明）
本発明の一実施例のボンデイング方法における
圧力、温度のシーケンスを第３図に従つて説明す
る。なお、半導体素子４、接続体１、ボンデイン
グツール７の位置関係は第１図と同様である。即
ち第１図に示した従来例と同様にリード群２の先
端部のAu突起物３と半導体素子４上のAl電極５
とを位置合せする。その後ンデイングツール７に
より同時に一活して加熱加圧する。この時の加圧
力は従来法の場合に比べてきわめて低いもので、
突起電極と素子上電極がかろうじて接触する程度
で良い。（第３図のａ部分）、この状態で加熱し突
起電極と素子上電極との接合部の温度が合金化温
度に達した後、次に、第２の圧力を印加する。
（第３図のｂ部分）。第２の圧力の大きさは従来法
による場合と同じ程度であり、印加時間は0.1〜
1.5秒である。第２の圧力印加後にボンデイング
を終了する。(Description of Embodiment) The sequence of pressure and temperature in a bonding method according to an embodiment of the present invention will be explained with reference to FIG. Note that the positional relationship among the semiconductor element 4, connection body 1, and bonding tool 7 is the same as that in FIG. That is, as in the conventional example shown in FIG.
Align with. Thereafter, the molding tool 7 simultaneously heats and pressurizes it. The pressure applied at this time is extremely low compared to the conventional method.
It is sufficient that the protruding electrode and the electrode on the element are barely in contact with each other. (Part a in FIG. 3) After heating in this state until the temperature of the joint between the protruding electrode and the electrode on the element reaches the alloying temperature, a second pressure is applied.
(Part b in Figure 3). The magnitude of the second pressure is about the same as in the conventional method, and the application time is 0.1~
It is 1.5 seconds. Bonding is completed after the second pressure is applied.
（発明の効果）
本発明による接続方法ではボンデイングツール
の加熱温度が約400℃程度で良く、従来に比べて
100℃低下をせしめることができる。これにより、
接続体の不用な熱変形を防止でき、リードピツチ
の狂いや、リード群が半導体素子のエツヂ部にシ
ヨートすることがない。(Effects of the Invention) In the bonding method according to the present invention, the heating temperature of the bonding tool is only about 400°C, compared to the conventional method.
It is possible to reduce the temperature by 100℃. This results in
Unnecessary thermal deformation of the connecting body can be prevented, and the lead pitch will not be distorted and the lead group will not be shot onto the edge of the semiconductor element.
第１図は従来例及び本発明における半導体素子
と接続体、ボンデイングツールの位置関係を示す
図である。第２図は従来例における半導体素子上
の温度と加圧力のシーケンス図である。第３図は
本発明による半導体素子上の温度と加圧力のシー
ケンス図である。
１……接続体、２……リード群、３……Au突
起物、４……半導体素子、５……Al電極、６…
…ステージ、７……ボンデイングツール。
FIG. 1 is a diagram showing the positional relationship between a semiconductor element, a connecting body, and a bonding tool in a conventional example and the present invention. FIG. 2 is a sequence diagram of temperature and pressure on a semiconductor element in a conventional example. FIG. 3 is a sequence diagram of temperature and pressure on a semiconductor element according to the present invention. DESCRIPTION OF SYMBOLS 1... Connection body, 2... Lead group, 3... Au protrusion, 4... Semiconductor element, 5... Al electrode, 6...
...Stage, 7...Bonding tool.
Claims (1)
物と半導体素子の電極とを一致させ第１の圧力を
印加して加熱し、続いて第２の圧力を印加するこ
とを特徴とする半導体装置の製造方法。 ２ 第１の圧力を印加した状態で加熱し、接合面
が合金形成温度に達した後に第２の圧力を印加す
ることを特徴とする特許請求の範囲第１項に記載
の半導体装置の製造方法。[Claims] 1. The metal protrusions of a lead group having metal protrusions are brought into alignment with the electrodes of the semiconductor element, and a first pressure is applied to heat the semiconductor element, and then a second pressure is applied. A method for manufacturing a featured semiconductor device. 2. The method for manufacturing a semiconductor device according to claim 1, characterized in that heating is performed while the first pressure is applied, and the second pressure is applied after the bonding surface reaches an alloy forming temperature. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59059468A JPS60206035A (en) | 1984-03-29 | 1984-03-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59059468A JPS60206035A (en) | 1984-03-29 | 1984-03-29 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60206035A JPS60206035A (en) | 1985-10-17 |
| JPH0512854B2 true JPH0512854B2 (en) | 1993-02-19 |
Family
ID=13114167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59059468A Granted JPS60206035A (en) | 1984-03-29 | 1984-03-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60206035A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5081520A (en) * | 1989-05-16 | 1992-01-14 | Minolta Camera Kabushiki Kaisha | Chip mounting substrate having an integral molded projection and conductive pattern |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5751937A (en) * | 1980-09-11 | 1982-03-27 | Honda Motor Co Ltd | Starting failure preventer due to residual fuel in float chamber of carburetor |
| JPS5790955A (en) * | 1980-11-27 | 1982-06-05 | Nec Corp | Manufacture of semiconductor device |
| JPS5892231A (en) * | 1981-11-28 | 1983-06-01 | Mitsubishi Electric Corp | Bonding for semiconductor element |
-
1984
- 1984-03-29 JP JP59059468A patent/JPS60206035A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5751937A (en) * | 1980-09-11 | 1982-03-27 | Honda Motor Co Ltd | Starting failure preventer due to residual fuel in float chamber of carburetor |
| JPS5790955A (en) * | 1980-11-27 | 1982-06-05 | Nec Corp | Manufacture of semiconductor device |
| JPS5892231A (en) * | 1981-11-28 | 1983-06-01 | Mitsubishi Electric Corp | Bonding for semiconductor element |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60206035A (en) | 1985-10-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |