JP3608476B2 - Semiconductor chip mounting circuit board and method for mounting semiconductor chip on circuit board - Google Patents

Semiconductor chip mounting circuit board and method for mounting semiconductor chip on circuit board Download PDF

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JP3608476B2
JP3608476B2 JP2000173957A JP2000173957A JP3608476B2 JP 3608476 B2 JP3608476 B2 JP 3608476B2 JP 2000173957 A JP2000173957 A JP 2000173957A JP 2000173957 A JP2000173957 A JP 2000173957A JP 3608476 B2 JP3608476 B2 JP 3608476B2
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circuit board
semiconductor chip
mounting
connection terminal
protrusion
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JP2001351948A (en
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淳 立田
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Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

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  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は半導体チップが基板に実装された半導体チップ実装回路基板及び基板への半導体チップの実装方法に関するものである。
【０００２】
【従来の技術】
回路基板への半導体チップの実装において、フリップチップ実装では半導体チップとしてその接続用電極部にスタッドバンプを形成したものを用いている。
【０００３】
しかし、スタッドバンプを設けた半導体チップは、コストの高いものとなっており、低コスト化の点で、スタッドバンプが無い半導体チップの利用を可能とすることが求められている。
【０００４】
このために、特開昭６３−２２０５３３号公報や特開平４−１０４４７号公報には、回路基板として成形によって形成されたものを用いるとともに、この成形時に回路基板に形成した突部上に、導電パターンにおける半導体チップが接続される接続端子部を設け、該突部上の接続端子部に半導体チップの電極パッドを接続端子部に設けた導電ペーストや半田や錫メッキ層、あるいは接続端子部と電極パッドとの間に介在させた導電性接着剤などで接続することが示されている。接続端子部が突部上にあるために、フリップチップ実装に際して半導体チップにスタッドバンプを必要としないものである。
【０００５】
【発明が解決しようとする課題】
しかし、導電ペーストや導電性接着剤などによる接続では、接着によるために長期にわたって高い接続信頼性を得ることは困難である。また、半田や錫メッキ層を溶融させる場合は、高い接合力を得られるものの、溶融させるためにかなりの高温が必要であり、半導体チップなどへ熱ダメージを与える虞が非常に高い。
【０００６】
本発明はこのような点に鑑みなされたものであって、その目的とするところは回路基板への半導体チップのフリップチップ実装に際して半導体チップにスタッドバンプを必要とせず、しかも高い接続信頼性を得ることができる半導体チップ実装回路基板及び回路基板への半導体チップ実装方法を提供するにある。
【０００７】
【課題を解決するための手段】
しかして本発明に係る半導体チップ実装回路基板は、回路基板上の導電パターンにおける接続端子部に半導体チップの電極パッドが接続されて半導体チップが回路基板に実装された半導体チップ実装回路基板において、回路基板は表面に突部を有する成形品として形成された成形回路基板であるとともに、導電パターンにおける接続端子部は回路基板の上記突部上に設けられており、回路基板の接続端子部と半導体チップの電極パッドとの接合部は接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を備えていることに特徴を有している。
【０００８】
回路基板に突部を有する成形回路基板を用いることで、スタッドバンプを設けていない半導体チップでも実装することができるものであり、また接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を接合部に備えたものであるために、半導体チップは強固に実装されたものとなる。
【０００９】
接続端子部である突部上の導電パターンは、そのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっていることが好ましい。
【００１０】
また本発明に係る回路基板への半導体チップ実装方法は、回路基板として表面に突部を有する成形品として形成されるとともに外面に導電パターンが形成された成形回路基板を用いるとともに上記導電パターンにおける上記突部上に位置する部分を接続端子部とし、半導体チップの電極パッドを接続端子部に突き合わせた状態で半導体チップと回路基板とを加圧すると同時に超音波を付加して接続端子部と電極パッドとを接合するとともにこの接合部に接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を形成することに特徴を有している。スタッドバンプを有していない半導体チップの回路基板への実装を高温に曝すことなく確実に行うことができる。
【００１１】
この場合の回路基板としては、接続端子部である突部上の導電パターンのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっているものを好適に用いることができる。
【００１２】
半導体チップと回路基板との加圧時に加熱も行うことが好ましい。より確実に合金からなる接合層を形成することができる。この加熱は、半導体チップ側から行うとよい。
【００１３】
超音波は半導体チップ側から付加するほか、突部の側面に超音波振動子を接触させて行ったり、成形品における半導体チップ実装面と反対側の面で突部に対応する位置から付与することが好ましい。
【００１４】
また、加圧時の圧力で回路基板の突部を塑性変形させたり、成形品における突部が位置する面に加圧部材の平面を押し当てて突部を塑性変形させておき、しかる後に半導体チップの接合を行うと、複数の突部で背の高さにばらつきがある場合、これを吸収することができる。
【００１５】
塑性変形させる突部は、先端ほど細くなっていたり、先端ほど細く且つ先端面が平面となっていることが好ましい。
【００１６】
また、回路基板と半導体チップ間に絶縁樹脂を配する場合、回路基板上に絶縁樹脂を塗布した後、回路基板の接続端子部に半導体チップの電極パッドを突き合わせて半導体チップと回路基板とを加熱加圧すると同時に超音波を付加して前記接続端子部と電極パッドとを接合するとともに回路基板と半導体チップ間に位置する上記絶縁樹脂を硬化させるとよい。接合層の形成とともに絶縁樹脂を硬化させることができる。
【００１７】
【発明の実施の形態】
以下本発明を実施の形態の一例に基づいて詳述すると、図１は半導体チップ２とこれを実装する回路基板１とを示している。ここにおける回路基板１は、ポリフタルアミド樹脂などの射出成形品１０上に銅スパッタリング法によって形成した銅薄膜に対して、レーザー加工を行うことで回路として必要な部分と不必要な部分とを分離し、電気メッキによって回路として必要な部分にのみメッキを施すことで立体的な電気的配線としての導電パターン１１を施した成形回路基板（ＭＩＤ：Ｍｏｌｄｅｄ Ｉｎｔｅｒｃｏｎｎｅｃｔｉｏｎ Ｄｅｖｉｃｅ、立体回路基板とも称されている）であり、上記導電パターン１１における半導体チップ２の実装用の接続端子部１２は、成形品１０の成形時に形成した突部１５上に形成してある。
【００１８】
そして半導体チップ２は、その電極パッド２０にスタッドバンプが設けられていないものであるとともに、回路基板１の接続端子部１２への接続が半田付けや導電ペーストで行われたものではなく、電極パッド２０を接続端子部１２に突き合わせた状態で半導体チップ２と回路基板１とを加圧（好ましくは加熱も）するとともに超音波を付与することにより、接続端子部１２を形成している導電パターン１１の導電性金属（たとえばＡｕ）と電極パッド２０を形成している導電性金属（たとえばＡｌ）との合金で形成された接合層を形成することでなされている。なお、半導体チップ２と回路基板１との間の空隙には、上記接合後に熱硬化性絶縁樹脂３を充填硬化させておく。
【００１９】
ここにおいて、上記突部１５はその高さ及び幅が夫々１００μｍ程度の微小なものであり、各接続端子部１２毎に個別に設けられているが、複数の接続端子部１２が列となって並んでいる場合、凸条としての突部１５を形成して、単一の凸条の突部１５上に複数個の接続端子部１２が並んでいるものとしてもよい。ただし、後述するように、半導体チップ２の接合時に突部１５を塑性変形させる場合は、接続端子部１２毎に個別の突部１５を設けたもののほうが好ましい。
【００２０】
回路基板１の導電パターン１１は、通常、厚さ５〜１０μｍ厚の銅メッキの上に厚さ５〜１０μｍ厚のニッケルメッキを介して厚さ０．３〜０．５μｍ程度の金メッキを施したものとして形成するが、上記合金である接合層の形成の点からは、突部１５先端面上の最表層のメッキ層、つまり金メッキ層はそのメッキ厚みが図２に示すように、他の部分におけるメッキ厚みより大となっていることが好ましい。たとえば、他の部分におけるメッキ厚みが０．３〜０．５μｍであれば、０．５〜３μｍ程度の厚みにする。このような厚みのものにしておけば、きわめて高い接続信頼性を有する接合層を形成することができる。金の使用量を減らすために、他の部分における金メッキ層を酸化防止用の０．１〜０．２μｍ厚程度のものにしている時には、突部１５先端面上の最表層の金メッキ層は、０．３〜０．５μｍ厚とする。この厚みでも後述するように超音波を付与しての接合であれば、高い接続信頼性を得られる接合層を形成することができる。
【００２１】
上記のようなメッキ厚みの制御は、メッキ時にメッキ電流値を上げることで行う。通常１〜２Ａ／ｄｍ２であるメッキ電流値を３〜４Ａ／ｄｍ２に上げれば、突部１５に電解集中することで突部１５先端面へのメッキだけその厚みを大きくすることができる。
【００２２】
接続端子部１２と電極パッド２０との接合時に合金からなる接合層が生じるようにするには、導電パターン１１（接続端子部１２）が０．５μｍ厚程度の金メッキで形成され、電極パッド２０がＡｌで形成されている場合、加圧は一つの接続端子部１２につき１００〜２００ｇ程度、好ましくは１５０ｇ程度の圧力を加えるものとし、加熱も行う場合には１２０〜１７０℃程度の熱を加えるものとする。そして、５０〜２００ｋＨｚ、好ましくは１００ｋＨｚ程度の周波数の超音波振動を半導体チップ２を押圧する加圧子（図示せず）を通じて与える。加熱も半導体チップ２を押圧する加圧子を通じて行うのが好ましい。
【００２３】
超音波振動の付与は、図３（ａ）に示すように突部１５の側面に超音波振動子４を接触させて行ったり、図３（ｂ）に示すように、回路基板１における半導体チップ２の実装面と反対側の面で突部１５に対応する位置から行ってもよい。いずれの場合も、接合させるべき部分に超音波を確実に伝搬させることができる。特に、図３（ｂ）に示すように、回路基板１の裏面側で突部１５に対応する位置に凹所を形成して、凹所底面に超音波振動子４を当接させると良好な結果を得ることができる。
【００２４】
加圧は、単に合金である接合層を形成するためだけではなく、回路基板１の突部１５を塑性変形させるためのものとするのも好ましい。図４に示すように、回路基板１の成形時に突部１５の高さにばらつきが生じても、半導体チップ２の接合時の加圧によって突部１５を塑性変形させることで、高さを揃えることができるものであり、また、逆に半導体チップ２の複数の電極パッド２０に上記高さ方向におけるばらつきがあっても、これを抑えることができる。
【００２５】
突部１５を塑性変形させることは、半導体チップ２の実装時にではなく、実装に先立って、図５に示すように、回路基板１の突部１５が位置する面に加圧部材６の平面を押し当てて突部１５を塑性変形させておき、しかる後に半導体チップ２の接合を行うようにしてもよい。この場合においても、複数の突部１５で背の高さにばらつきがある場合、これを吸収することができる。
【００２６】
塑性変形させる突部１５は、図６に示すように、先端ほど細くなっているものとすると、低荷重で突部１５を塑性変形させることができることになって、半導体チップ２の実装時の加圧で塑性変形させる場合、半導体チップ２に与えるダメージを低減させることができる。また、図７に示すように先端ほど細く且つ先端面が平面となっているものとすると、低荷重化に加えて、半導体チップ実装荷重に対する突部１５形状の安定化や回路基板１の成形時の金型からの抜け性を向上させることができる。
【００２７】
導電パターン１１の厚み（殊に接続端子部１２の厚み）は、たとえば銅メッキを５μｍ程度、ニッケルメッキを５μｍ程度、金メッキを０．３〜０．５μｍ程度と通常より薄くしておくことも、突部１５の塑性変形を容易にすることになる。
【００２８】
図８に他例を示す。これは半導体チップ２と回路基板１との間に配する熱硬化性の絶縁樹脂３を上記接合完了後に充填硬化させるのではなく、予め回路基板１上に塗布しておき、その後、回路基板１の接続端子部１２に半導体チップ２の電極パッド２０を突き合わせて半導体チップ２と回路基板１とを加熱加圧すると同時に超音波を付加する。超音波接合は１秒以下で終了し、この終了時点では絶縁樹脂３は一部硬化を始めたものの硬化が完了するまでには至っていないことから、超音波の付与後も絶縁樹脂３が硬化完了するまでの数秒間、加圧及び加熱を継続する。このように、接合層の形成に際して絶縁樹脂３の硬化も行わせることができる上に、絶縁樹脂３の塗布作業そのものも容易となるために、生産性を高めることができる。
【００２９】
上記絶縁樹脂３の塗布時には、絶縁樹脂３が接続端子部１２上に被さっていてもよい。半導体チップ２を重ねて加圧する際に接続端子部１２上の絶縁樹脂３は電極パッド２０と接続端子部１２との間から押し出されてしまうために、電極パッド２０と接続端子部１２との超音波接合に問題が生じることはない。また、塗布時に絶縁樹脂３が接続端子部１２上に被さらないようにしていてもよいが、被さるように塗布しておくほうが、絶縁樹脂３を硬化させた時点での接着力や密閉性が向上する。
【００３０】
【発明の効果】
以上のように本発明の半導体チップ実装回路基板は、表面に突部を有する成形品として形成された成形回路基板である回路基板の導電パターンにおける接続端子部は上記突部上に設けられ、回路基板の接続端子部と半導体チップの電極パッドとの接合部は接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を備えているものであり、回路基板が突部を有する成形回路基板であるために、スタッドバンプを設けていない半導体チップでも実装することができるものであり、このためにコストを下げることができる上に、接合部に接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を備えたものであるために、半導体チップは強固に実装されたものとなり、高い接続信頼性を持つものである。
【００３１】
接続端子部である突部上の導電パターンは、そのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっていることが、良好な接合層を得ることができる点で好ましい。
【００３２】
また本発明に係る回路基板への半導体チップ実装方法は、回路基板として表面に突部を有する成形品として形成されるとともに外面に導電パターンが形成された成形回路基板を用いるとともに上記導電パターンにおける上記突部上に位置する部分を接続端子部とし、半導体チップの電極パッドを接続端子部に突き合わせた状態で半導体チップと回路基板とを加圧すると同時に超音波を付加して接続端子部と電極パッドとを接合するとともにこの接合部に接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を形成することから、スタッドバンプを有していない半導体チップの回路基板への実装を確実に且つ強固に行うことができるものであり、殊に超音波接合で接合層を形成することから、半導体チップや回路基板を高温に曝す必要がなく、熱ダメージを与えてしまうことがないものである。また、接続端子部に導電性接着剤などを塗布する必要もないことから、工程数も少なくてすむものである。
【００３３】
この場合の回路基板としては、接続端子部である突部上の導電パターンのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっているものを用いることで、良好な接合層を得ることができるものとなる。
【００３４】
半導体チップと回路基板との加圧時に加熱も行うことで接合をより確実に行うことができ、この加熱を半導体チップ側から行うのが簡便で良い。
【００３５】
超音波は半導体チップ側から付加するのが簡便で良いが、突部の側面に超音波振動子を接触させて行ったり、成形品における半導体チップ実装面と反対側の面で突部に対応する位置から付与することによっても、接合部に超音波振動を確実に伝搬することができるために、確実な接合を行うことができる。
【００３６】
また、加圧時の圧力で回路基板の突部を塑性変形させたり、成形品における突部が位置する面に加圧部材の平面を押し当てて突部を塑性変形させておき、しかる後に半導体チップの接合を行うと、複数の突部で背の高さにばらつきがある場合、これを吸収することができて、接合不良を招くことがなくなる。殊に後者においては、半導体チップへの加圧によるダメージを低減させることができる。
【００３７】
塑性変形させる突部が先端ほど細くなっていると、塑性変形を低荷重で得られる点で良好な結果を得ることができるとともに、半導体チップへの加圧によるダメージを低減させることができる。さらに突部が先端ほど細く且つ先端面が平面となっていると、上記に加えて突部形状の安定化、つまりは接合部の安定化を図ることができる。
【００３８】
また、回路基板と半導体チップ間に絶縁樹脂を配する場合、回路基板上に絶縁樹脂を塗布した後、回路基板の接続端子部に半導体チップの電極パッドを突き合わせて半導体チップと回路基板とを加熱加圧すると同時に超音波を付加して前記接続端子部と電極パッドとを接合するとともに回路基板と半導体チップ間に位置する上記絶縁樹脂を硬化させることで、接合層の形成に際して絶縁樹脂の硬化も行わせることができるものであり、絶縁樹脂の塗布作業も容易となることもあって、生産性を高めることができるほか、接合時の絶縁樹脂の硬化接着は、半導体チップの結合強度を補充して接合信頼性をさらに高めることにもなる。
【図面の簡単な説明】
【図１】本発明の実施の形態の一例の説明図である。
【図２】同上の他例の拡大断面図である。
【図３】（ａ）（ｂ）は夫々超音波振動の付与に関する説明図である。
【図４】別の例の説明図である。
【図５】さらに別の例の説明図である。
【図６】突部形状に関する説明図である。
【図７】他の突部形状に関する説明図である。
【図８】他例の説明図である。
【符号の説明】
１ 回路基板
２ 半導体チップ
１１ 導電パターン
１２ 接続端子部
１５ 突部
２０ 電極パッド[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor chip mounting circuit board in which a semiconductor chip is mounted on a substrate and a method for mounting the semiconductor chip on the substrate.
[0002]
[Prior art]
In mounting a semiconductor chip on a circuit board, flip chip mounting uses a semiconductor chip in which stud bumps are formed on the connecting electrode portion.
[0003]
However, a semiconductor chip provided with stud bumps is expensive, and it is required to use a semiconductor chip without stud bumps in terms of cost reduction.
[0004]
For this reason, in Japanese Patent Laid-Open Nos. 63-220533 and 4-10447, a circuit board formed by molding is used, and a conductive material is formed on the protrusion formed on the circuit board at the time of molding. Conductive paste or solder or tin-plated layer, or a connection terminal portion and an electrode provided with a connection terminal portion to which the semiconductor chip in the pattern is connected, and an electrode pad of the semiconductor chip provided on the connection terminal portion on the protrusion It is shown that connection is made with a conductive adhesive or the like interposed between the pads. Since the connection terminal portion is on the protrusion, the stud bump is not required for the semiconductor chip in flip chip mounting.
[0005]
[Problems to be solved by the invention]
However, in connection with a conductive paste or a conductive adhesive, it is difficult to obtain high connection reliability over a long period because of adhesion. Further, when melting a solder or tin plating layer, a high bonding force can be obtained, but a considerably high temperature is required for melting, and there is a very high possibility of causing thermal damage to a semiconductor chip or the like.
[0006]
The present invention has been made in view of the above points, and the object of the present invention is to eliminate the need for stud bumps on the semiconductor chip when flip-chip mounting the semiconductor chip onto the circuit board, and to obtain high connection reliability. The present invention provides a semiconductor chip mounting circuit board and a method for mounting a semiconductor chip on the circuit board.
[0007]
[Means for Solving the Problems]
Thus, a semiconductor chip mounting circuit board according to the present invention includes a circuit chip in which a semiconductor chip electrode pad is connected to a connection terminal portion in a conductive pattern on the circuit board and the semiconductor chip is mounted on the circuit board. together with the substrate is a molded circuit board formed as a molded article having a protruding portion on the surface, the connecting terminal portions of the conductive pattern is provided on the projecting portion of the circuit board, connection terminals of the circuit board and the semiconductor chip The bonding portion with the electrode pad includes a bonding layer formed of an alloy of the conductive metal forming the connection terminal portion and the conductive metal forming the electrode pad. Yes.
[0008]
By using a molded circuit board with protrusions on the circuit board, it is possible to mount even semiconductor chips without stud bumps, and form conductive metal and electrode pads that form connection terminal parts. Since the bonding portion formed of an alloy with the conductive metal is provided at the bonding portion, the semiconductor chip is firmly mounted.
[0009]
It is preferable that the conductive pattern on the protrusion which is the connection terminal portion has a plating thickness larger than the plating thickness of the portion in the non-connection terminal portion.
[0010]
The semiconductor chip mounting method to a circuit board according to the present invention, the above in the conductive pattern with use of the molded circuit board having conductive patterns formed on the outer surface while being formed as a molded article having a protruding portion on a surface as a circuit board The portion located on the protrusion is used as a connection terminal portion, and the semiconductor chip and the circuit board are pressed while the electrode pad of the semiconductor chip is in contact with the connection terminal portion, and at the same time, an ultrasonic wave is applied to connect the connection terminal portion and the electrode pad. And a bonding layer formed of an alloy of the conductive metal forming the connection terminal portion and the conductive metal forming the electrode pad. Yes. Mounting of the semiconductor chip having no stud bump on the circuit board can be reliably performed without being exposed to a high temperature.
[0011]
As the circuit board in this case, a circuit board in which the plating thickness of the conductive pattern on the protrusion as the connection terminal portion is larger than the plating thickness of the portion in the non-connection terminal portion can be suitably used.
[0012]
It is also preferable to perform heating when the semiconductor chip and the circuit board are pressurized. A bonding layer made of an alloy can be formed more reliably. This heating is preferably performed from the semiconductor chip side.
[0013]
In addition to applying ultrasonic waves from the semiconductor chip side, ultrasonic waves should be applied to the side surfaces of the protrusions, or from the position corresponding to the protrusions on the surface of the molded product opposite to the semiconductor chip mounting surface. Is preferred.
[0014]
In addition, the protrusion of the circuit board is plastically deformed by the pressure at the time of pressurization, or the protrusion is plastically deformed by pressing the flat surface of the pressing member against the surface where the protrusion is located in the molded product, and then the semiconductor When the chips are joined, if there are variations in the height of the plurality of protrusions, this can be absorbed.
[0015]
The protrusion to be plastically deformed is preferably thinner at the tip, or thinner at the tip and a flat tip surface.
[0016]
Also, when an insulating resin is disposed between the circuit board and the semiconductor chip, after applying the insulating resin on the circuit board, the semiconductor chip electrode pad is abutted against the connection terminal portion of the circuit board to heat the semiconductor chip and the circuit board. At the same time as applying pressure, an ultrasonic wave is applied to join the connection terminal portion and the electrode pad, and the insulating resin located between the circuit board and the semiconductor chip may be cured. The insulating resin can be cured together with the formation of the bonding layer.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail based on an embodiment. FIG. 1 shows a semiconductor chip 2 and a circuit board 1 on which the semiconductor chip 2 is mounted. The circuit board 1 here separates a necessary part and an unnecessary part as a circuit by performing laser processing on a copper thin film formed by a copper sputtering method on an injection molded product 10 such as a polyphthalamide resin. Then, a molded circuit board (also referred to as a MID: Molded Interconnect Device, also referred to as a three-dimensional circuit board) is provided with a conductive pattern 11 as a three-dimensional electric wiring by plating only a necessary portion as a circuit by electroplating. The connection terminal portion 12 for mounting the semiconductor chip 2 in the conductive pattern 11 is formed on the protrusion 15 formed when the molded product 10 is molded.
[0018]
The semiconductor chip 2 is not provided with stud bumps on the electrode pads 20 and is not connected to the connection terminal portions 12 of the circuit board 1 by soldering or conductive paste. With the semiconductor chip 2 and the circuit board 1 pressed (preferably also heated) in a state where 20 is abutted against the connection terminal portion 12 and applying ultrasonic waves, the conductive pattern 11 forming the connection terminal portion 12 is formed. This is done by forming a bonding layer made of an alloy of a conductive metal (for example, Au) and a conductive metal (for example, Al) forming the electrode pad 20. The gap between the semiconductor chip 2 and the circuit board 1 is filled and cured with the thermosetting insulating resin 3 after the joining.
[0019]
Here, the protrusion 15 has a very small height and width of about 100 μm, and is provided individually for each connection terminal portion 12, but the plurality of connection terminal portions 12 are arranged in a row. When lined up, the protrusions 15 as ridges may be formed, and a plurality of connection terminal portions 12 may be lined up on the protrusions 15 of a single ridge. However, as will be described later, when the protrusion 15 is plastically deformed when the semiconductor chip 2 is joined, it is preferable to provide the individual protrusion 15 for each connection terminal portion 12.
[0020]
The conductive pattern 11 of the circuit board 1 is usually plated with gold having a thickness of about 0.3 to 0.5 μm on a copper plating having a thickness of 5 to 10 μm via nickel plating having a thickness of 5 to 10 μm. However, from the viewpoint of forming the bonding layer made of the above-mentioned alloy, the outermost plating layer on the tip surface of the protrusion 15, that is, the gold plating layer has a plating thickness other than that shown in FIG. It is preferable that the thickness is larger than the plating thickness. For example, if the plating thickness in the other part is 0.3 to 0.5 μm, the thickness is set to about 0.5 to 3 μm. With such a thickness, a bonding layer having extremely high connection reliability can be formed. In order to reduce the amount of gold used, the outermost gold plating layer on the tip surface of the protrusion 15 is as follows when the gold plating layer in the other part is made about 0.1 to 0.2 μm thick for oxidation prevention. The thickness is 0.3 to 0.5 μm. Even with this thickness, as will be described later, if bonding is performed by applying ultrasonic waves, a bonding layer capable of obtaining high connection reliability can be formed.
[0021]
The control of the plating thickness as described above is performed by increasing the plating current value during plating. If the plating current value, which is usually 1 to 2 A / dm 2 , is increased to 3 to 4 A / dm 2 , the electrolytic concentration on the protrusion 15 can increase the thickness of only the plating on the tip surface of the protrusion 15.
[0022]
In order to form a bonding layer made of an alloy when the connection terminal portion 12 and the electrode pad 20 are bonded, the conductive pattern 11 (connection terminal portion 12) is formed by gold plating having a thickness of about 0.5 μm. In the case of being formed of Al, pressurization is performed by applying a pressure of about 100 to 200 g, preferably about 150 g per connection terminal portion 12, and when heating is also performed, heat of about 120 to 170 ° C. is applied. And Then, ultrasonic vibration having a frequency of about 50 to 200 kHz, preferably about 100 kHz is applied through a pressurizer (not shown) that presses the semiconductor chip 2. Heating is also preferably performed through a pressurizer that presses the semiconductor chip 2.
[0023]
The application of ultrasonic vibration is performed by bringing the ultrasonic transducer 4 into contact with the side surface of the protrusion 15 as shown in FIG. 3A, or the semiconductor chip on the circuit board 1 as shown in FIG. 3B. You may carry out from the position corresponding to the protrusion 15 in the surface on the opposite side to 2 mounting surfaces. In either case, the ultrasonic wave can be reliably propagated to the portions to be joined. In particular, as shown in FIG. 3 (b), it is preferable to form a recess at a position corresponding to the protrusion 15 on the back surface side of the circuit board 1 and bring the ultrasonic transducer 4 into contact with the bottom surface of the recess. The result can be obtained.
[0024]
The pressurization is preferably not only for forming a bonding layer made of an alloy but also for plastic deformation of the protrusion 15 of the circuit board 1. As shown in FIG. 4, even when the height of the protrusion 15 varies during the molding of the circuit board 1, the height is made uniform by plastically deforming the protrusion 15 by pressurization when the semiconductor chip 2 is joined. On the contrary, even if the plurality of electrode pads 20 of the semiconductor chip 2 have variations in the height direction, this can be suppressed.
[0025]
The plastic deformation of the protrusion 15 is not performed when the semiconductor chip 2 is mounted, but prior to mounting, the plane of the pressure member 6 is placed on the surface of the circuit board 1 where the protrusion 15 is located, as shown in FIG. The protrusion 15 may be plastically deformed by pressing, and then the semiconductor chip 2 may be joined. Even in this case, if the height of the plurality of protrusions 15 varies, this can be absorbed.
[0026]
As shown in FIG. 6, if the protrusion 15 to be plastically deformed is thinner toward the tip, the protrusion 15 can be plastically deformed with a low load. When plastically deforming with pressure, damage to the semiconductor chip 2 can be reduced. As shown in FIG. 7, assuming that the tip is thinner and the tip surface is flat, in addition to reducing the load, the shape of the protrusion 15 with respect to the semiconductor chip mounting load is stabilized and the circuit board 1 is molded. Can be easily removed from the mold.
[0027]
The thickness of the conductive pattern 11 (especially the thickness of the connection terminal portion 12) can be made thinner than usual, for example, copper plating is about 5 μm, nickel plating is about 5 μm, and gold plating is about 0.3 to 0.5 μm. This facilitates plastic deformation of the protrusion 15.
[0028]
FIG. 8 shows another example. In this method, the thermosetting insulating resin 3 disposed between the semiconductor chip 2 and the circuit board 1 is not filled and cured after the completion of the joining, but is applied to the circuit board 1 in advance, and then the circuit board 1 The electrode pads 20 of the semiconductor chip 2 are brought into contact with the connection terminal portions 12 to heat and pressurize the semiconductor chip 2 and the circuit board 1 and simultaneously apply ultrasonic waves. Ultrasonic bonding is completed in less than 1 second. At this point, the insulating resin 3 has partially cured, but has not yet been cured. Therefore, the insulating resin 3 is completely cured even after application of ultrasonic waves. Continue pressurization and heating for a few seconds to complete. In this way, the insulating resin 3 can be cured when the bonding layer is formed, and the application operation of the insulating resin 3 itself is facilitated, so that productivity can be increased.
[0029]
When the insulating resin 3 is applied, the insulating resin 3 may be covered on the connection terminal portion 12. When the semiconductor chip 2 is stacked and pressed, the insulating resin 3 on the connection terminal portion 12 is pushed out from between the electrode pad 20 and the connection terminal portion 12. There is no problem with sonic bonding. In addition, the insulating resin 3 may not be covered on the connection terminal portion 12 at the time of application. However, if the insulating resin 3 is applied so as to be covered, the adhesive force and the sealing performance at the time of curing the insulating resin 3 are improved. improves.
[0030]
【The invention's effect】
The semiconductor chip mounting circuit board of the present invention as described above, a connection terminal portion in the conductive pattern of the circuit board is a molded circuit board formed as a molded article having a protruding portion on the surface is provided on the projecting portion, the circuit A joint portion between the connection terminal portion of the substrate and the electrode pad of the semiconductor chip includes a joint layer formed of an alloy of the conductive metal forming the connection terminal portion and the conductive metal forming the electrode pad. Since the circuit board is a molded circuit board having protrusions, it can be mounted even on a semiconductor chip not provided with stud bumps. for those having a bonding layer formed of an alloy of the conductive metal forming the conductive metal and the electrode pad forming a connection terminal portion to the joint portion, the semiconductor chip is firmly actual It becomes what is, and has high connection reliability.
[0031]
It is preferable that the conductive pattern on the projecting portion which is the connecting terminal portion has a plating thickness larger than the plating thickness of the portion in the non-connecting terminal portion in that a good bonding layer can be obtained.
[0032]
The semiconductor chip mounting method to a circuit board according to the present invention, the above in the conductive pattern with use of the molded circuit board having conductive patterns formed on the outer surface while being formed as a molded article having a protruding portion on a surface as a circuit board The portion located on the protrusion is used as a connection terminal portion, and the semiconductor chip and the circuit board are pressed while the electrode pad of the semiconductor chip is in contact with the connection terminal portion, and at the same time, an ultrasonic wave is applied to connect the connection terminal portion and the electrode pad. And a bonding layer formed of an alloy of the conductive metal forming the connection terminal portion and the conductive metal forming the electrode pad is formed at the bonded portion. It is possible to reliably and firmly mount an unsemiconductor semiconductor chip on a circuit board, and in particular, by forming a bonding layer by ultrasonic bonding. The semiconductor chip and the circuit board need not be exposed to high temperatures, those that do not accidentally giving thermal damage. Further, since there is no need to apply a conductive adhesive or the like to the connection terminal portion, the number of steps can be reduced.
[0033]
As a circuit board in this case, a good bonding layer is obtained by using a circuit board having a conductive pattern on the projection which is the connection terminal portion having a plating thickness larger than the plating thickness of the portion in the non-connection terminal portion. Will be able to.
[0034]
Bonding can be performed more reliably by performing heating at the time of pressurization of the semiconductor chip and the circuit board, and it is convenient to perform this heating from the semiconductor chip side.
[0035]
It is easy to add ultrasonic waves from the semiconductor chip side, but it can be done by contacting an ultrasonic transducer on the side surface of the protrusion, or it corresponds to the protrusion on the surface opposite to the semiconductor chip mounting surface in the molded product Also by applying from the position, the ultrasonic vibration can be reliably propagated to the bonded portion, so that reliable bonding can be performed.
[0036]
In addition, the protrusion of the circuit board is plastically deformed by the pressure at the time of pressurization, or the protrusion is plastically deformed by pressing the flat surface of the pressing member against the surface where the protrusion is located in the molded product, and then the semiconductor When the chips are joined, if there are variations in the height of the plurality of protrusions, this can be absorbed, and joining defects will not be caused. Particularly in the latter case, damage to the semiconductor chip due to pressurization can be reduced.
[0037]
When the protrusion to be plastically deformed becomes thinner toward the tip, good results can be obtained in that plastic deformation can be obtained with a low load, and damage due to pressurization to the semiconductor chip can be reduced. Further, when the protrusion is thinner toward the tip and the tip surface is flat, in addition to the above, the shape of the protrusion can be stabilized, that is, the joint can be stabilized.
[0038]
Also, when an insulating resin is disposed between the circuit board and the semiconductor chip, after applying the insulating resin on the circuit board, the semiconductor chip electrode pad is abutted against the connection terminal portion of the circuit board to heat the semiconductor chip and the circuit board. At the same time as applying pressure, an ultrasonic wave is applied to bond the connection terminal portion and the electrode pad, and the insulating resin located between the circuit board and the semiconductor chip is cured, so that the insulating resin can be cured when the bonding layer is formed. In addition to improving the productivity by applying insulating resin, the insulating resin can be hardened and bonded to the bonding strength of the semiconductor chip. This will further increase the bonding reliability.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of an example of an embodiment of the present invention.
FIG. 2 is an enlarged cross-sectional view of another example of the above.
FIGS. 3A and 3B are explanatory diagrams relating to application of ultrasonic vibration.
FIG. 4 is an explanatory diagram of another example.
FIG. 5 is an explanatory diagram of still another example.
FIG. 6 is an explanatory diagram relating to a protrusion shape.
FIG. 7 is an explanatory diagram relating to another protrusion shape.
FIG. 8 is an explanatory diagram of another example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Circuit board 2 Semiconductor chip 11 Conductive pattern 12 Connection terminal part 15 Projection part 20 Electrode pad

Claims (14)

回路基板上の導電パターンにおける接続端子部に半導体チップの電極パッドが接続されて半導体チップが回路基板に実装された半導体チップ実装回路基板において、回路基板は表面に突部を有する成形品として形成された成形回路基板であるとともに、導電パターンにおける接続端子部は回路基板の上記突部上に設けられており、回路基板の接続端子部と半導体チップの電極パッドとの接合部は接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を備えていることを特徴とする半導体チップ実装回路基板。In a semiconductor chip mounting circuit board in which an electrode pad of a semiconductor chip is connected to a connection terminal portion in a conductive pattern on a circuit board and the semiconductor chip is mounted on the circuit board, the circuit board is formed as a molded product having protrusions on the surface. formed with a molded circuit board, the connecting terminal portion in the conductive pattern is provided on the projecting portion of the circuit board, the bonding portion between the electrode pad of the connection terminal portion and the semiconductor chip of the circuit board connection terminal portions A semiconductor chip mounting circuit board, comprising: a bonding layer formed of an alloy of a conductive metal and an conductive metal forming an electrode pad. 接続端子部である突部上の導電パターンは、そのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっていることを特徴とする請求項１記載の半導体チップ実装回路基板。2. The semiconductor chip mounted circuit board according to claim 1, wherein the conductive pattern on the protruding portion which is the connection terminal portion has a plating thickness larger than a plating thickness of a portion in the non-connection terminal portion. 回路基板として表面に突部を有する成形品として形成されるとともに外面に導電パターンが形成された成形回路基板を用いるとともに上記導電パターンにおける上記突部上に位置する部分を接続端子部とし、半導体チップの電極パッドを接続端子部に突き合わせた状態で半導体チップと回路基板とを加圧すると同時に超音波を付加して接続端子部と電極パッドとを接合するとともにこの接合部に接続端子部を形成している導電性金属と電極パッドを形成している導電性金属との合金で形成された接合層を形成することを特徴とする回路基板への半導体チップの実装方法。And portions connecting terminal portion located on the projecting portion of the conductive pattern with use of the molded circuit board having conductive patterns formed on the outer surface while being formed as a molded article having a protruding portion on a surface as a circuit board, a semiconductor chip The semiconductor chip and the circuit board are pressed while the electrode pads are abutted with the connection terminal portions, and at the same time, ultrasonic waves are applied to join the connection terminal portions and the electrode pads, and the connection terminal portions are formed at the joint portions. A method of mounting a semiconductor chip on a circuit board, comprising: forming a bonding layer made of an alloy of a conductive metal forming an electrode pad and a conductive metal forming an electrode pad. 回路基板として、接続端子部である突部上の導電パターンは、そのメッキ厚みが非接続端子部における部分のメッキ厚みより大となっているものを用いることを特徴とする請求項３記載の回路基板への半導体チップの実装方法。4. The circuit according to claim 3, wherein the conductive pattern on the projecting portion which is the connection terminal portion is a circuit board whose plating thickness is larger than the plating thickness of the portion in the non-connection terminal portion. A method of mounting a semiconductor chip on a substrate. 半導体チップと回路基板との加圧時に加熱も行うことを特徴とする請求項３または４記載の回路基板への半導体チップの実装方法。5. The method of mounting a semiconductor chip on a circuit board according to claim 3, wherein heating is also performed when the semiconductor chip and the circuit board are pressurized. 半導体チップ側から加熱を行うことを特徴とする請求項５記載の回路基板への半導体チップの実装方法。6. The method of mounting a semiconductor chip on a circuit board according to claim 5, wherein heating is performed from the semiconductor chip side. 超音波は半導体チップ側から付加することを特徴とする請求項３〜６のいずれかの項に記載の回路基板への半導体チップの実装方法。The method for mounting a semiconductor chip on a circuit board according to claim 3, wherein the ultrasonic wave is applied from the semiconductor chip side. 超音波の付加は突部の側面に超音波振動子を接触させて行うことを特徴とする請求項３〜６のいずれかの項に記載の回路基板への半導体チップの実装方法。The method of mounting a semiconductor chip on a circuit board according to any one of claims 3 to 6, wherein the ultrasonic wave is added by bringing an ultrasonic vibrator into contact with the side surface of the protrusion. 超音波は成形品における半導体チップ実装面と反対側の面で突部に対応する位置から付与することを特徴とする請求項３〜６のいずれかの項に記載の回路基板への半導体チップの実装方法。The ultrasonic wave is applied from a position corresponding to the protrusion on the surface opposite to the semiconductor chip mounting surface in the molded product, wherein the semiconductor chip is applied to the circuit board according to any one of claims 3 to 6. Implementation method. 加圧時の圧力で回路基板の突部を塑性変形させることを特徴とする請求項３〜９のいずれかの項に記載の回路基板への半導体チップの実装方法。The method for mounting a semiconductor chip on a circuit board according to claim 3, wherein the projecting portion of the circuit board is plastically deformed by a pressure during pressurization. 成形品における突部が位置する面に加圧部材の平面を押し当てて突部を塑性変形させておき、しかる後に半導体チップの接合を行うことを特徴とする請求項３〜９のいずれかの項に記載の回路基板への半導体チップの実装方法。10. The semiconductor chip is joined by pressing the flat surface of the pressure member against the surface of the molded product where the protrusion is located to plastically deform the protrusion, and then joining the semiconductor chip. A method for mounting a semiconductor chip on the circuit board according to the item. 先端ほど細くなった突部を備える回路基板を用いることを特徴とする請求項１０または１１記載の回路基板への半導体チップの実装方法。The method of mounting a semiconductor chip on a circuit board according to claim 10 or 11, wherein a circuit board having a protrusion that becomes narrower toward the tip is used. 先端ほど細く且つ先端面が平面となっている突部を備える回路基板を用いることを特徴とする請求項１０または１１記載の回路基板への半導体チップの実装方法。12. The method of mounting a semiconductor chip on a circuit board according to claim 10 or 11, wherein a circuit board having a protrusion that is thinner toward the tip and has a flat tip surface is used. 回路基板上に絶縁樹脂を塗布した後、回路基板の接続端子部に半導体チップの電極パッドを突き合わせて半導体チップと回路基板とを加熱加圧すると同時に超音波を付加して前記接続端子部と電極パッドとを接合するとともに回路基板と半導体チップ間に位置する上記絶縁樹脂を硬化させることを特徴とする請求項３〜１３のいずれかの項に記載の回路基板への半導体チップの実装方法。After coating the insulating resin on the circuit board, the electrode pads of the semiconductor chip are brought into contact with the connection terminal part of the circuit board to heat and press the semiconductor chip and the circuit board, and at the same time, an ultrasonic wave is applied to the connection terminal part and the electrode. 14. The method of mounting a semiconductor chip on a circuit board according to claim 3, wherein the insulating resin located between the circuit board and the semiconductor chip is cured while bonding the pad.
JP2000173957A 2000-06-09 2000-06-09 Semiconductor chip mounting circuit board and method for mounting semiconductor chip on circuit board Expired - Fee Related JP3608476B2 (en)

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