JPH0158866B2 - - Google Patents
Info
- Publication number
- JPH0158866B2 JPH0158866B2 JP58239234A JP23923483A JPH0158866B2 JP H0158866 B2 JPH0158866 B2 JP H0158866B2 JP 58239234 A JP58239234 A JP 58239234A JP 23923483 A JP23923483 A JP 23923483A JP H0158866 B2 JPH0158866 B2 JP H0158866B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- bonding
- temperature
- film lead
- bonding tool
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 38
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 238000003825 pressing Methods 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 239000010432 diamond Substances 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910015363 Au—Sn Inorganic materials 0.000 description 1
- 235000014676 Phragmites communis Nutrition 0.000 description 1
- 206010037660 Pyrexia Diseases 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910000953 kanthal Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
産業上の利用分野
本発明は半導体素子等の高密度、薄型、小型の
実装における転写バンプ方式による半導体装置の
製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor device using a transfer bump method for high-density, thin, and compact packaging of semiconductor elements and the like.
従来例の構成とその問題点
近年、IC、LSI等の半導体素子は各種の家庭電
化製品、産業用機器の分野へ導入されている。こ
れら家庭電化製品、産業用機器は、省資源化、省
電力化のためにあるいは利用範囲を拡大させるた
めに、多機能化、小型化、薄型化のいわゆるポー
タブル化が促進されてきている。Conventional configurations and their problems In recent years, semiconductor elements such as ICs and LSIs have been introduced into the fields of various home appliances and industrial equipment. In order to save resources and power, or to expand the scope of use, these household electrical appliances and industrial equipment are being made more multifunctional, smaller, and thinner, so-called portable.
半導体素子においてもポータブル化に対応する
ために、パツケージングの小型化、薄型化が要求
されてきている。拡散工程、電極配線工程の終了
したシリコンスライスは半導体素子単位のチツプ
に切断され、チツプの周辺に設けられたアルミ電
極端子から外部端子へ電極リードを取出して取扱
いやすくしまた機械的保護のためにパツケージン
グされる。通常、これら半導体素子のパツケージ
ングにはDIL、チツプキヤリヤ、フリツプチツ
プ、フイルムキヤリヤ方式等が用いられている
が、前記した目的のためには、フイルムキヤリヤ
方式が有望である。 In order to make semiconductor devices portable, there has been a demand for smaller and thinner packaging. After the diffusion process and electrode wiring process have been completed, the silicon slice is cut into chips for each semiconductor element, and electrode leads are taken out from the aluminum electrode terminals provided around the chip to external terminals for ease of handling and for mechanical protection. packaged. Normally, DIL, chip carrier, flip chip, film carrier methods, etc. are used for packaging these semiconductor devices, but the film carrier method is promising for the above-mentioned purpose.
半導体素子の電極端子にフイルムキヤリヤのリ
ード端子を接合する手段のひとつとして転写バン
プ方式（特開昭57−152147号）が提案されてい
る。この転写バンプ方式は、絶縁性基板上の半導
体素子の電極と対応した位置にAuの金属突起
（バンプ）を形成しておき、まず、前記金属突起
とフイルムキヤリヤのSnメツキしたリード端子
とを位置合せし、ツールで加圧、加熱し、前記リ
ード端子に前記絶縁性基板上の金属突起をAu・
Sn合金で接合し、絶縁性基板上から前記金属突
起を剥離せしめ、リード端子に転写させる。次い
で、半導体素子の電極端子（アルミ）と前記リー
ド端子の金属突起とを位置合せし、ツールで加
圧、加熱せしめ、Au・Al合金で前記金属突起と
半導体素子の電極端子とを接合するものである。 A transfer bump method (Japanese Unexamined Patent Publication No. 152147/1984) has been proposed as one means for joining lead terminals of a film carrier to electrode terminals of a semiconductor element. In this transfer bump method, Au metal protrusions (bumps) are formed on an insulating substrate at positions corresponding to the electrodes of the semiconductor element, and then the metal protrusions and the Sn-plated lead terminals of the film carrier are connected. Align, apply pressure and heat with a tool, and connect the metal protrusion on the insulating substrate to the lead terminal with Au.
After bonding with Sn alloy, the metal projections are peeled off from the insulating substrate and transferred to lead terminals. Next, the electrode terminal (aluminum) of the semiconductor element and the metal protrusion of the lead terminal are aligned, and the metal protrusion and the electrode terminal of the semiconductor element are bonded using an Au/Al alloy by applying pressure and heating with a tool. It is.
従来、前記転写バンプ方式のフイルムリードに
転写、接合された金属突起を半導体素子の電極に
接合する際、前記フイルムリード側から加熱した
ボンデイングツールで加熱、加圧せしめ、金属突
起と半導体素子の電極との間に合金を形成せしめ
接合するものであつた。ところが、前記ボンデイ
ングツールの温度は、少なくとも500〜550℃と著
じるしく高く設定する必要があつた。何故なら
ば、ボンデイングツールの熱は、フイルムリード
に接した瞬間にフイルムリードおよび半導体素子
へ急速に拡散してしまい、ボンデイングツールの
底面の温度を下げ、金属突起と半導体素子の電極
間が合金化温度に達しなくなり接合強度が著じる
しく低下するためである。 Conventionally, when bonding the metal protrusions transferred and bonded to the film lead of the transfer bump method to the electrodes of the semiconductor element, heat and pressure are applied from the film lead side with a heated bonding tool to separate the metal protrusions and the electrodes of the semiconductor element. An alloy was formed between the two to form a bond. However, the temperature of the bonding tool had to be set at a significantly high temperature of at least 500 to 550°C. This is because the heat from the bonding tool rapidly diffuses into the film lead and the semiconductor element the moment it comes into contact with the film lead, lowering the temperature at the bottom of the bonding tool and causing an alloy between the metal protrusion and the electrode of the semiconductor element. This is because the temperature is no longer reached and the bonding strength is significantly reduced.
このために次の様な問題があつた。 This caused the following problems.
ボンデイング温度が高いため、パルス加熱用
のツールにあつては、その材質がMo、カンタ
ル等で形成されても、酸化の進行が激しく、摩
耗が著じるしく、また熱変形も発生し、フイル
ムリードを全面にわたつて均等に加圧せしめる
ことが困難となつていた。このため、ツールの
寿命は、たかだか500〜1000回のボンデイング
にしか耐えず、ツールの交換、再生に要する費
用が高くなるばかりか、接合強度も低下さし、
信頼上このましくないものであつた。この事は
焼結して形成した人造ダイヤモンドのボンデイ
ングツールでも同一であつて、ダイヤモンドの
バインダーが劣化してしまい、ツール表面に微
細なクラツクが発生し、これもまたツールの寿
命を短縮してしまい、接合強度を低下さすもの
であつた。 Because the bonding temperature is high, tools for pulse heating, even if they are made of materials such as Mo or Kanthal, undergo rapid oxidation, significant wear, and thermal deformation, resulting in film failure. It has been difficult to apply pressure evenly over the entire surface of the reed. For this reason, the life of the tool can only withstand 500 to 1000 bonding cycles, which not only increases the cost of replacing and remanufacturing the tool, but also reduces the bonding strength.
This was not reliable. This is also the case with bonding tools made of artificial diamonds formed by sintering, as the diamond binder deteriorates and minute cracks occur on the tool surface, which also shortens the life of the tool. , which reduced the bonding strength.
更にまた、ボンデイング時の温度が高いた
め、フイルムリードがボンデイングツールの底
面にゆ着し、フイルムリード表面が引張られる
ため、半導体素子の端部と前記フイルムリード
が接触して、電気的不良を発生させる原因にな
るばかりか、最悪の状態では、フイルムリード
がボンデイングツール底面にゆ着したまま持ち
上げられるため、フイルムリードを切断してし
まうという問題も発生していた。 Furthermore, due to the high temperature during bonding, the film lead rests on the bottom of the bonding tool and the surface of the film lead is stretched, causing the end of the semiconductor element to come into contact with the film lead, resulting in electrical failure. In addition, in the worst case, the film lead may be lifted while still attached to the bottom of the bonding tool, resulting in the film lead being cut.
発明の目的
本発明はこのような従来の問題に鑑み、ボンデ
イングツールの温度を低く設定でき、接合強度の
高い半導体装置の製造方法を提供することを目的
とする。OBJECTS OF THE INVENTION In view of these conventional problems, an object of the present invention is to provide a method for manufacturing a semiconductor device that allows the temperature of a bonding tool to be set low and has high bonding strength.
発明の構成
本発明は、フイルムリードに転写された金属突
起を半導体素子の電極に接合する際、前記半導体
素子を加熱せしめながら、ボンデイングツールに
て加圧加熱することにより、フイルムリードが半
導体素子からの熱の逃げを防ぎ、金属突起と半導
体素子の電極間の接合温度を一定に保つものであ
る。これによりボンデイングツールの温度を低く
設定し、高い接合強度を得んとするものである。Structure of the Invention The present invention provides that, when bonding a metal protrusion transferred to a film lead to an electrode of a semiconductor element, the film lead is separated from the semiconductor element by applying pressure and heat using a bonding tool while heating the semiconductor element. This prevents heat from escaping and keeps the bonding temperature between the metal protrusion and the electrode of the semiconductor element constant. This aims to set the temperature of the bonding tool low and obtain high bonding strength.
実施例の説明
第１図〜第４図で本発明の一実施例の金属突起
転写工程を説明する。DESCRIPTION OF EMBODIMENTS A metal protrusion transfer process according to an embodiment of the present invention will be explained with reference to FIGS. 1 to 4. FIG.
絶縁性基板１０上に電解メツキ法等で形成され
たAu突起５と、樹脂フイルム１から延在したSn
メツキしたフイルムリード３とを位置合せする
（第１図）。次いで200℃〜350℃に加熱したボンデ
イングツール３５で加圧すれば、Au突起５は、
Snメツキされたフイルムリード３にAu・Sn合金
で転写接合される。第２図とフイルムリード３上
にAu突起５が転写・接合された状態を示す。 Au protrusions 5 formed on the insulating substrate 10 by electrolytic plating method etc. and Sn extending from the resin film 1.
Align with the plated film lead 3 (Fig. 1). Then, by applying pressure with the bonding tool 35 heated to 200°C to 350°C, the Au protrusion 5 becomes
It is transferred and bonded to the Sn-plated film lead 3 using an Au-Sn alloy. FIG. 2 shows a state in which Au protrusions 5 are transferred and bonded onto the film lead 3.
次にAu突起５と半導体素子２のアルミ電極６
とを位置合せする。この時、半導体素子２を載置
する台３０はヒーター３１によつて加熱されてい
る。このヒーター３１によつて、半導体素子２
は、150℃〜350℃程度に加熱される（第３図）。 Next, the Au protrusion 5 and the aluminum electrode 6 of the semiconductor element 2
Align with. At this time, the table 30 on which the semiconductor element 2 is placed is heated by the heater 31. By this heater 31, the semiconductor element 2
is heated to about 150°C to 350°C (Figure 3).
次いで、ボンデイングツール３６を300〜450℃
に加熱せしめ、加圧すれば、Au突起５は半導体
素子２のアルミ電極に接合される（第４図））。 Next, the bonding tool 36 is heated to 300 to 450°C.
By heating and applying pressure, the Au protrusions 5 are bonded to the aluminum electrodes of the semiconductor element 2 (FIG. 4).
半導体素子２の加熱は、パルス電流によつて、
ボンデイングツール３６が降下し、加圧する直前
に瞬間的に加熱しても良いし、台３０にヒーター
を埋設せしめ常時的に加熱しても良い。 The semiconductor element 2 is heated by pulsed current.
Immediately before the bonding tool 36 descends and pressurizes, it may be heated instantaneously, or a heater may be embedded in the stand 30 and heat may be constantly heated.
またフイルムリード３はSnメツキ処理したも
のについて説明したが、Auメツキもしくは半田
メツキ処理した構成でも良い。 Furthermore, although the film lead 3 has been described as being Sn-plated, it may also be Au-plated or solder-plated.
本発明によれば、ボンデイングツール３６の熱
は、台３０のヒーター３１によつて半導体素子２
自体を加熱せしめているので、半導体素子２にう
ばわれる熱が極端に減少する一方、フイルムリー
ド３への熱の伝達もボンデイングツール３６と加
熱する台３０の両方から得られるから、ボンデイ
ングツール３６の熱も著じるしく小さい。したが
つて半導体素子やフイルムリードからの熱の逃げ
が著じるしく小さいからボンデイングツール３６
の温度は低く設定できるばかりでなく、Au突起
と半導体素子の電極間の接合境界の温度を一定に
保つ事ができ、安定な接合が得られる。本発明者
らの実験の結果では、半導体素子の加熱温度200
℃〜300℃でボンデイングツールの温度は300℃〜
400℃となり、ボンデイング時間も0.5秒で連続的
に一括ボンデイングが実現できた。 According to the present invention, the heat of the bonding tool 36 is transferred to the semiconductor element 2 by the heater 31 of the stand 30.
Since the bonding tool 36 heats itself, the heat transferred to the semiconductor element 2 is extremely reduced, and the heat is transferred to the film lead 3 from both the bonding tool 36 and the heating table 30. The fever is also noticeably low. Therefore, the amount of heat escaping from the semiconductor element and film lead is extremely small, so the bonding tool 36
Not only can the temperature be set low, but also the temperature at the bonding boundary between the Au protrusion and the electrode of the semiconductor element can be kept constant, resulting in a stable bond. According to the results of experiments conducted by the present inventors, the heating temperature of semiconductor elements is 200
℃~300℃ and the bonding tool temperature is 300℃~
The temperature reached 400℃, and the bonding time was 0.5 seconds, making it possible to achieve continuous batch bonding.
発明の効果
従来ボンデイングツールの温度は、少なくと
も500℃〜550℃を必要としていたが、本発明に
より、その温度を100℃以上も低く設定できる。
このために、ボンデイングツールの寿命を著じ
るしく長くすることができ、ボンデイングツー
ルの交換の費用が安価となる。Effects of the Invention Conventionally, the temperature of a bonding tool required at least 500°C to 550°C, but according to the present invention, the temperature can be set as low as 100°C or more.
This makes it possible to significantly extend the life of the bonding tool and to reduce the cost of replacing the bonding tool.
更にまた、ボンデイングツールの温度を低く
設定できるため、従来発生していたボンデイン
グツールとフイルムリードとの瘉着の発生が皆
無になり、フイルムリードの切断や曲りの事故
がなく、歩留りを向上できるばかりか安定な信
頼性の高いボンデイングが実現できる。 Furthermore, since the temperature of the bonding tool can be set low, there is no chance of sticking between the bonding tool and the film lead, which previously occurred, and there are no accidents such as cutting or bending the film lead, which can improve the yield. This enables stable and highly reliable bonding.
ボンデイングツールの温度が低いため、温度
制禦の精度が高く、かつボンデイングツール底
面の温度分布を均一にできる。したがつて、
Au突起と半導体素子の電極との境界温度を安
定にかつ均一にできるから、高い接合強度を得
ることができる。 Since the temperature of the bonding tool is low, the temperature can be controlled with high accuracy and the temperature distribution on the bottom surface of the bonding tool can be made uniform. Therefore,
Since the boundary temperature between the Au protrusion and the electrode of the semiconductor element can be made stable and uniform, high bonding strength can be obtained.
第１図〜第４図は本発明の一実施例の金属突起
転写工程を示す断面図である。
２……半導体素子、３……フイルムリード、５
……金属突起、６……アルミ電極、１０……絶縁
性基板、３０……台、３１……ヒーター、３５，
３６……ボンデイングツール。
1 to 4 are cross-sectional views showing a metal protrusion transfer process according to an embodiment of the present invention. 2... Semiconductor element, 3... Film lead, 5
...metal protrusion, 6 ... aluminum electrode, 10 ... insulating substrate, 30 ... stand, 31 ... heater, 35,
36...Bonding tool.
Claims (1)
とを位置合せし、第１の加圧加熱を行つて前記金
属突起を前記フイルムリードに転写、接合し、つ
いで前記半導体素子を加熱し、前記フイルムリー
ド上の金属突起と前記半導体素子の電極とを位置
合せし、第２の加圧加熱により前記フイルムリー
ド上の金属突起を前記半導体素子の電極に接合す
ることを特徴とする半導体装置の製造方法。 ２ 半導体素子の加熱温度が、第２の加圧加熱の
工程の温度よりも低いことを特徴とする特許請求
の範囲第１項記載の半導体装置の製造方法。[Claims] 1. A film lead and a metal protrusion formed on a substrate are aligned, a first pressurization and heating is performed to transfer and bond the metal protrusion to the film lead, and then the semiconductor element is bonded to the film lead. The metal protrusion on the film lead is heated to align the metal protrusion on the film lead and the electrode of the semiconductor element, and the metal protrusion on the film lead is bonded to the electrode of the semiconductor element by a second pressurized heating. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the heating temperature of the semiconductor element is lower than the temperature of the second pressure heating step.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58239234A JPS60130837A (en) | 1983-12-19 | 1983-12-19 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58239234A JPS60130837A (en) | 1983-12-19 | 1983-12-19 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60130837A JPS60130837A (en) | 1985-07-12 |
| JPH0158866B2 true JPH0158866B2 (en) | 1989-12-13 |
Family
ID=17041738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58239234A Granted JPS60130837A (en) | 1983-12-19 | 1983-12-19 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60130837A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0666361B2 (en) * | 1985-10-23 | 1994-08-24 | 松下電器産業株式会社 | Bonding apparatus and bonding method |
| US4876221A (en) * | 1988-05-03 | 1989-10-24 | Matsushita Electric Industrial Co., Ltd. | Bonding method |
| JP2591600B2 (en) * | 1995-08-07 | 1997-03-19 | 松下電器産業株式会社 | Bonding method |
| KR20200143617A (en) * | 2019-06-14 | 2020-12-24 | 삼성디스플레이 주식회사 | Manufacturing device for the display device and method of manufacturing for the display device |
-
1983
- 1983-12-19 JP JP58239234A patent/JPS60130837A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60130837A (en) | 1985-07-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100555354B1 (en) | A method of coupling singulated chip to a substrate package, fluxless flip chip interconnection and a method of forming contact points on chip | |
| JPS6149432A (en) | Manufacture of semiconductor device | |
| IE52529B1 (en) | Method of simultaneously manufacturing multiple electrical connections between two elements | |
| US6689635B1 (en) | Apparatus and method for face-to-face connection of a die to a substrate with polymer electrodes | |
| JP2005509269A (en) | Flip chip interconnect using no-clean flux | |
| JPH0158866B2 (en) | ||
| JPH10125734A (en) | Semiconductor unit and manufacturing method thereof | |
| JP2748870B2 (en) | Board connection method | |
| JPH027181B2 (en) | ||
| JP2570626B2 (en) | Board connection structure and connection method | |
| JPS5825242A (en) | Manufacture of semiconductor | |
| JPH0350736A (en) | Manufacture of bump of semiconductor chip | |
| JPS6313337A (en) | Process of mounting semiconductor element | |
| JPH0669610B2 (en) | Heater chip and bonding method using the same | |
| JPS61181136A (en) | Die bonding | |
| JPS6297341A (en) | Bonding device | |
| JPH0158863B2 (en) | ||
| JPS6049637A (en) | Mounting method of semiconductor substrate | |
| JPS5944834A (en) | Die-bonding of electronic circuit element | |
| TW388092B (en) | Lead frame for multi-chip package and manufacturing method therefor | |
| JPH0533820B2 (en) | ||
| JPH02137240A (en) | Connection structure of semiconductor element | |
| JP2000286301A (en) | Method and device for assembling semiconductor chips | |
| KR100747392B1 (en) | Method for bonding gold- plated beam lead to semiconductor devices | |
| JPH0319351A (en) | Bonding tool |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |