JPH0512853B2 - - Google Patents

Info

Publication number
JPH0512853B2
JPH0512853B2 JP1325668A JP32566889A JPH0512853B2 JP H0512853 B2 JPH0512853 B2 JP H0512853B2 JP 1325668 A JP1325668 A JP 1325668A JP 32566889 A JP32566889 A JP 32566889A JP H0512853 B2 JPH0512853 B2 JP H0512853B2
Authority
JP
Japan
Prior art keywords
resin
header
semiconductor device
mold
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1325668A
Other languages
English (en)
Japanese (ja)
Other versions
JPH02290032A (ja
Inventor
Minoru Suda
Masao Yamaguchi
Nobukatsu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1325668A priority Critical patent/JPH02290032A/ja
Publication of JPH02290032A publication Critical patent/JPH02290032A/ja
Publication of JPH0512853B2 publication Critical patent/JPH0512853B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP1325668A 1989-12-14 1989-12-14 レジンモールド型半導体装置の製造方法 Granted JPH02290032A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1325668A JPH02290032A (ja) 1989-12-14 1989-12-14 レジンモールド型半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1325668A JPH02290032A (ja) 1989-12-14 1989-12-14 レジンモールド型半導体装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP59125163A Division JPS615529A (ja) 1984-06-20 1984-06-20 絶縁型半導体装置

Publications (2)

Publication Number Publication Date
JPH02290032A JPH02290032A (ja) 1990-11-29
JPH0512853B2 true JPH0512853B2 (enExample) 1993-02-19

Family

ID=18179382

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1325668A Granted JPH02290032A (ja) 1989-12-14 1989-12-14 レジンモールド型半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH02290032A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5368805A (en) * 1992-03-24 1994-11-29 Fuji Electric Co., Ltd. Method for producing resin sealed type semiconductor device
JP6228904B2 (ja) * 2014-10-16 2017-11-08 新電元工業株式会社 半導体装置の製造方法、半導体装置、金型およびリードフレーム
JPWO2024219244A1 (enExample) * 2023-04-21 2024-10-24

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5758771U (enExample) * 1980-09-25 1982-04-07
JPS5983052U (ja) * 1982-11-29 1984-06-05 日本電気ホームエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
JPH02290032A (ja) 1990-11-29

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