JPH0511790B2 - - Google Patents

Description

Detailed Description of the Invention <Industrial Application Field> The present invention relates to a capacitance conversion device that converts a process variable such as pressure detected through a sensor capacitor into an electrical signal, and particularly relates to a capacitance conversion device that converts a process variable such as pressure detected via a sensor capacitor into an electrical signal, and in particular converts a sensor capacitor into a frequency signal. The present invention relates to a capacitance conversion device that performs conversion.

<Prior Art> FIG. 5 is a block diagram showing the configuration of a conventional capacitance conversion device.

_CM is the sensor capacitance to be measured, one end of which is connected to the input end of the inverter _G1 . A bidirectional constant current circuit CC is connected between the input and output terminals of inverter _G1 , and its output terminal is also connected to the inverter G1.
Connected to the input end of _G2 . The output end of inverter _G2 is connected to the other end of sensor capacitor _CM .
C _s1 and C _s2 are the common potential point with one end of the sensor capacitor and the other end.
This is the distributed capacitance formed between COM and COM. Each inverter G ₁ , G ₂ is energized with power supply voltage +E.

Now, when the output of inverter _G2 is "H" (high level) and a voltage +E is generated, the series circuit of sensor capacitance C _M and distributed capacitance C _s1 is rapidly charged due to this rise, and the distributed capacitance C The terminal voltage of _s1 suddenly reaches a constant voltage and rises almost vertically. The charging operation at this time uses distributed capacitance because the output impedance of inverter G ₂ is extremely small.
The existence of C _s2 becomes irrelevant. In addition, since the output of inverter G ₁ is “L” (low level) and the bidirectional constant current circuit CC is connected between the input and output terminals of inverter G ₁ , the distributed capacitance increases.
The charge of C _s1 is transferred to bidirectional constant current circuit CC and inverter G ₁
Discharge immediately starts via the output impedance of inverter G1, but this discharge current is limited to a constant current _i1 by bidirectional constant current circuit CC, so that the voltage at the input terminal of inverter _G1 decreases linearly.

When the voltage at the input terminal of inverter G ₁ drops to the threshold level V _TH , the output of inverter G ₁ changes to “H”, and as a result, the output of inverter G ₂ becomes “L”, so that the residual distributed capacitance C _s1 After the charge is rapidly discharged through the sensor capacitor C _M and the voltage at the input terminal of the inverter G ₁ drops vertically, a constant current flows through the bidirectional constant current circuit CC due to “H” at the output terminal of the inverter G ₁ . The distributed capacitance C _s1 is charged by i ₁ and the voltage at the input terminal of the inverter G ₁ increases linearly.

When the voltage at the input terminal of inverter _G1 reaches the threshold level _VTH , the output of inverter _G1 changes to "L", and as a result, the output of inverter _G2 becomes "H _" . Charging is performed. Repeat this from now on.

Here, the terminal voltage change e ₁ of the distributed capacitance C _s1 with reference to the threshold level V _TH is the voltage obtained by dividing the output voltage + E of the inverter G ₂ by the sensor capacitance C _M and the distributed capacitance C _s1 during charging. Therefore, it is expressed as e ₁ =C _M /C _M +C _s1 E (1).

Also, the terminal voltage change e ₁ is the threshold level
The time t ₁ ' required for the voltage to decrease to V _TH is expressed by the following equation based on the constant current i ₁ regulated by the bidirectional constant current circuit CC.

i ₁ t ₁ ′=e ₁ (C _M +C _s1 ) (2) Calculating time t ₁ ′ from equations (1) and (2), t ₁ ′=C _M E/i ₁ (3) Note that charging and discharging is repeated, the distributed capacitance C _s1
A charge corresponding to the threshold level V _TH is determined as the reference potential, and charging and discharging are performed around this, so the terminal voltage change e ₁ on the charging side and the terminal voltage change e ₂ on the discharging side are equal. By performing charging for this terminal voltage change e ₂ with the constant current i ₁ from the bidirectional constant current circuit CC, the required charging time t ₂ ′ also becomes equal to t ₁ ′.

Therefore, the oscillation frequency is expressed by the following equation.

=1/t ₁ ′+t ₂ ′=1/2C _M E (4) Also, if K is a constant determined by constant current i ₁ and power supply voltage, then =K1/C _M (5) and the oscillation frequency is It corresponds to the sensor capacitance _CM , and the influence of the distributed capacitances C _s1 and C _s2 is eliminated.

<Problems to be Solved by the Invention> However, since such conventional capacitance conversion devices are realized by using the constant current characteristics of semiconductor elements such as field effect transistors as bidirectional constant current circuits CC, variations in the elements and There was a problem in that the conversion characteristics changed due to changes in temperature.

<Means for Solving the Problems> In order to solve the above problems, the present invention provides a method in which the sensor capacitance to be measured and the first input terminal are connected in negative feedback to the output terminal via a fixed capacitance. an operational amplifying means to which one end of the sensor capacitor is connected and an operating voltage applied to a second input terminal; a comparing means for comparing the output of the operational amplifying means and the operating voltage and outputting a binary voltage; The voltage related to the output is the first
It comprises a resistance means for applying to the input terminal, and a voltage manipulation means for inputting a binary voltage and outputting a binary operating voltage having a predetermined amplitude, and is configured to output a frequency of the operating voltage corresponding to the sensor capacitance. This is what I did.

<Function> According to the configuration of the present invention, as the operating voltage changes in two values, a voltage amplified by the capacitance ratio of the fixed capacitance and the sensor capacitance is generated at the output of the operational amplification means, and this output is applied to the resistor means. The oscillation is continued by repeating a half cycle, which is the time taken by the injected current to return to the operating voltage value.

<Example> Hereinafter, an example of the present invention will be described based on the drawings. FIG. 1 is a block diagram showing one embodiment of the present invention.

The inverting input end (-) of the differential amplifier Q ₁ is connected to one end of the sensor capacitor C _M via a cable CB whose core wire CW is surrounded by a guard GD, and a fixed capacitor is connected between it and its output end. Connected via C _K. The operating voltage V ₀ is applied to the non-inverting input terminal (+) of the differential amplifier Q ₁ together with the guard GD. A capacitor _C1 is connected between the positive power supply terminal _T1 and the negative power supply terminal _T2 of the differential amplifier _Q1 , and an operating voltage _V0 is applied to the negative power supply terminal _T2 via the capacitor _C2 . There is.

The inverting input terminal (-) of comparator Q ₂ is connected to differential amplifier Q ₁
The operating voltage V ₀ is applied to its non-inverting input terminal (+) via a resistor R ₁ .

Switches S ₁ and S 2 are connected between the positive power supply +E and the positive power supply terminal T ₁ and between the negative power supply -E and the negative power supply terminal _{T 2} of the differential amplifier Q ₁ , respectively.
The opening and closing of S ₁ and S ₂ are controlled by the output of comparator Q ₂ .

The non-inverting input (+) of comparator Q 3 is connected to the common potential point COM. The inverting input (-) of comparator Q ₃ is connected to comparator Q _2.
The output terminal is connected to the inverting input terminal (-) of the differential amplifier Q ₁ via the resistor R ₂ and to the input terminal of the voltage divider circuit formed by the resistors R ₃ and R ₄ . It is connected. The voltage dividing point of resistors R ₃ and R ₄ is the amplifier Q ₄ which acts as a voltage follower.
is connected to the input end of the

At the output end of the amplifier _Q4 , a binary operating voltage _V0 is obtained by appropriately dividing the output of the comparator _Q3 .

Comparators Q ₂ , Q ₃ and amplifier Q ₄ are powered by a positive power supply +E and a negative power supply -E, respectively.

Next, the operation of the embodiment shown in FIG. 1 constructed as above will be explained using the waveform diagram shown in FIG. 2. First, compensation for distributed capacitance will be omitted from description.

The operating voltage V ₀ at the output end of amplifier Q ₄ changes from −v to +
At the point in time when the voltage has changed to v, as shown by the dotted line in Fig. 2A, if the amount of change in the output of the differential amplifier _Q1 is _e2 , the following equation is obtained taking into account the charge fluctuation.

(e-(+v)) C _K = (+v-(-v)) C _K (6) In this state, the inverting input terminal (-) of comparator Q ₂ becomes a positive voltage greater than +v (second Figure b) The non-inverting input terminal (+) changes from -v to +v, but the positive voltage at the inverting input terminal (-) is dominant as a whole, and the output terminal of comparator _Q2 is at the "L" level of -E. (Figure 2 D). This “L” level is capacitor _C3
level inversion is ensured by positive feedback, but after a predetermined period of time, the voltage at the non-inverting input terminal (+) of comparator _Q2 is set to the operating voltage -v via resistor _R1 . (Figure 2 C).

On the other hand, the level inversion of the output of comparator _Q2 is
Since the output level of Q ₃ is set to the "H" level of +E (FIG. 2 (e)), the voltage of +E charges the fixed capacitor C _K with the current i ₂ via the resistor R ₂ . Therefore, the voltage at the output terminal of the differential amplifier _Q1 gradually decreases as shown in FIG. 2B. The operating voltage +v of the non-inverting input terminal (+) of the differential amplifier _Q1 is the ratio of the inverting input terminal (-)
When the voltage at the output end is reached, the voltage level at the output end is reversed and a point is reached. The required time t is given as t=(e-(+v))C _K /i ₂ (7).

From equations (6) and (7), t= _CM・2v/i ₂ (8). Here, the voltages across the resistor R ₁ in the half cycle after the time in FIG. 2 and the half cycle after _the time in FIG. The size of is |i ₂ |=E−v/R ₂ (9). Furthermore, since the operating voltage v is the output voltage of the comparator Q ₃ divided by the resistors R ₃ and R ₄ , its magnitude |v| is |v|=ER ₄ /R ₃ +R ₄ (10) Become. Therefore, from equations (8) to (10), t=C _M ·2R ₄ /R ₂ R ₃ (11). This equation shows that the time width t of a half cycle of the operating voltage V ₀ is determined by the sensor capacitance C _M and the resistance value and is not affected by fluctuations in the power supply voltage.

Next, compensation for the distributed capacitance C _SA occurring inside the differential amplifier Q ₁ as shown in FIG. 3 will be explained.
The opening and closing of switches S ₁ and S ₂ are controlled by the output of comparator Q ₂ (Fig. 2), and there is a period in which the potentials of the positive power supply terminal T ₁ and negative power supply terminal T ₂ are fixed at +E and -E, and the floating period. Make a period. During the floating period, both _the positive power supply _{terminal T1} and the negative power supply terminal _T2 are 2V (=
The voltage is shifted positively by v-(-v)) (FIG. 2). The output voltage of amplifier Q ₄ is applied to the non-inverting input terminal (+) of differential amplifier Q ₁ , and its inverting input terminal (-) follows the potential of the non-inverting input terminal (+) and output voltage of amplifier Q ₄ . is the same as Therefore,
Since the output of the amplifier _Q4 shown in FIG. 2A and the changes in _FIGS . Also,
The voltage across the distributed capacitance C _s1 is always zero as in the case shown in FIG. From the above, distributed capacity
No current flows through C _s1 and C _SA , and their influence is removed.

FIG. 4 is a block diagram showing another embodiment of forming a guard. Since the fixed capacitance C _K is eliminated in equation (8), guard driving can be performed using the output of the differential amplifier Q ₁ using this. In this case, distributed capacitance C _s1 is formed in parallel with fixed capacitance C _K .

Note that when the distributed capacitance C _SA formed at the input section of the differential amplifier Q ₁ is small, the switches S ₁ and S ₂ and the capacitor C ₂ are removed and the differential amplifier Q ₁ is simply
Even if it is energized by , the result of equation (11) is obtained. In this case, the guard drive is a differential amplifier Q ₁ as shown in Figure 4.
The signal can be transmitted to the non-inverting input terminal (+) independently of the output of the amplifier _Q4 .

<Effects of the Invention> As described above in detail with the embodiments, according to the present invention, instead of using a bidirectional constant current circuit using a semiconductor element as in the past, a stabilized and easy resistor is used to create a sensor. Since it is possible to obtain an oscillation period, that is, an oscillation frequency that is proportional to the capacitance, it is possible to realize a capacitance conversion device that is less affected by element variations and temperature.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a waveform diagram showing the waveforms of each part of the embodiment shown in FIG. 1, FIG. 3 is an explanatory diagram illustrating the guard configuration in the embodiment of the present invention, and FIG. A partial block diagram showing the guard configuration,
FIG. 5 is a block diagram showing the configuration of a conventional capacitance conversion device. C _M ...Sensor capacitance, _Q1 ...Differential amplifier, _Q2 ,
Q ₃ ... Comparator, Q ₄ ... Amplifier, C _K ... Fixed capacitance,
C _s1 , C _SA , C _s2 ... Distributed capacitance, CC ... Bidirectional constant current circuit.

Claims (1)

[Claims] 1 A sensor capacitance to be measured and an operational amplifier whose first input terminal is connected to the output terminal via a fixed capacitor in negative feedback, one end of the sensor capacitance is connected, and an operating voltage is applied to the second input terminal. means for comparing the output of the operational amplification means with the operating voltage and outputting a binary voltage; resistance means for applying a voltage related to the binary voltage to the first input terminal; A capacitance conversion device comprising: a voltage operating means for inputting a value voltage and outputting the binary operating voltage having a predetermined amplitude, and outputting a frequency of the operating voltage corresponding to the sensor capacitance.