JP3322726B2 - Capacitance detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitance detecting circuit, and can be used for a transducer for converting a physical quantity such as pressure or weight into a capacitance as an electric signal.

[0002]

2. Description of the Related Art Conventionally, various instruments such as a pressure detector using a capacitance type sensor for measuring a physical quantity have been used. There is known a method of detecting a measured capacitance from a ratio with a reference capacitance when detecting a measured capacitance to be detected by a sensor or the like. This method is based on the point that temperature correction of a sensor or the like serving as a capacitance to be detected is easy, the output of the sensor or the like is stable, and the linearity of the output of the sensor or the like is good. Is better than the other methods. FIG. 4 shows a capacitance detection circuit 80 using this method.
Is to charge a capacitor C1 as a measured capacitance and a capacitor C2 as a reference capacitance with a constant current source i and detect the measured capacitance from the charging time. That is, charging of the capacitors C1 and C2 starts simultaneously, and when the capacitor C2 reaches the reference voltage V2, the comparator
A2 sets the RS flip-flop 81, and the output voltage V3 of the RS flip-flop 81 goes high. Then, when the capacitor C1 reaches the reference voltage V1, the RS flip-flop 81 is reset by the comparator A1, and the output voltage V3 of the RS flip-flop 81 becomes low. As a result, as the capacitance of the capacitor C1 is larger than the capacitance of the capacitor C2 and the charging takes a longer time, the high level of the output voltage V3 of the RS flip-flop 81 is proportional to the low level. If the output voltage V3, which is proportional to time, is passed through the low-pass filter 82 and averaged, an output voltage V0 corresponding to the ratio of the capacitances of the capacitors C1 and C2 is obtained.

[0003]

In such a capacitance detection circuit 80, since the output signal V3 is averaged by the low-pass filter 82, there is a problem that the response is poor. On the other hand, it is conceivable to improve the response by changing the time constant of the low-pass filter 82.However, the change in the time constant makes it impossible to remove the ripple current, and the output voltage V0 becomes unstable. is there. In addition, it is conceivable to improve the responsiveness by increasing the constant current value given to each of the capacitors C1 and C2 to shorten the charging time. Since the response performance is required, the responsiveness of the entire capacitance detection circuit 80 cannot be improved merely by increasing the constant current value given to the capacitors C1 and C2.

An object of the present invention is to provide an electrostatic capacitance detecting circuit having a simple circuit configuration and good responsiveness.

[0005]

The present invention SUMMARY OF], in order to detect the detected electrostatic capacitance to be measured on the basis of the reference capacitance
To the reference capacitance and the integrating circuit made up of one of the detected electrostatic capacitance, before Symbol reference capacitance and the composed of the other of the detected capacitance Rutotomoni the integration times
Capacitance detection with a differentiation circuit connected downstream of the road
Circuit, where the output voltage is either positive voltage or negative voltage
Can be switched from one to another and the integration circuit
A power supply circuit connected to the input side;
An intermittent timing generator that switches the pressure polarity
Wherein the integration circuit comprises an operational amplifier, and
When the input voltage of is input, it falls from the input voltage
Outputs the integrated output voltage of the downslope and inputs the negative
When a power voltage is input, the rising voltage rises from the input voltage.
And outputs the integrated output voltage of the gradient.
The timing generator includes an input voltage and an output of the integration circuit.
A signal obtained by adding the input voltage is input, and this signal is
If the output voltage is lower than the default, the output voltage of the power supply circuit becomes positive.
Switch from pole to anode, and the signal is less than 0 volts
As the voltage increases, the output voltage of the power supply circuit changes from negative to positive
Is switched .

In the above, the power supply circuit has the
A positive contact to which a voltage is applied, and a negative contact to which the negative voltage is applied.
Contact and selectively contact one of these positive and negative contacts.
A switching element with a movable contact
It is preferable to have. Further, the output side of the front Symbol differentiating circuit, a sample hold circuit connected to which holds the output
In addition, the output of the power supply circuit holds the output of the differentiating circuit based on the output and the output of the integrating circuit.
Holding timing generating circuit that determines the timing of lifting the
It is desirable to be connected .

[0007]

According to the present invention, by applying a predetermined DC voltage E to the integrating circuit constituted by the capacitance to be detected, the output of the integrating circuit is inversely proportional to the magnitude of the capacitance to be detected. Thus, a ramp (gradient) voltage that varies with the constant gradient R is obtained. Assuming that the magnitude of the capacitance to be detected is C ₀ and the proportionality constant is k ₁ , the gradient R can be represented by R = k ₁ E / C ₀ . When this lamp voltage is input to a differentiating circuit composed of a reference capacitance, a DC voltage V proportional to both the magnitude of the reference capacitance and the gradient R of the lamp voltage is obtained from the output of the differentiating circuit. Assuming that the magnitude of the reference capacitance is a value C ₁ and the proportional constant is k ₂ , the aforementioned DC voltage V can be expressed as V = k ₂ RC ₁ . In this equation, R = k ₁ E /
By transforming by substituting C ₀ , V = kQ. However,
k = k ₁ k ₂ E and Q = C ₁ / C ₀ . Therefore, by a simple detection circuit including the above-described integration circuit and differentiation circuit,
The DC voltage V proportional to the ratio Q between the reference capacitance and the capacitance to be detected is directly obtained, and it is not necessary to average the output voltages as in the related art.

At this time, if the value of the capacitance to be detected is detected from the DC voltage V which is a variable proportional to the ratio Q between the reference capacitance and the capacitance to be detected, the effect of the temperature change can be eliminated. . That is, the detected capacitance and the reference capacitance, respectively When those having a pair of electrodes which are parallel arranged at a predetermined distance d _0, d _1, the detected capacitance and reference capacitance values C _0, C _{1 is, C 0 = a 0 / d} 0,
It is expressed as C ₁ = a ₁ / d ₁ (a ₀ and a ₁ are constants). Now, let the temperature coefficients of the detected capacitance and the reference capacitance be respectively
Assuming that T ₀ and T ₁ are given and a temperature change ΔT is given to both the detected capacitance and the reference capacitance, the respective capacitance values C ₀ and C ₁ are C ₀ = a ₀ (1 + T ₀ × ΔT) / d ₀ , C
₁ = a ₁ (1 + T ₁ × ΔT) / d ₁ When the ratio Q between the reference capacitance and the capacitance to be detected is determined from these, the ratio Q is Q = [Ad ₀ (1 + T ₁ × ΔT)] / [d ₁ (1 + T ₀ ×
ΔT)]. Here, A is a constant, and A = a ₁
/ A ₀ . Here, if the reference capacitance and the detected capacitance are formed of the same material, the temperature coefficients of the reference capacitance and the detected capacitance become equal to each other, and 1 + T ₁ × Δ
Since T = 1 + T ₀ × ΔT, the ratio Q is Q = Ad ₀ / d ₁
And is a variable independent of temperature. Therefore, if the value of the detected capacitance is detected from the DC voltage V having the ratio Q as a variable, the influence of the temperature change is eliminated. By forming a differentiating circuit with the detected capacitance and an integrating circuit with the reference capacitance, the above-described ratio Q (= C ₁ /
Be adopted C ₀₎ Ratio Q as the inverse of _{'(= C 0 / C 1} ), the same operations, and effects. And the integration circuit
Input voltage and output voltage
Switch the output voltage of the power supply circuit from negative to positive.
Therefore, even if there is no separate oscillation circuit,
A square wave can be generated, making the capacitance detection circuit simple
Circuit configuration.

[0009]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a capacitance detection circuit 1 according to the present embodiment. The capacitance detection circuit 1 includes a capacitor 2 that is a capacitance to be detected and a capacitor 3 that is a reference capacitance. It is an oscillation circuit configured. In this capacitance detection circuit 1, the oscillation frequency and amplitude are
3, the value of the capacitor 2 can be detected based on the value of the capacitor 3. The capacitance detecting circuit 1 includes an integrating circuit 20 including a capacitor 2, a differentiating circuit 30 including a capacitor 3, and a power supply circuit for intermittently applying a predetermined DC voltage to the integrating circuit 20. 40, a sample and hold circuit 50 for holding an output signal from the differentiating circuit 30, and a power supply circuit 40.
An intermittent timing generation circuit 60 for providing a timing signal for intermittently applying a DC voltage thereto, and a hold timing generation circuit 70 for outputting a hold timing signal of an output signal to the sample and hold circuit 50 are provided.

The integrating circuit 20 has, in addition to the capacitor 2, an operational amplifier 21 connected in parallel with the capacitor 2, and a current limiting resistor 22 connected to the input side of the operational amplifier 21. The power supply circuit 40 includes a variable DC voltage source 41 having a negative electrode grounded, a polarity reversing device 42 for reversing the polarity of the variable DC voltage source 41, a variable DC voltage source 41 and a polarity reversing device 42.
And a switching element 43 for switching the connection of the variable DC voltage source 41 and the polarity reversing device 42 alternately by the switching element 43 to switch the voltage of both positive and negative polarities to the integrating circuit 20. It is a push-pull type power supply. In addition, as the switch element 43, FIG.
As shown in the figure, the positive contact where a positive voltage is applied and the negative contact where a negative voltage is applied
Negative contact and one of these positive and negative contacts
Switch element with a movable contact connected to the
Wear. By the power supply circuit 40, a predetermined DC positive voltage + E and a DC negative voltage -E are intermittently and alternately supplied to the integration circuit 20. Such a DC voltage ± E
Is applied, the integration circuit 20 outputs a triangular waveform voltage. One side of this triangular waveform voltage has a predetermined gradient ± R in inverse proportion to the value C0 of the capacitor 2.
Is a ramp (slope) voltage that changes linearly.

The differentiating circuit 30 includes, in addition to the capacitor 3, an operational amplifier 31 connected in series at a stage subsequent to the capacitor 3, a resistor 32 connected in parallel with the operational amplifier 31 and applying a negative feedback to the operational amplifier 31, and a capacitor 32. 33, and is connected to the subsequent stage of the integration circuit 20. When triangular voltage of the integration circuit 20 is input, from the differentiating circuit 30, the slope ± values C ₁ and the lamp voltage of the capacitor 3
A rectangular wave having a DC voltage ± V proportional to R as a peak voltage is output.

The sample and hold circuit 50 includes a capacitor 51 for holding the input voltage, a buffer amplifier 52 that can output the voltage held by the capacitor 51 to the outside without attenuating it, and a holding timing from the holding timing generation circuit 70. And a switch element 53 that is closed by a signal to input the output signal of the differentiating circuit 30 to the capacitor 51.

The intermittent timing generation circuit 60 includes the integration circuit 20
The switch element 43 of the power supply circuit 40 is operated based on a signal obtained by adding the input voltage and the output voltage of
It has two resistors 61 and 62 connected between the input and output of the integrating circuit 20, respectively, and a comparator 63 for comparing the sum of the input and output voltages of the integrating circuit 20 with the ground potential (0 volt). ing. The intermittent timing generation circuit 60 operates the switch element 43 of the power supply circuit 40 so that the power supply circuit 40 outputs a rectangular wave voltage.

The holding timing generation circuit 70 includes the integration circuit 20
The comparator 71 compares the output voltage of the comparator 71 with the ground potential (0 volt).
And a comparator 72 for comparing the output voltage of the power supply circuit 40 with the ground potential (0 volt), and a NOR circuit 73 to which output signals from the comparators 71 and 72 are input. The operation of the sample-and-hold circuit 50 is performed based on the signal generated by the hold timing generation circuit 70, and the output of the differentiation circuit 30 when both the output voltage of the integration circuit 20 and the output voltage of the power supply circuit 40 are negative. The voltage is held in the sample and hold circuit 50.

The NOR circuit 73, as shown in FIG.
This is a circuit including two transistors 74 and 75. The collectors of the transistors 74 and 75 are connected to a positive DC voltage source + V _CC via a protection resistor 76. Transistors 74 _and 75
Is connected to a negative DC voltage −V _CC . The output of the comparator ₇₁ is connected to the base of the transistor 74 via a protection resistor 77. The output of the comparator 72 is connected to the base of the transistor 75 via a protection resistor 78. Only when the voltages applied to the bases of the two transistors 74 and 75 are low and the transistors 74 and 75 are non-conductive, the NOR circuit 73 is formed so that its output becomes high.

The output of the sample and hold circuit 50 is
The output voltage of the variable DC voltage source 41 is input to the variable DC voltage source 41 via the operational amplifier 54 and is adjusted according to the magnitude of the output of the sample and hold circuit 50. Accordingly, when the capacitance of the capacitor 2 changes in a quadratic curve with respect to a force such as pressure, a feedback loop 55 for correcting the output to a linear characteristic proportional to the force applied to the capacitor 2 and the like is provided. Is formed.

Next, the operation of this embodiment will be described with reference to FIG. The waveforms shown in FIGS. 3A to 3G are voltage waveforms detected at points A to G shown in FIG. 1, respectively. First, assuming that the polarity invertor 42 of the power supply circuit 40 is connected to the integration circuit 20 by the operation of the switch element 43 at the time t0, the integration circuit 20 has the following configuration, as shown in FIG. DC voltage -E is provided. The integrating circuit 20 integrates the input DC voltage -E and outputs a ramp (gradient) voltage that changes linearly with a gradient -R to the differentiating circuit 30, as shown in FIG. When a ramp voltage is input to the differentiating circuit 30, a DC voltage + V having a polarity opposite to that of the slope -R is generated at the output thereof as shown in FIG.

When the lamp voltage reaches the input DC voltage -E at time t1 and further becomes lower than the DC voltage -E, the sum of the input and output voltages of the integrating circuit 20 becomes lower than the ground potential (0 volt). Then, the intermittent timing generation circuit 60
Outputs a signal to the power supply circuit 40, switches the switch element 43, connects the polarity reversing device 42 and the integration circuit 20, and shuts off the variable DC voltage source 41 and the integration circuit 20 to invert the polarity of the power supply circuit 40. Let it. When the sum of the input and output voltages of the integrating circuit 20 drops even slightly below the ground potential (0 volt), the polarity of the power supply circuit 40 is instantaneously inverted, so that the peak value of the lamp voltage is almost equal to the DC voltage -E. By repeating the polarity inversion of the power supply circuit 40, a ramp (slope) having a gradient ± R inversely proportional to the value C _{0 of the} capacitor 2 is provided at a point B in FIG.
An isosceles triangular wave signal having both sides of the voltage is periodically output as shown in FIG. When the triangular wave-shaped signal is input to the differentiating circuit 30, a rectangular wave having a peak voltage of the DC voltage ± V proportional to the gradient ± R value C ₁ and the lamp voltage of the capacitor 3 to a point C in FIG. 1 , Are periodically output as shown in FIG.

At this time, the triangular wave output from the integrating circuit 20 is monitored by the comparator 71, and every time the value of the triangular wave becomes positive, the comparator 71 outputs a positive polarity signal as shown in FIG. A voltage is output. The rectangular wave output from the power supply circuit 40 is monitored by the comparator 72. Every time the value of the rectangular wave becomes positive, the voltage of the negative electrode is output from the comparator 72 as shown in FIG. Is output. When the polarity of the triangular wave of the integrating circuit 20 is negative and the polarity of the rectangular wave of the power supply circuit 40 is positive, a predetermined time S has already passed in which the switching operation of the switch element 43 of the power supply circuit 40 is completely completed. Since later, the output of the differentiating circuit 30 is in a state where the voltage has settled to a constant value. The timing when the polarity of the triangular wave of the integrating circuit 20 is negative and the polarity of the rectangular wave of the power supply circuit 40 is positive is as shown in FIG.
Both of the 72 outputs coincide with the timing at which the output becomes 0 volt. For this reason, the output of the NOR circuit 73 is input as a trigger signal to the sample-and-hold circuit 50, and when the switch element 53 is closed by the trigger signal, a stable voltage value is obtained as shown in FIG. The value of the capacitor 2 which is the capacitance to be detected is detected based on the detected value.

According to the above-described embodiment, the following effects can be obtained. That is, the DC voltage V DC voltage by the integrating circuit 20 converts the lamp voltage gradients R which is inversely proportional to the value C ₀ of the capacitor 2, and inputs the ramp voltage to a differential circuit 30 is proportional to the value C ₁ of the capacitor 3 The output voltage V that is proportional to the ratio C ₁ / C ₀ of the values of these capacitors 2 and 3 is obtained by converting the value of the capacitors 2 and 3 into a value. Thus, the capacitance can be detected with a simple configuration.

Further, since the switching element 43 of the power supply circuit 40 is operated by the intermittent timing generation circuit 60 to switch the polarity of the power supply circuit 40, the integration circuit 20 becomes a part of the oscillation circuit and It is not necessary to separately provide an oscillation circuit to apply a rectangular wave to the circuit, and this also simplifies the entire capacitance detection circuit 1.

Further, a sample-and-hold circuit for appropriately inputting and holding a constant value of the output on the output side of the differentiating circuit 30
Since the DC voltage 50 is connected, the DC positive voltage + E is intermittently given to the integrating circuit 20 by the power supply circuit 40, so that the DC voltage V output from the differentiating circuit 30 does not become a continuous signal. Outputs a signal of a continuous DC voltage, and can directly extract a DC signal without connecting a low-pass filter or the like, thereby obtaining good responsiveness.

The triangular wave of the integrating circuit 20 and the power supply circuit
Hold timing generation circuit 70 that monitors both 40 square waves
After the output voltage of the differentiating circuit 30 has settled to a constant value, the holding timing generating circuit 70 causes the sample and hold circuit 50 to hold the output voltage of the differentiating circuit 30, so that a stable voltage value is detected. As a result, an accurate value of the capacitor 2 can be detected.

Further, an operational amplifier 54 is provided in a feedback loop 55 that feeds back the output of the sample and hold circuit 50 to the power supply circuit 40, so that both positive and negative feedback can be applied by the feedback loop 55. When used as a sensor or the like, even when the capacitance of the capacitor 2 changes in a quadratic curve or the like with respect to a force such as pressure,
The output can be corrected to a linear characteristic proportional to the force applied to the capacitor 2 by the negative feedback loop 55.

The present invention is not limited to the above-described embodiment, but includes the following modifications. That is, when the output of the differentiating circuit is held, the polarity of the triangular wave of the integrating circuit 20 is negative and the power supply circuit 40
Not only when the polarity of the rectangular wave is positive, but also when the triangular wave of the integrating circuit 20 is positive and the rectangular wave of the power supply circuit 40 is negative. In this case, the polarity of the output is reversed.

[0026]

[0027] In addition, as the product minute circuit and the differential circuit,
An integrating circuit 20 having a capacitor 2 serving as a capacitance to be detected
In addition to the differentiating circuit 3 having the capacitor 3 serving as the reference capacitance, an integrating circuit having the capacitor 3 serving as the reference capacitance and a differentiating circuit having the capacitor 2 serving as the detected capacitance may be used. If an integrating circuit and a differentiating circuit are employed, it is possible to obtain an output voltage that is inversely proportional to the pressure applied to the capacitor 2 as the capacitance to be detected.

Further, in FIG. 2, the switch elements are described as contacted elements such as relays, but these may be all non-contact switches such as bipolar transistors and MOSFETs. Can be easily integrated into an IC.

[0029]

As described above, according to the present invention, the responsiveness of the entire circuit can be improved with a simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

FIG. 2 is a detailed circuit diagram showing a NOR circuit of the embodiment.

FIG. 3 is a graph for explaining the operation of the embodiment.

FIG. 4 is a circuit diagram for explaining the background art of the present invention.

[Explanation of symbols]

 1 Capacitance detection circuit 2 Capacitor as capacitance to be detected 3 Capacitor as reference capacitance 20 Integrator 30 Differentiator

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G01R 27/26 G01D 5/24 G01L 1/14

Claims (3)

(57) [Claims] To claim 1 In order to detect the reference capacitance to be detected electrostatic capacitance to be measured on the basis, while the integrating circuit consists of the reference capacitance and the object to be detected electrostatic capacitance, before < br /> Symbol reference capacitance and the composed of the other of the detected capacitance differential times, which is connected downstream of Rutotomoni the integrator circuit
The output voltage switches from one of the positive voltage and the negative voltage to the other.
Connected to the input side of the integrating circuit.
Power supply circuit, and an intermittent timer for causing the power supply circuit to switch the polarity of the output voltage.
An integration circuit, the integration circuit includes an operational amplifier, and a positive input terminal.
When a voltage is input, the slope that falls from the input voltage
Output voltage, and the negative input voltage
Is input, the ascending slope that rises from the input voltage
The intermittent timing generation circuit outputs an integrated output voltage.
The signal that sums the voltage and the output voltage is input.
When the signal drops below 0 volts, the output of the power supply circuit
The input voltage is switched from positive to negative and the signal is
If the output voltage exceeds the default, the output voltage of the power supply circuit becomes negative.
A capacitance detecting circuit for switching from a pole to a positive pole . 2. The capacitance detection circuit according to claim 1, wherein
Te, the said power supply circuit, and positive contacts the positive voltage is applied,
A negative contact to which the negative voltage is applied;
A movable contact selectively connected to one of the negative contacts.
A capacitance detection circuit provided with a switch element . Te wherein the electrostatic capacitance detection circuit odor of claim 1 or claim 2, the sample-hold circuit for holding the output is connected to the output side of the pre-Symbol differentiating circuit, and the output of the power supply circuit A capacitance detection circuit is connected to a holding timing generation circuit for judging timing for holding the output of the differentiating circuit based on the output of the integrating circuit and the output of the integrating circuit.