JPS62182673A - Capacity converter - Google Patents

Abstract

PURPOSE:To obtain a capacity converter that is hardly affected by the scattering of electrons or a temperature by comparing the output of operation amplifying means and an operating voltage with each other to output a binary voltage and applying the voltage related to the binary voltage to a first input end. CONSTITUTION:The inverted input end (-) of a differential amplifier Q1 is connected to one end of a sensor capacity CM via a cable CB wherein a conductor CW is surrounded by a guard GD. The inverted input end (-) of a comparator Q2 is connected to the output end of the amplifier Q1 and an operating voltage V0 is applied to the non-inverted input end (+) of the comparator Q2 via a resistor R1. Switches S1 and S2 are connected between the positive power supply +E of the amplifier Q1 and a positive power supply end T1 and between the negative power supply -E and a negative power supply end T2, respectively. The closing and opening of the switches S1 and S2 are controlled by the output of the comparator Q2. A binary operating voltage V0 to which the output of a comparator Q3 is suitably divided is obtained at the output end of an amplifier Q4. Thus, a capacity converter that is hardly affected by the scattering of electrons of a temperature can be obtained.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention relates to a capacitance conversion device that converts a process variable such as pressure detected via a sensor capacitance into an electrical signal.
In particular, the present invention relates to a capacitance conversion device that converts sensor capacitance into a frequency signal.

<Prior Art> FIG. 5 is a schematic diagram showing the configuration of a conventional capacitance conversion device.

CM is the sensor capacitance to be measured, one end of which is connected to the input end of the inverter G1. A bidirectional constant current circuit CC is connected between the input and output terminals of the inverter G1, and its output terminal is also connected to the input terminal of the inverter G2. The output end of the inverter G2 is connected to the other end of the sensor capacitor CM. Csl” s□ is one end of the sensor capacitance,
This is a distributed capacitance formed between the other end and the common potential point COM. Each inverter G0°G2 is energized by power supply voltage +E.

Now, when the output of inverter G2 is 1H1 (high level) and voltage +E is occurring, this rise causes the series circuit of sensor capacitance CM and distributed capacitance Jl [Cs 1 to be rapidly charged, and the distributed capacitance increases. When the terminal voltage of sl suddenly reaches a constant voltage, the voltage rises almost vertically. In the charging operation at this time, the output impedance of the inverter G2 is extremely small, so the existence of the distributed capacitance "s2" becomes irrelevant. Also,
At this time, the output of inverter G0 is 1L1 (low level)
At the same time, the circuit CC is connected between the input and output terminals of the inverter G1, so the electric charge of the distributed capacitance Csl is connected between the bidirectional constant current circuit CC and the inverter G.
The discharge starts immediately through the output impedance of the inverter G0, but this discharge N current is limited to a constant current 11 by the bidirectional constant current circuit CC, so that it linearly flows to the inverter G0.
When the voltage at the input terminal of inverter G1 decreases to the threshold level vTH, the output of inverter G1 changes to 1H1, and as a result, the output of inverter G2 becomes ILl, so that the residual distributed capacitance Csl decreases. After the charge is rapidly discharged through the sensor capacitor IC and the voltage at the input end of the inverter G0 drops vertically, the inverter G0
The distributed capacitance Csl is charged by the constant current i passing through the bidirectional constant current circuit CC by @Ilg at the output terminal of the inverter G, and the voltage at the input terminal of the inverter G increases linearly.

When the voltage at the input terminal of inverter G1 reaches the threshold level vVc, the output of inverter G1 changes to ILIH, and thereby the output of inverter G2 Fi@H1
Therefore, charging from inverter G2 is performed again. Repeat this from now on.

Here, the terminal voltage change e1 of the distribution capacitor ic with respect to the threshold level vTH as a reference is the output voltage of the inverter G2, 1 E
Since it is the partial pressure of M el-CM''ml E (t).

Also, the terminal voltage change e1 is at the threshold level vTH
The time 11/ required for the voltage to decrease to 11/ is expressed by the following equation based on the constant current 11 regulated by the bidirectional constant current circuit CCJC↓.

11tt = e1(CM+C,)
(2) Calculating time 11/ from equations (1) and (2), '1' = CM - (3) Note that as charging and discharging are repeated, the distribution capacity "slK" changes according to the threshold level vTH. The electric charge is determined as a reference potential, and charging and discharging are performed around this, so
Charging side terminal voltage change e1 and discharging side terminal voltage change e2
By performing the photoelectric charge corresponding to 82 terminal voltage changes with a constant current 1 from the bidirectional constant current circuit CCK, the required charging time t2' also becomes equal to t1'.

Therefore, the oscillation frequency f is expressed by the following equation.

In addition, the constant determined by the constant current 11 and the power supply voltage is K
Then, the oscillation frequency f corresponds to the sensor capacitance 0MK, and the influence of the distribution capacitance tc,c is eliminated, sl
s2 will be.

<Problems to be solved by the invention> However, such conventional capacitance conversion devices are realized by using the constant current characteristics of semiconductor elements such as field effect transistors as a bidirectional constant current circuit CC. Means for Solving> In order to solve the above problems, the present invention provides a method in which the sensor capacitance to be measured and the first input terminal are connected in negative feedback to the output terminal via a fixed capacitor, and one end of the sensor capacitance is connected. An operating voltage is applied to the M2 input terminal, and a comparator means for comparing the output of the operational amplifying means and the operating voltage to output a binary pressure, and a voltage related to this binary voltage. A resistive means for applying a voltage to the first input terminal, and a voltage operating means for outputting a binary operating voltage having a predetermined amplitude by applying a binary voltage, so as to output an operating voltage corresponding to the sensor capacitance. It is composed of

<Function> According to the configuration of the present invention, as the operating voltage changes in two values, a voltage amplified by the capacitance ratio of the fixed capacitance and the sensor capacitance is generated at the output of the operational amplification means, and this output is The oscillation is continued by repeating a half cycle of time during which the voltage is pulled back to the operating voltage value by the current injected from the resistance means.

<Example> Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention.

This is a diagram.

The inverting input terminal (-) of the differential amplifier Q1 is connected to one end of the sensor fCM via a cable CB whose core wire CW is surrounded by a guard GD, and there is a fixed capacitance between it and the output terminal. Connected via CK. The non-inverting input terminal (+) of the differential amplifier Q0 is connected to the operating voltage V together with the guard GD. is applied. A capacitor C0 is connected between the positive power supply terminal T and the negative power supply terminal T2 of the differential amplifier Q1, and an operating voltage V is applied to the negative power supply terminal T2 via the main capacitor C2.

The inverting input terminal (-) of the comparator Q is connected to the output terminal of the differential amplifier Q0, and the operating voltage V is applied to its non-inverting input terminal (+) via a resistor R1.

A switch and a switch 81 are connected between the positive power supply +E and the positive power supply terminal T1 and between the negative power supply -E and the negative power supply terminal T2 of the differential amplifier Q, respectively.
．． 82 are connected, and the opening and closing of these switches Si*Sz are controlled by the output of the comparator Q2.

The inverting input terminal (-) of the comparator Q3, whose non-inverting input terminal (+) is connected to the common potential point COM, is connected to the output terminal of the comparator Q2, and the output terminal is connected to the differential amplifier Q1 via the resistor R2. It is connected to the inverting input terminal (-) and also to the input terminal of a voltage dividing circuit formed by resistors R3 and R4.

The voltage dividing points of resistors 3 and 84 are connected to the input end of an amplifier Q4 which functions as a voltage follower.

At the output terminal of the amplifier Q, an operating voltage V having a z value is obtained by appropriately dividing the output of the comparator Q3.

Comparator QQ and amplifier Q4 are each connected to the positive power supply 2'
3 +E, negative voltage negative power supply - energized.

Next, the operation of the embodiment shown in FIG. 1 having one or more configurations will be explained using the waveform diagram shown in FIG. 2. First of all,
A description of compensation for distributed capacitance will be omitted.

Operating voltage V at the amplifier Q4Ω output terminal. At the point indicated by ■ in Figure 2 (a) when Q changes from -V to +V, the differential amplifier Q
If the amount of change in the output of 1 is e2, the following equation is obtained in consideration of charge fluctuation.

(e-(+v))CK= (+V-(-V))CM
(6) In this state, the inverting input terminal (-) of comparator Q2 is set to a positive voltage greater than +V (@2 Figure-1
) non-inverting input terminal ←) changes from -V to +vK, but as a whole, the positive voltage at the inverting input terminal (-) becomes dominant and comparator Q
The output terminal of 2 becomes -E 1L'' level (see figure 2))
. Kono@1. The positive feedback of the g level by the capacitor C3 ensures that the level is inverted, but after a predetermined period of time, the voltage at the non-inverting input terminal (+) of the comparator Q2 becomes the operating voltage -vK via the resistor R1. It is settled (Fig. 2 (
Ha)).

On the other hand, the level inversion of the output of the comparator Q2 makes the output level of the comparator Q3 the +E l Hl level (Fig. 2 (E)).
), this +E voltage is applied to the fixed customer 1k via resistor R2.
Charge CK with current 12. Therefore, the voltage at the output terminal of the differential amplifier Q1 gradually decreases as shown in the middle part of FIG. Operating voltage +V at the non-inverting input terminal (+) of differential amplifier Q1
When the voltage at the ratio-inverting input terminal (-) reaches , the voltage level at the output terminal is inverted and reaches point (3). The required time t is '-(e-(''v))CK/i2
(7) is given as

From equations (6) and (7), 2V (8) “= C
It becomes M' sword. Here, the voltages across the resistor R in the half cycle after time 0 and the half cycle after time 0 in Fig. 2 are respectively shown as (E-v) and (-E-(-v)), so the current The size of 12 is as follows. Furthermore, since the operating voltage V is the output voltage of the comparator Q3 divided by the resistors R3 and R4, its magnitude 1
v1 becomes. Therefore, it follows from equations (8) to α0. This equation shows that the time width t of a half cycle of the operating voltage (2) is determined by the sensor capacitor CM and the resistance value and is not affected by fluctuations in the power supply voltage.

Next, compensation for the distributed capacitance ffrcBA occurring inside the differential amplifier Q1 as shown in FIG. 3 will be explained.

The switch S is opened and closed 1' by the output of the comparator Q2.
2 is controlled (see Figure 2), the positive power supply terminal T1 and the negative power supply terminal T
A period in which the potential of 2 is fixed at 10 and -E, and a period in which the potential of 70 is fixed are created. In the floating period, the operating voltage V.

With the voltage charged in the capacitor C2, both the positive power supply terminal T and the negative power supply terminal T2 become voltages shifted positive by 2v (-v-(-v)) (Fig. 2 (G), (I)). )X The output voltage of the amplifier Q4 is applied to the non-inverting input terminal ←) of the differential amplifier Q1, and its inverting input terminal (-) follows the potential of the non-inverting input terminal (+) and is the same as the output voltage of the amplifier Q4. becomes. Therefore, since the output of amplifier Q4 shown in Figure 2 (A) and the changes in Figures 2 (G) and (A) are the same, there is no change in the voltage across the distributed capacitor C8A shown in Figure 3. . Further, the voltage across the distributed capacitor g#Csl is always zero as in the case shown in FIG. From the above, no current flows through the distributed capacitance CC, and its influence is removed.

FIG. 4 is a schematic diagram showing another embodiment of forming a guard. Since the fixed capacitance CK is eliminated in equation (8), guard driving can be performed using the output of the differential amplifier Q1 using this. In this case, the distribution volume "sl" is formed in parallel with the fixed customer fjlcK.

Note that the distributed capacitance C formed at the input section of the differential amplifier Q1
When 8A is very small, the α-type result can be obtained by omitting the switch Sl, 82 and the capacitor C2 and simply energizing the differential amplifier Q1 with ±E. At this time, use the guard drive as the 4th
As shown in the figure, this is done using the output of the differential amplifier Q1, and the signal can be transmitted to its non-inverting input terminal (+) independently of the output of the amplifier Q4.

<Effects of the Invention> As specifically explained above in conjunction with the embodiments, according to the present invention, an easily stabilized resistor is used instead of the conventional bidirectional constant current circuit using a semiconductor element. Since it is possible to obtain an excavation period, that is, an oscillation frequency, which is proportional to the sensor capacitance, it is possible to realize a capacitance conversion device that is hardly affected by variations in elements or temperature.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a waveform diagram showing waveforms of various parts of the embodiment shown in Fig. 1, and Fig. 3 explains the guard configuration in the embodiment of the present invention. The explanatory diagram, FIG. 4, shows an embodiment of the present invention. FIG. 5 is a partial block diagram showing another guard configuration. FIG. 5 is a block diagram showing the configuration of a conventional capacitance conversion device. CM...Sensor capacitance, Ql...Differential amplifier, Q2.
Q3...Comparator, Q4...Amplifier, CK...Fixed capacitance, C3□Ic5AICs2...Distributed capacitance, CC・
・Bidirectional constant current circuit. Agent Patent Attorney Shinsuke Ozawa: 2
Figure 2

Claims (1)

[Claims] a sensor capacitance to be measured; a first input terminal connected to an output terminal via a fixed capacitor for negative feedback; and an operational amplifier means to which one end of the sensor capacitance is connected and an operating voltage is applied to a second input terminal. a comparison means for comparing the output of the operational amplification means with the operating voltage and outputting a binary voltage; a resistance means for applying a voltage related to the binary voltage to the first input terminal; A capacitance conversion device that outputs the operating voltage corresponding to the sensor capacitance, the voltage operating means receiving a voltage and outputting the binary operating voltage having a predetermined amplitude.