JPH05109824A - Method of mounting flip chip of electronic parts - Google Patents
Method of mounting flip chip of electronic partsInfo
- Publication number
- JPH05109824A JPH05109824A JP3296321A JP29632191A JPH05109824A JP H05109824 A JPH05109824 A JP H05109824A JP 3296321 A JP3296321 A JP 3296321A JP 29632191 A JP29632191 A JP 29632191A JP H05109824 A JPH05109824 A JP H05109824A
- Authority
- JP
- Japan
- Prior art keywords
- bump
- chip
- laser light
- bumps
- transparent substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
- H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は電子部品のフリップチッ
プ実装方法に関する。具体的にいうと、金属製のバンプ
を有するチップ型電子部品をバンプを基板側に向けて
(すなわち、フェースダウンで)載置し、電子部品のバ
ンプを基板の電極に金属−金属接合(熱圧着、溶接、ろ
う接等)させるフリップチップ実装方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip mounting method for electronic parts. Specifically, a chip-type electronic component having metal bumps is mounted with the bumps facing the substrate side (that is, facedown), and the bumps of the electronic components are bonded to the electrodes of the substrate by metal-metal bonding (thermal treatment). The present invention relates to a flip chip mounting method in which pressure bonding, welding, brazing, etc.) are performed.
【0002】[0002]
【従来の技術】図7(a)(b)に従来のフリップチッ
プ実装方法を示す。従来にあっては、まず、図7(a)
に示すように、半田バンプ等のバンプ22を設けられた
IC(集積回路)チップ21をバンプ22を下にして
(不透明)基板23の上に載置してフラックス等によっ
てICチップ21を仮止めする。ついで、このチップ搭
載基板をリフロー炉内に入れて加熱することによってバ
ンプ22を溶融させ、図7(b)に示すように溶融後固
化したバンプ22を基板23の配線パターンのランド部
24に接合させ、ICチップ21を基板23にフリップ
チップ実装している。2. Description of the Related Art FIGS. 7A and 7B show a conventional flip chip mounting method. In the conventional case, first, FIG.
As shown in, an IC (integrated circuit) chip 21 provided with bumps 22 such as solder bumps is placed on the (opaque) substrate 23 with the bumps 22 facing down, and the IC chips 21 are temporarily fixed by flux or the like. To do. Next, the chip-mounted substrate is put in a reflow oven to be heated to melt the bumps 22, and the bumps 22 solidified after melting are bonded to the land portions 24 of the wiring pattern of the substrate 23 as shown in FIG. 7B. Then, the IC chip 21 is flip-chip mounted on the substrate 23.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、このよ
うな実装方法によれば、バンプのみでなく、ICチップ
もリフロー炉内で加熱されるので、高温で加熱するとI
Cチップの配線が断線する恐れがあり、ICチップに用
いられている配線材料の融点温度によって加熱温度の上
限が定まる。ICチップの配線材料としては、通常、あ
まり融点温度の高くないAl系の配線材料が用いられて
いるため、バンプとして使用可能な金属材料としては融
点の比較的低い金属に限定されてしまうという問題があ
った。However, according to such a mounting method, not only the bumps but also the IC chips are heated in the reflow furnace.
The wiring of the C chip may be broken, and the upper limit of the heating temperature is determined by the melting point temperature of the wiring material used for the IC chip. Since the wiring material of the IC chip is usually an Al-based wiring material having a not so high melting point temperature, the metal material usable as the bump is limited to a metal having a relatively low melting point. was there.
【0004】一方、高耐環境性を必要とされる用途で
は、高融点金属のバンプを用いてICチップを基板に実
装することが望まれていた。On the other hand, in applications requiring high environmental resistance, it has been desired to mount the IC chip on the substrate by using bumps made of refractory metal.
【0005】本発明は叙上の従来例の欠点に鑑みてなさ
れたものであり、その目的とするところは、高融点金属
バンプを有するチップ型電子部品の基板へのフリップチ
ップ実装を可能にすることにある。The present invention has been made in view of the above-mentioned drawbacks of the conventional example, and an object thereof is to enable flip-chip mounting of a chip-type electronic component having a refractory metal bump on a substrate. Especially.
【0006】[0006]
【課題を解決するための手段】本発明による電子部品の
フリップチップ実装方法は、透明な基板の電極の上にチ
ップ型電子部品のバンプを載置し、この透明基板を透過
させて前記電極もしくはバンプにレーザ光を照射させる
ことにより、電子部品のバンプを透明基板の電極に接合
させることを特徴としている。According to a flip chip mounting method of an electronic component according to the present invention, a bump of a chip type electronic component is mounted on an electrode of a transparent substrate, and the transparent substrate is penetrated to the electrode or The bumps of the electronic component are joined to the electrodes of the transparent substrate by irradiating the bumps with laser light.
【0007】[0007]
【作用】本発明にあっては、透明な基板を用いて基板の
裏面側からバンプ及び電極をレーザ加熱するようにした
ので、電子部品をフェースダウンで実装するフリップチ
ップ実装法においてもバンプ及び電極をレーザ光で加熱
して接合させることができる。しかも、熱容量の小さな
バンプ又は基板の電極をレーザ光によって局所的ないし
集中的に加熱することができるので、加熱効率が極めて
高く、接合部周辺や電子部品に熱的ダメージを与えるこ
とがない。In the present invention, since the bumps and electrodes are laser-heated from the back surface side of the substrate by using the transparent substrate, the bumps and electrodes are mounted even in the flip chip mounting method for mounting electronic parts face down. Can be joined by heating with laser light. Moreover, since the bump or the electrode of the substrate having a small heat capacity can be locally or intensively heated by the laser light, the heating efficiency is extremely high and the periphery of the joint and the electronic component are not thermally damaged.
【0008】このため、接合部周辺や電子部品に影響を
与えることなく、バンプ材料として高融点金属を用いる
ことができ、熱的に高い安定性を有するフリップチップ
実装が可能になる。Therefore, the refractory metal can be used as the bump material without affecting the periphery of the joint and the electronic parts, and the flip chip mounting with high thermal stability becomes possible.
【0009】[0009]
【実施例】図1(a)(b)は本発明の一実施例による
フリップチップ実装方法を示す断面図、図2は図1
(a)の部分拡大図である。この実施例にあっては、ガ
ラス板や透明フィルム等の透明基板3の表面に不透明な
配線パターンが形成されている。一方、内部に集積回路
のベアチップを封止されたICチップ1の上面には金属
バンプ2が設けられている。このバンプ2の材質として
は高融点金属材料を用いることもできる。また、バンプ
2の形状はどのような形状をしていても差し支えない。1 (a) and 1 (b) are sectional views showing a flip chip mounting method according to an embodiment of the present invention, and FIG.
It is a partially expanded view of (a). In this embodiment, an opaque wiring pattern is formed on the surface of the transparent substrate 3 such as a glass plate or a transparent film. On the other hand, a metal bump 2 is provided on the upper surface of an IC chip 1 in which a bare chip of an integrated circuit is sealed inside. A refractory metal material may be used as the material of the bumps 2. Further, the bump 2 may have any shape.
【0010】しかして、バンプ2を下にしてICチップ
1を図1(a)に示すようにフェースダウンにし、各バ
ンプ2を透明基板3の表面に形成された配線パターンの
ランド部4の上に載置する。ついで、図1(a)及び図
2に示すように、レーザ源(図示せず)から出射された
レーザ光5をレンズ6によって集束させ、集束されたレ
ーザ光5を透明基板3を透過させて透明基板3の裏面側
からランド部4及びバンプ2に向けて照射する。これに
よってランド部4及びバンプ2がレーザ光5によってレ
ーザ加熱されて熱を発生し、バンプ2及びランド部4の
一部が溶融して互いに金属−金属接合し、図1(b)に
示すようにICチップ1が透明基板3にフリップチップ
実装される。Then, the IC chip 1 is face down as shown in FIG. 1A with the bumps 2 facing down, and each bump 2 is placed on the land portion 4 of the wiring pattern formed on the surface of the transparent substrate 3. Place on. Then, as shown in FIGS. 1A and 2, the laser light 5 emitted from the laser source (not shown) is focused by the lens 6, and the focused laser light 5 is transmitted through the transparent substrate 3. The land 4 and the bumps 2 are irradiated from the back surface side of the transparent substrate 3. As a result, the land portion 4 and the bump 2 are laser-heated by the laser light 5 to generate heat, part of the bump 2 and the land portion 4 are melted and metal-metal bonded to each other, and as shown in FIG. The IC chip 1 is flip-chip mounted on the transparent substrate 3.
【0011】上記のような実装方法によれば、レーザ光
5を絞ることによってバンプ2及びランド部4を局所的
に加熱することができ、しかも、熱はICチップ1と反
対側のランド部4側からバンプ2に伝わるので、ICチ
ップ1が加熱されにくく、接合時の熱によってICチッ
プ1を損う恐れが極めて小さい。従って、バンプ材料と
して高融点金属を用いていても、ICチップ1等に影響
を与えることなくバンプ2をランド部4に接合させるこ
とができる。According to the mounting method as described above, the bump 2 and the land portion 4 can be locally heated by narrowing down the laser beam 5, and the heat is applied to the land portion 4 on the side opposite to the IC chip 1. Since it is transmitted to the bump 2 from the side, the IC chip 1 is hard to be heated, and the risk of damaging the IC chip 1 by the heat at the time of bonding is extremely small. Therefore, even if a refractory metal is used as the bump material, the bump 2 can be bonded to the land portion 4 without affecting the IC chip 1 or the like.
【0012】図3は本発明の別な実施例によるフリップ
チップ実装方法を示す断面図である。この実施例にあっ
ては、透明基板3の表面に設けられているランド部4の
中央にレーザ光透過用の穴7を開口してある。このた
め、透明基板3の裏面側からバンプ2に向けてレーザ光
5を照射すると、透明基板3を透過したレーザ光5はラ
ンド部4の穴7を通って直接バンプ2に当たり、バンプ
2を溶かしてランド部4に接合させる。FIG. 3 is a sectional view showing a flip chip mounting method according to another embodiment of the present invention. In this embodiment, a hole 7 for transmitting laser light is opened at the center of the land portion 4 provided on the surface of the transparent substrate 3. Therefore, when the laser light 5 is irradiated from the back surface side of the transparent substrate 3 toward the bumps 2, the laser light 5 transmitted through the transparent substrate 3 directly hits the bumps 2 through the holes 7 of the land portion 4 and melts the bumps 2. The land portion 4 is joined.
【0013】したがって、この実施例によれば、ランド
部4にレーザ光5が当たらないので、ランド部4ないし
配線パターンのレーザ光5による損傷を防止することが
できる。Therefore, according to this embodiment, since the land portion 4 is not irradiated with the laser light 5, it is possible to prevent the land portion 4 and the wiring pattern from being damaged by the laser light 5.
【0014】図4は本発明のさらに別な実施例によるフ
リップチップ実装方法を示す断面図である。この実施例
においては、透明基板3のランド部4の上にICチップ
1をフェースダウンで載置した後、上方からICチップ
1の背面に力Fを加えて押圧し、ICチップ1のバンプ
2とランド部4とを加圧により確実に密着させておき、
この状態で透明基板3を透過させてランド部4及びバン
プ2にレーザ光5を照射し、バンプ2とランド部4とを
接合させるようにしている。FIG. 4 is a sectional view showing a flip chip mounting method according to still another embodiment of the present invention. In this embodiment, after the IC chip 1 is placed face down on the land portion 4 of the transparent substrate 3, a force F is applied to the back surface of the IC chip 1 from above and the bumps 2 of the IC chip 1 are pressed. And land part 4 are firmly brought into close contact with each other by pressure,
In this state, the transparent substrate 3 is transmitted to irradiate the land portion 4 and the bump 2 with the laser light 5 so that the bump 2 and the land portion 4 are bonded to each other.
【0015】このようにICチップ1を押圧してバンプ
2をランド部4に強制的に密着させた状態でレーザ加熱
するようにすれば、ランド部4やバンプ2の高さ精度が
多少悪くてもバンプ2とランド部4とを確実に接合させ
ることができる。If the laser heating is performed while pressing the IC chip 1 so that the bumps 2 are forcibly brought into close contact with the land portions 4, the height accuracy of the land portions 4 and the bumps 2 will be somewhat poor. Also, the bump 2 and the land portion 4 can be reliably bonded to each other.
【0016】図5は本発明のさらに別な実施例を示す断
面図である。この実施例にあっては、透明な導電性材料
(例えば、ITO)を用いて透明基板3の表面に透明な
ランド部8を形成してある。従って、このランド部8の
上にICチップ1のバンプ2を載置し、透明基板3の裏
面側からレーザ光5を照射すると、レーザ光5は透明基
板3及び透明なランド部8を透過してバンプ2に照射さ
れる。従って、レーザ光5を直接バンプ2に照射するこ
とができ、融点の高いバンプ2であっても効率的にバン
プ2を溶融させ、バンプ2をランド部8に接合させるこ
とができる。FIG. 5 is a sectional view showing still another embodiment of the present invention. In this embodiment, the transparent land portion 8 is formed on the surface of the transparent substrate 3 using a transparent conductive material (for example, ITO). Therefore, when the bump 2 of the IC chip 1 is placed on the land portion 8 and the laser light 5 is irradiated from the back surface side of the transparent substrate 3, the laser light 5 passes through the transparent substrate 3 and the transparent land portion 8. And the bump 2 is irradiated. Therefore, the laser light 5 can be directly applied to the bump 2, and even the bump 2 having a high melting point can be efficiently melted and the bump 2 can be bonded to the land portion 8.
【0017】図6は本発明のさらに別な実施例を示す断
面図である。この実施例にあっては、透明基板3の表面
に熱放射率の高いレーザ光吸収体層9を形成し、このレ
ーザ光吸収体層9の上に金属製のランド部4を積層して
いる。ここで、レーザ光吸収体層9としては、例えばA
l2O3、SnO2等の金属酸化物やアンバー合金等を用
いることができる。しかして、この2層構造のランド部
4の上にバンプ2を載置し、透明基板3の裏面側からレ
ーザ光5を照射し、透明基板3を透過したレーザ光5を
レーザ光吸収体層9に当てる。透明基板3とランド部4
との間にはレーザ光吸収体層9が挿入されているので、
レーザ光5のエネルギーはレーザ光吸収体層9に効率よ
く吸収される。そして、レーザ光吸収体層9は、光→熱
の変換効率の良好な変換器として作用し、レーザ光吸収
体層9で変換された熱によって効率良くバンプ2をラン
ド部4に接合させることができる。FIG. 6 is a sectional view showing still another embodiment of the present invention. In this embodiment, the laser light absorber layer 9 having a high thermal emissivity is formed on the surface of the transparent substrate 3, and the metal land portion 4 is laminated on the laser light absorber layer 9. .. Here, as the laser light absorber layer 9, for example, A
A metal oxide such as l 2 O 3 or SnO 2 or an amber alloy can be used. Then, the bump 2 is placed on the land portion 4 having the two-layer structure, the laser light 5 is irradiated from the back surface side of the transparent substrate 3, and the laser light 5 transmitted through the transparent substrate 3 is absorbed by the laser light absorber layer. Apply to 9. Transparent substrate 3 and land portion 4
Since the laser light absorber layer 9 is inserted between the
The energy of the laser light 5 is efficiently absorbed by the laser light absorber layer 9. Then, the laser light absorber layer 9 acts as a converter with good light-to-heat conversion efficiency, and the heat converted by the laser light absorber layer 9 allows the bumps 2 to be efficiently bonded to the land portions 4. it can.
【0018】この実施例では、レーザ光吸収体層9によ
ってレーザ光5を効率良く熱に変換できるので、レーザ
照射エネルギーを低減でき、接合部の周囲に熱的なダメ
ージを与えることがない。In this embodiment, since the laser light 5 can be efficiently converted into heat by the laser light absorber layer 9, the laser irradiation energy can be reduced and thermal damage is not given to the periphery of the joint.
【0019】[0019]
【発明の効果】本発明によれば、電子部品をフェースダ
ウンで実装するフリップチップ実装法において、バンプ
及び電極をレーザ光で局所的ないし集中的に加熱するこ
とができるので、加熱効率が極めて高く、接合部周辺や
電子部品に熱的ダメージを与えることがない。このた
め、信頼性の高いフリップチップ実装が可能になる。According to the present invention, in the flip-chip mounting method for mounting electronic parts face down, the bumps and electrodes can be locally or intensively heated by laser light, so that the heating efficiency is extremely high. No thermal damage to the periphery of the joint or electronic components. Therefore, highly reliable flip chip mounting is possible.
【0020】また、接合部周辺や電子部品に影響を与え
ることがないので、バンプ材料として高融点金属を用い
ることができ、熱的に高い安定性を有するフリップチッ
プ実装が可能になり、高耐環境性を要求される用途にも
対応可能になる。Further, since it does not affect the periphery of the joint or the electronic parts, refractory metal can be used as the bump material, which enables flip chip mounting with high thermal stability and high resistance. It can also be used for applications that require environmental friendliness.
【図1】(a)(b)は本発明の一実施例によるフリッ
プチップ実装方法を示す断面図である。1A and 1B are cross-sectional views showing a flip-chip mounting method according to an embodiment of the present invention.
【図2】同上の部分拡大断面図である。FIG. 2 is a partially enlarged sectional view of the above.
【図3】本発明の別な実施例によるフリップチップ実装
方法を示す断面図である。FIG. 3 is a sectional view showing a flip chip mounting method according to another embodiment of the present invention.
【図4】本発明のさらに別な実施例によるフリップチッ
プ実装方法を示す断面図である。FIG. 4 is a sectional view showing a flip chip mounting method according to still another embodiment of the present invention.
【図5】本発明のさらに別な実施例によるフリップチッ
プ実装方法を示す断面図である。FIG. 5 is a sectional view showing a flip chip mounting method according to still another embodiment of the present invention.
【図6】本発明のさらに別な実施例によるフリップチッ
プ実装方法を示す断面図である。FIG. 6 is a sectional view showing a flip chip mounting method according to still another embodiment of the present invention.
【図7】(a)(b)は従来例によるフリップチップ実
装方法を示す断面図である。7A and 7B are cross-sectional views showing a conventional flip-chip mounting method.
1 ICチップ 2 バンプ 3 透明基板 4 ランド部 5 レーザ光 1 IC chip 2 bumps 3 transparent substrate 4 land part 5 laser light
Claims (1)
品のバンプを載置し、この透明基板を透過させて前記電
極もしくはバンプにレーザ光を照射させることにより、
電子部品のバンプを透明基板の電極に接合させることを
特徴とする電子部品のフリップチップ実装方法。1. A bump of a chip-type electronic component is placed on an electrode of a transparent substrate, and the electrode or the bump is irradiated with laser light through the transparent substrate.
A flip chip mounting method for an electronic component, characterized in that a bump of the electronic component is bonded to an electrode of a transparent substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3296321A JPH05109824A (en) | 1991-10-15 | 1991-10-15 | Method of mounting flip chip of electronic parts |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3296321A JPH05109824A (en) | 1991-10-15 | 1991-10-15 | Method of mounting flip chip of electronic parts |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05109824A true JPH05109824A (en) | 1993-04-30 |
Family
ID=17832033
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3296321A Pending JPH05109824A (en) | 1991-10-15 | 1991-10-15 | Method of mounting flip chip of electronic parts |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05109824A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001523585A (en) * | 1997-11-20 | 2001-11-27 | ピーエーシー ティーイーシーエイチ − パッケージング テクノロジーズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Method and apparatus for thermally connecting a connection surface of two substrates |
WO2008120453A1 (en) * | 2007-03-29 | 2008-10-09 | Fujifilm Corporation | Organic el panel and method for manufacturing the same |
WO2008120452A1 (en) * | 2007-03-29 | 2008-10-09 | Fujifilm Corporation | Electronic device and method for manufacturing the same |
JP2009270880A (en) * | 2008-05-02 | 2009-11-19 | Micronics Japan Co Ltd | Contact for electrical test of electronic device, manufacturing method thereof, and probe assembly |
JP2010051989A (en) * | 2008-08-27 | 2010-03-11 | Sharp Corp | Laser joining method |
JP2012524389A (en) * | 2009-04-16 | 2012-10-11 | ショット アクチエンゲゼルシャフト | Method for conductively coupling a device on a transparent substrate |
WO2014157716A1 (en) * | 2013-03-29 | 2014-10-02 | 日清紡メカトロニクス株式会社 | Printed wiring board and manufacturing method for mounting substrate using printed wiring board |
WO2018141568A1 (en) * | 2017-02-02 | 2018-08-09 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V. | Method for joining components on a support structure using electromagnetic radiation |
KR20200108340A (en) * | 2018-01-19 | 2020-09-17 | 엔씨씨 나노, 엘엘씨 | How to cure solder paste on a heat fragile substrate |
CN113573497A (en) * | 2020-04-29 | 2021-10-29 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
Citations (6)
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JPS5574147A (en) * | 1978-11-29 | 1980-06-04 | Nippon Telegr & Teleph Corp <Ntt> | Terminal connection |
JPS59193085A (en) * | 1983-04-15 | 1984-11-01 | 株式会社日立製作所 | Circuit board of electronic circuit device |
JPS62144337A (en) * | 1985-12-19 | 1987-06-27 | Matsushita Electric Ind Co Ltd | Manufacture of electrode |
JPH01161725A (en) * | 1987-12-17 | 1989-06-26 | Sony Corp | Manufacture of optical device |
JPH02139944A (en) * | 1988-11-18 | 1990-05-29 | Omron Tateisi Electron Co | Mounting of semiconductor chip |
JPH05291351A (en) * | 1992-04-13 | 1993-11-05 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
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- 1991-10-15 JP JP3296321A patent/JPH05109824A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS5574147A (en) * | 1978-11-29 | 1980-06-04 | Nippon Telegr & Teleph Corp <Ntt> | Terminal connection |
JPS59193085A (en) * | 1983-04-15 | 1984-11-01 | 株式会社日立製作所 | Circuit board of electronic circuit device |
JPS62144337A (en) * | 1985-12-19 | 1987-06-27 | Matsushita Electric Ind Co Ltd | Manufacture of electrode |
JPH01161725A (en) * | 1987-12-17 | 1989-06-26 | Sony Corp | Manufacture of optical device |
JPH02139944A (en) * | 1988-11-18 | 1990-05-29 | Omron Tateisi Electron Co | Mounting of semiconductor chip |
JPH05291351A (en) * | 1992-04-13 | 1993-11-05 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001523585A (en) * | 1997-11-20 | 2001-11-27 | ピーエーシー ティーイーシーエイチ − パッケージング テクノロジーズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Method and apparatus for thermally connecting a connection surface of two substrates |
WO2008120453A1 (en) * | 2007-03-29 | 2008-10-09 | Fujifilm Corporation | Organic el panel and method for manufacturing the same |
WO2008120452A1 (en) * | 2007-03-29 | 2008-10-09 | Fujifilm Corporation | Electronic device and method for manufacturing the same |
JP2008251242A (en) * | 2007-03-29 | 2008-10-16 | Fujifilm Corp | Electronic device and its manufacturing method |
JP2008249839A (en) * | 2007-03-29 | 2008-10-16 | Fujifilm Corp | Organic el panel and manufacturing method therefor |
JP2009270880A (en) * | 2008-05-02 | 2009-11-19 | Micronics Japan Co Ltd | Contact for electrical test of electronic device, manufacturing method thereof, and probe assembly |
JP2010051989A (en) * | 2008-08-27 | 2010-03-11 | Sharp Corp | Laser joining method |
JP2012524389A (en) * | 2009-04-16 | 2012-10-11 | ショット アクチエンゲゼルシャフト | Method for conductively coupling a device on a transparent substrate |
WO2014157716A1 (en) * | 2013-03-29 | 2014-10-02 | 日清紡メカトロニクス株式会社 | Printed wiring board and manufacturing method for mounting substrate using printed wiring board |
WO2018141568A1 (en) * | 2017-02-02 | 2018-08-09 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e. V. | Method for joining components on a support structure using electromagnetic radiation |
KR20200108340A (en) * | 2018-01-19 | 2020-09-17 | 엔씨씨 나노, 엘엘씨 | How to cure solder paste on a heat fragile substrate |
JP2021516451A (en) * | 2018-01-19 | 2021-07-01 | エヌシーシー ナノ, エルエルシー | A method for curing solder paste on thermally fragile substrates |
EP3740340A4 (en) * | 2018-01-19 | 2021-12-15 | NCC Nano, LLC | Method for curing solder paste on a thermally fragile substrate |
CN113573497A (en) * | 2020-04-29 | 2021-10-29 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and manufacturing method thereof |
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