JPH026055A - Method of soldering printed circuit board and silicon chip - Google Patents
Method of soldering printed circuit board and silicon chipInfo
- Publication number
- JPH026055A JPH026055A JP63143797A JP14379788A JPH026055A JP H026055 A JPH026055 A JP H026055A JP 63143797 A JP63143797 A JP 63143797A JP 14379788 A JP14379788 A JP 14379788A JP H026055 A JPH026055 A JP H026055A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- silicon chip
- solder bumps
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 57
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 57
- 239000010703 silicon Substances 0.000 title claims abstract description 57
- 238000005476 soldering Methods 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims description 25
- 229910000679 solder Inorganic materials 0.000 claims abstract description 49
- 238000010438 heat treatment Methods 0.000 claims abstract description 4
- 238000002844 melting Methods 0.000 claims abstract description 4
- 230000008018 melting Effects 0.000 claims abstract description 4
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 238000002834 transmittance Methods 0.000 abstract description 4
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 238000003466 welding Methods 0.000 abstract 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 14
- 238000010586 diagram Methods 0.000 description 11
- 229910052742 iron Inorganic materials 0.000 description 7
- 230000006866 deterioration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000011835 investigation Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8122—Applying energy for connecting with energy being in the form of electromagnetic radiation
- H01L2224/81224—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
Landscapes
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント回路基板とはんだバンプを設けたシ
リコンチップとを電気的に接続するためのはんだ付方法
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a soldering method for electrically connecting a printed circuit board and a silicon chip provided with solder bumps.
従来、この種のはんだ付方法は第６図から第８図に示す
ような方法を用いて行われていた。Conventionally, this type of soldering method has been carried out using the methods shown in FIGS. 6 to 8.
第６図はりフローによる従来のはんだ付方法を示す図で
ある。ここで、１はプリント回路基板、２は電極、３は
シリコンチップ、４ははんだバンプである。はんだバン
プ４はシリコンチップ３上に設けられている。第６図に
示すようにプリント回路基板１上に形成された複数個の
電極２と、シリコンチップ３上に設けられたはんだバン
プ４．とをはんだ付する場合は、まず、プリント回路基
板１上にシリコンチップ３を載置し、次に、プリント回
路基板１全体の加熱により全体をリフローするという方
法によってはんだ付が行われていた。FIG. 6 is a diagram showing a conventional soldering method using a beam flow. Here, 1 is a printed circuit board, 2 is an electrode, 3 is a silicon chip, and 4 is a solder bump. Solder bumps 4 are provided on silicon chip 3. As shown in FIG. 6, a plurality of electrodes 2 are formed on a printed circuit board 1, and solder bumps 4 are provided on a silicon chip 3. When soldering is performed, the silicon chip 3 is first placed on the printed circuit board 1, and then the entire printed circuit board 1 is reflowed by heating.
第７図はばんだゴテによる従来のはんだ付方法を示す図
である。第６図と同様の個所には同一の符号を付す。６
ははんだゴテ、７は位置決め用治具である。第７図に示
すようにフレキシブルプリント回路基板５上に形成され
た複数個の電極２と、位置決め用治具７に収められたシ
リコンチップ３上に設けられたはんだバンブ４とをはん
だ付する場合は、温度調整機能を持ったけんだゴテ６を
フレキシブルプリント回路基板５の裏より押し当てると
いう方法によってはんだバンプ４を溶融し、電極２とは
んだバンブ４とのはんだ付が行われていた。この場合、
はんだゴテ６の平坦度が良くない場合は、未はんだある
いは隣りのパターンとのブリッジが発生していた。FIG. 7 is a diagram showing a conventional soldering method using a soldering iron. The same parts as in FIG. 6 are given the same reference numerals. 6
7 is a soldering iron, and 7 is a positioning jig. When soldering a plurality of electrodes 2 formed on a flexible printed circuit board 5 and solder bumps 4 provided on a silicon chip 3 housed in a positioning jig 7 as shown in FIG. In this method, the solder bumps 4 are melted by pressing a soldering iron 6 having a temperature adjustment function against the back side of the flexible printed circuit board 5, and the electrodes 2 and the solder bumps 4 are soldered. in this case,
When the flatness of the soldering iron 6 is not good, bridges with unsoldered or adjacent patterns occur.
また、上述のようなりフロー法やはんだゴテによるはん
だ付に替わって、近年、レーザによるはんだ付が採用さ
れている。Furthermore, in place of the flow method or soldering using a soldering iron as described above, soldering using a laser has recently been adopted.
第８図はフレキシブルプリント回路基板側からレーザ光
を照射する従来のはんだ付方法を示す図である。第６図
および第７図と同様の個所には同一の符号を付す。８は
光透過性治具、９はレーザ光である。この方法は本発明
者が本出願前に出願しているものである。フレキシブル
プリント回路基板５上に形成された複数個の電極２と、
位置決め用治具７に収められたシリコンチップ３上に設
けられたはんだバンプ４とが対向するように位置決めし
、フレキシブルプリント回路基板５の上部に光透過性治
具８を載置し、フレキシブルプリント回路基板５をシリ
コンチップ３に押しあてる。FIG. 8 is a diagram showing a conventional soldering method in which laser light is irradiated from the flexible printed circuit board side. The same parts as in FIGS. 6 and 7 are given the same reference numerals. 8 is a light-transmitting jig, and 9 is a laser beam. This method was filed by the present inventor before the present application. a plurality of electrodes 2 formed on a flexible printed circuit board 5;
The silicon chip 3 housed in the positioning jig 7 is positioned so that it faces the solder bumps 4 provided on the silicon chip 3, and the light-transmitting jig 8 is placed on top of the flexible printed circuit board 5, and the flexible printed circuit board 5 is placed on top of the flexible printed circuit board 5. The circuit board 5 is pressed against the silicon chip 3.
このような状態で、光透過性治具８の上部からレーザ光
９を照射すると、レーザ光９は光透過性治具８およびフ
レキシブルプリント回路基板５を透過してはんだバンプ
４を溶融し、電極２とはんだバンプ４とのはんだ付が行
われる。In this state, when laser light 9 is irradiated from above the light-transmitting jig 8, the laser light 9 passes through the light-transmitting jig 8 and the flexible printed circuit board 5, melting the solder bumps 4, and damaging the electrodes. 2 and solder bumps 4 are soldered.
し、かじながら、従来のはんだ付方法においては、はん
だ付の装置が大がかりになるという問題点があった。However, the conventional soldering method has the problem that the soldering equipment becomes large-scale.
また、プリント回路基板の熱変形、焼損あるいは熱劣化
が生ずるという問題点もあった。Further, there is also the problem that thermal deformation, burnout, or thermal deterioration of the printed circuit board occurs.
さらに、プリント回路基板上の電極とシリコンチップ上
のはんだバンブとの位置合わせには、かなりの正確さが
要求されるという問題点もあった。Furthermore, there is a problem in that considerable accuracy is required for positioning the electrodes on the printed circuit board and the solder bumps on the silicon chip.
本発明の１つの目的は、上述の問題点を解決し、プリン
ト回路基板の電極と、シリコンチップ上に形成されたは
んだバンブとのはんだ付を良好かつ信頼性をもって行う
ことのできるはんだ付方法を提供することにある。One object of the present invention is to provide a soldering method that solves the above-mentioned problems and that enables good and reliable soldering between electrodes of a printed circuit board and solder bumps formed on a silicon chip. It is about providing.
また、本発明の他の目的は、はんだ付する際に、シリコ
ンチップ上に形成されたはんだバンブを完全に溶融し、
そのときに生ずるはんだの表面張力によってシリコンチ
ップとプリント回路基板との位置決めがなされるという
はんだ付方法を提供することにある。Another object of the present invention is to completely melt the solder bumps formed on the silicon chip during soldering.
The object of the present invention is to provide a soldering method in which the silicon chip and the printed circuit board are positioned by the surface tension of the solder generated at that time.
このような目的を達成するために、本発明は、プリント
回路基板上に設けられた電極と、シリコンチップ上に設
けられたはんだバンブとが接触するように、プリント回
路基板およびシリコンチップを位置決めし、シリコンチ
ップ側からレーザ光を照射して、はんだバンプを加熱溶
融して前記電極と融着させることを特徴とする。さらに
好適な実施態様としては、前記位置決めを、溶融した前
記はんだバンブの表面張力を利用して行うことを特徴と
する。In order to achieve such an object, the present invention positions a printed circuit board and a silicon chip so that electrodes provided on the printed circuit board and solder bumps provided on the silicon chip are in contact with each other. , the solder bumps are heated and melted by irradiating laser light from the silicon chip side to fuse them with the electrodes. A further preferred embodiment is characterized in that the positioning is performed using surface tension of the molten solder bump.
本発明は、プリント回路基板上の電極と、シリコンチッ
プ上のはんだバンプとが接触するようにプリント回路基
板とシリコンチップとを位置決めし、シリコンをある程
度透過する波長を有するレーザ光（ＹＡＧ、ＧＯ２など
は透過率約５０％である）をシリコンチップ側から照射
してシリコンチップ上に形成されたはんだバンブを溶融
することにより、シリコンチップ上のはんだバンプと、
プリント回路基板の電極とのはんだ付を良好に行うこと
ができる。さらに前記好適な実施態様によれば、溶融し
たはんだバンプの表面張力を利用して位置決めを行うの
で、精度上、位置決め作業が簡単になる。The present invention positions the printed circuit board and the silicon chip so that the electrodes on the printed circuit board and the solder bumps on the silicon chip are in contact with each other, and laser light (YAG, GO2, etc.) having a wavelength that passes through silicon to some extent is used. The solder bumps formed on the silicon chip are melted by irradiating the solder bumps formed on the silicon chip by irradiating light (with a transmittance of about 50%) from the silicon chip side.
Good soldering with electrodes on printed circuit boards can be achieved. Further, according to the preferred embodiment, since positioning is performed using the surface tension of the molten solder bump, the positioning work is simplified in terms of accuracy.
以下、図面を参照して本発明の実施例を詳細かつ具体的
に述べる。Hereinafter, embodiments of the present invention will be described in detail and specifically with reference to the drawings.
第１図、第２図および第３図は本発明の一実施例を示す
図である。第１〜第３図において第６〜第８図と同様の
個所には同一の符号を付す。１０はシリコンを透過した
レーザ光である。FIG. 1, FIG. 2, and FIG. 3 are diagrams showing one embodiment of the present invention. In FIGS. 1 to 3, the same parts as in FIGS. 6 to 8 are given the same reference numerals. 10 is a laser beam transmitted through silicon.
第１図に示すように、電極２を上にした状態にしてプリ
ント回路基板１を置き、電極２と、シリコンチップ３に
設けられたはんだバンブ４とを接触させるように位置決
めしてシリコンチップ３を載置する。次に、シリコンチ
ップ３の上面よりレーザ光９を照射する。このときのレ
ーザ光９は第５図に示すようなシリコンの透過特性に従
って、透過率が良い１〜２０μｍの波長をもつもの（例
えばＹＡＧレーザ光で１．０６μｍ、（：０２ レーザ
光では１０．６３μｍなど）を用いる。As shown in FIG. 1, the printed circuit board 1 is placed with the electrodes 2 facing up, and the silicon chip 3 is positioned so that the electrodes 2 and the solder bumps 4 provided on the silicon chip 3 are in contact with each other. Place. Next, a laser beam 9 is irradiated from the upper surface of the silicon chip 3. The laser beam 9 at this time has a wavelength of 1 to 20 μm with good transmittance according to the transmission characteristics of silicon as shown in FIG. 63 μm, etc.).
第１図に示すように、シリコンを透過したレーザ光ｌＯ
は、シリコンチップ３の下面まで到達し、シリコンチッ
プ３の下面に形成されているはんだバンブ４へ熱となっ
て吸収されて、はんだの溶融をもたらす。溶融したはん
だバンブ４はプリント回路基板１上の電極２の加熱をも
たらし、シリコンチップ３上のはんだバンブ４と、プリ
ント回路基板１上の電極２とのはんだ付が行われる。As shown in Figure 1, the laser beam 1O transmitted through silicon
reaches the bottom surface of the silicon chip 3 and is absorbed as heat by the solder bumps 4 formed on the bottom surface of the silicon chip 3, causing the solder to melt. The melted solder bumps 4 heat the electrodes 2 on the printed circuit board 1, and the solder bumps 4 on the silicon chip 3 and the electrodes 2 on the printed circuit board 1 are soldered.
プリント回路基板１とシリコンチップ３の位置決めは、
溶融したはんだバンブの表面張力を利用することが好ま
しい。第２図に示すように、溶融したはんだバンブ４は
表面張力をもち、複数個のはんだバンブ４がそれぞれ複
数個の電極２に対して力を及ぼす。この表面張力を利用
してシリコンチップ３を矢印Ａの方向へ移動させて位置
決めが行われる。このように位置決めを行えば、精度上
、位置決め作業が簡単となる。The positioning of the printed circuit board 1 and silicon chip 3 is as follows:
It is preferable to utilize the surface tension of the molten solder bump. As shown in FIG. 2, the molten solder bumps 4 have surface tension, and each of the plurality of solder bumps 4 exerts a force on the plurality of electrodes 2. Positioning is performed by moving the silicon chip 3 in the direction of arrow A using this surface tension. If the positioning is performed in this manner, the positioning work becomes easier in terms of accuracy.
そして、第３図に示すようにはんだが凝固し良好な、は
んだ付が行われる。矢印Ｂは第２図に示した位置決め位
置から、シリコンチップ３が移動した距離を表わす。本
実施例はリジッドなプリント回路基板のはんだ付例であ
る。Then, as shown in FIG. 3, the solder solidifies and good soldering is achieved. Arrow B represents the distance that silicon chip 3 has moved from the positioning position shown in FIG. This embodiment is an example of soldering a rigid printed circuit board.
第４図は本発明の他の実施例を示す図である。FIG. 4 is a diagram showing another embodiment of the present invention.
第４図において第１〜第３図と同様の個所には同一の符
号を付す。１１は治具である。治具１１には吸気孔１２
を設けである。In FIG. 4, the same parts as in FIGS. 1 to 3 are given the same reference numerals. 11 is a jig. The jig 11 has an intake hole 12
This is provided.
第４図に示すのは、フレキシブルプリント回路基板５と
シリコンチップ３のレーザはんだ付例である。この場合
のはんだ付方法を説明すると、まず、治具１１の上にフ
レキシブルプリント回路基板５を載置する。このとき、
フレキシブルプリント回路基板５の電極パターンを有す
る面が上になるようにする。フレキシブルプリント回路
基板５は、治具１１に設けられた吸気孔１２を通じた吸
気によって平坦に保たれている。FIG. 4 shows an example of laser soldering of the flexible printed circuit board 5 and the silicon chip 3. To explain the soldering method in this case, first, the flexible printed circuit board 5 is placed on the jig 11. At this time,
The side of the flexible printed circuit board 5 having the electrode pattern should face up. The flexible printed circuit board 5 is kept flat by air being sucked in through the suction holes 12 provided in the jig 11.
次に、フレキシブルプリント回路基板５上の電極２と、
シリコンチップ３に設けられたはんだバンブ４とが接触
するようにシリコンチップ３を載置する。このシリコン
チップ３の上部からレーザ光９を照射し、以下、上述の
実施例と同様の手順ではんだ付が行われる。。Next, the electrode 2 on the flexible printed circuit board 5,
The silicon chip 3 is placed so that the solder bumps 4 provided on the silicon chip 3 are in contact with each other. A laser beam 9 is irradiated from above the silicon chip 3, and soldering is then performed in the same procedure as in the above-described embodiment. .
〔発明の効果）
以上説明したように、本発明によれば、プリント回路基
板にシリコンチップをはんだ付する場合ト回路基板とシ
リコンチップとをはんだ付する方法を用いているので、
良好かつ信頼性の高いはんだ付が行われる。[Effects of the Invention] As explained above, according to the present invention, when a silicon chip is soldered to a printed circuit board, a method of soldering the circuit board and the silicon chip is used.
Good and reliable soldering is achieved.
また、プリント回路基板がフレキシブルな場合は、治具
に設けた吸気孔を通じた吸気によってプリント回路基板
を固定することにより、はんだ件部の接触面を平坦にし
て上述のような方法でレーザ光を照射するので同様に良
好なはんだ付を行うことができる。In addition, if the printed circuit board is flexible, by fixing the printed circuit board by inhaling air through the air intake hole provided in the jig, the contact surface of the solder area can be flattened and the laser beam can be applied using the method described above. Since it is irradiated, good soldering can be achieved as well.
さらに、本発明のはんだ付方法ははんだゴテなどを、用
いない非接触式であり、また、はんだバンブ溶融時のは
んだの表面張力を利用する好適な実施態様なので、シリ
コンチップ上のはんだバンブとプリント回路基板上の電
極との正確な位置決めが行われる。Furthermore, the soldering method of the present invention is a non-contact method that does not use a soldering iron or the like, and is a preferred embodiment that utilizes the surface tension of the solder when the solder bumps melt, so the solder bumps on the silicon chip and the printed Accurate positioning with the electrodes on the circuit board is performed.
さらにまた、本発明によれば、シリコンチップ側からの
レーザ光照射によってはんだバンブを溶融するので、低
熱容量であるフレキシブルプリント回路基板において生
じやすい熱劣化あるいは焼損などを防止することができ
る。Furthermore, according to the present invention, since the solder bumps are melted by laser beam irradiation from the silicon chip side, it is possible to prevent thermal deterioration or burnout that is likely to occur in a flexible printed circuit board having a low heat capacity.
第２図は本発明の実施例におけるはんだの溶融状態を示
す図、
第３図は本発明の実施例におけるはんだ付の終了状態を
示す図、
第４図は本発明の他の実施例におけるはんだ付方法を示
す図、
第５図はシリコンへの照射光波長と透過率との関係図、
第６図はりフローによる従来のはんだ付方法を示す図、
第７図はばんだゴテによる従来のはんだ付方法を示す図
、
第８図はフレキシブル回路基板側からレーザ光を照射す
る従来のはんだ付方法を示す図である。Fig. 2 is a diagram showing the molten state of solder in an embodiment of the present invention, Fig. 3 is a diagram showing a completed state of soldering in an embodiment of the present invention, and Fig. 4 is a diagram showing the solder in another embodiment of the invention. Figure 5 is a diagram showing the relationship between the wavelength of light irradiated onto silicon and the transmittance. Figure 6 is a diagram showing the conventional soldering method using a beam flow. Figure 7 is a diagram showing the conventional soldering method using a soldering iron. Figure 8 shows a conventional soldering method in which laser light is irradiated from the flexible circuit board side.
１・・・プリント回路基板、
２・・・電極、
３・・・シリコンチップ、
４・・・はんだバンブ、
５・・・フレキシブルプリント回路基板、９・・・レー
ザ光、
１０・・・シリコンを透過したレーザ光、１１・・・治
具、
１２・・・吸気孔。DESCRIPTION OF SYMBOLS 1... Printed circuit board, 2... Electrode, 3... Silicon chip, 4... Solder bump, 5... Flexible printed circuit board, 9... Laser light, 10... Silicon Passed laser light, 11... Jig, 12... Intake hole.
特許出願人 二ｔ：ｉ’ＡｉＪλ些飯塚幸二本柘明の文
カ已り１」に訂１する１ゴんたイオの朱ト迄欠、Ｕを示
す因第３図
本裕明ｆ）爽姥ｇｌＪ＋： ；ｌ”ｙげるし−ナ泊思射
す承１ホす囲第１図
ネ究明０裏力巳ｇ弔Ｃとけ石けんたーの２餐昂只伏、悲
を示す図第２図
本宅ｐ月の化の文“】り５例にお１す引言んたイ介ホを
丞す凹第４図
破長（大圏
シリコンへの双身を光抜長ヒ透通乎との関イ系凹第５図
リフローによ石ｔＵの１３んた゛付ガ嗜を示す同第
６図
ト土んた゛コ゛テＩ：Ｊ３従来のけルた゛付丁ン老を不
す口笛７崗
只肴針するイ更米／）Ｉゴんた゛イｔτ浪をホす凹第８
脚Patent applicant 2t:i'AiJλI'AiJλSimitsuIizukaKojiMotoTsuaki's text 1"1" Gonta Io's vermilion is missing, U is shown in Figure 3 Moto Hiroaki f) Souha glJ+: ;l”ygerushi-na night musings 1 hosu Illustration 1 Ne investigation 0 Ura Rikimi G condolence The text of the month's transformation "] is the fourth example of the relationship between the two and the light-extracting leader Hi-Tsu to the great circle silicon. Fig. 5 shows how the 13 threads of the stone tU are attached by reflow. #8
leg
Claims (1)
チップ上に設けられたはんだバンプとが接触するように
、前記プリント回路基板および前記シリコンチップを位
置決めし、該シリコンチップ側からレーザ光を照射して
、前記はんだバンプを加熱溶融して前記電極と融着させ
ることを特徴とするプリント回路基板とシリコンチップ
のはんだ付方法。 ２）前記プリント回路基板と前記シリコンチップとの位
置決めを、溶融した前記はんだバンプの表面張力を利用
して行なうことを特徴とする特許請求の範囲第１項記載
のプリント回路基板とシリコンチップのはんだ付方法。[Claims] 1) Position the printed circuit board and the silicon chip so that the electrodes provided on the printed circuit board and the solder bumps provided on the silicon chip are in contact with each other, and A method of soldering a printed circuit board and a silicon chip, the method comprising heating and melting the solder bumps by irradiating a laser beam from the side to fuse them to the electrodes. 2) The solder between the printed circuit board and the silicon chip according to claim 1, wherein the printed circuit board and the silicon chip are positioned using the surface tension of the melted solder bumps. Attachment method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63143797A JPH026055A (en) | 1988-06-13 | 1988-06-13 | Method of soldering printed circuit board and silicon chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63143797A JPH026055A (en) | 1988-06-13 | 1988-06-13 | Method of soldering printed circuit board and silicon chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH026055A true JPH026055A (en) | 1990-01-10 |
Family
ID=15347206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63143797A Pending JPH026055A (en) | 1988-06-13 | 1988-06-13 | Method of soldering printed circuit board and silicon chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH026055A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62143061A (en) * | 1985-12-17 | 1987-06-26 | Canon Inc | Electrostatic charge image developing toner |
| US5208798A (en) * | 1987-11-30 | 1993-05-04 | Pioneer Electronic Corporation | Double-sided disk player |
| US6284998B1 (en) | 1998-06-12 | 2001-09-04 | Visteon Global Technologies, Inc. | Method for laser soldering a three dimensional component |
| US6403399B1 (en) * | 2000-08-11 | 2002-06-11 | Lsi Logic Corporation | Method of rapid wafer bumping |
| KR100448665B1 (en) * | 2002-06-21 | 2004-09-13 | 한국과학기술원 | Light bonding method using multiple reflection |
| KR100873041B1 (en) * | 2002-06-12 | 2008-12-09 | 삼성테크윈 주식회사 | Connecting method between bump of semiconductor package and copper circuit pattern and bump structure of semiconductor package therefor |
| EP3276655A1 (en) * | 2016-07-26 | 2018-01-31 | Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO | Method and system for bonding a chip to a substrate |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62101040A (en) * | 1985-10-26 | 1987-05-11 | Seiko Instr & Electronics Ltd | Method and apparatus for connecting semiconductor element |
-
1988
- 1988-06-13 JP JP63143797A patent/JPH026055A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62101040A (en) * | 1985-10-26 | 1987-05-11 | Seiko Instr & Electronics Ltd | Method and apparatus for connecting semiconductor element |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62143061A (en) * | 1985-12-17 | 1987-06-26 | Canon Inc | Electrostatic charge image developing toner |
| US5208798A (en) * | 1987-11-30 | 1993-05-04 | Pioneer Electronic Corporation | Double-sided disk player |
| US6284998B1 (en) | 1998-06-12 | 2001-09-04 | Visteon Global Technologies, Inc. | Method for laser soldering a three dimensional component |
| US6403399B1 (en) * | 2000-08-11 | 2002-06-11 | Lsi Logic Corporation | Method of rapid wafer bumping |
| KR100873041B1 (en) * | 2002-06-12 | 2008-12-09 | 삼성테크윈 주식회사 | Connecting method between bump of semiconductor package and copper circuit pattern and bump structure of semiconductor package therefor |
| KR100448665B1 (en) * | 2002-06-21 | 2004-09-13 | 한국과학기술원 | Light bonding method using multiple reflection |
| EP3276655A1 (en) * | 2016-07-26 | 2018-01-31 | Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO | Method and system for bonding a chip to a substrate |
| WO2018021912A1 (en) * | 2016-07-26 | 2018-02-01 | Nederlandse Organisatie Voor Toegepast- Natuurwetenschappelijk Onderzoek Tno | Method and system for bonding a chip to a substrate |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS59119844A (en) | Method of brazing by laser flexible wire | |
| US20090025972A1 (en) | Solder Mounting Structure, Manufacturing Method and Apparatus of the Solder Mounting Structure, Electronic Apparatus, and Wiring Board | |
| JPH026055A (en) | Method of soldering printed circuit board and silicon chip | |
| JPH05109824A (en) | Method of mounting flip chip of electronic parts | |
| JPS60234768A (en) | Laser soldering device | |
| JPH0468778B2 (en) | ||
| JPH0671135B2 (en) | IC chip soldering method | |
| JP2555720B2 (en) | Solder bump component mounting method | |
| JPH02280961A (en) | Soldering method of ic chip | |
| JPS63310198A (en) | Bonding method for printed substrate | |
| JPS60182194A (en) | Soldering method | |
| JPH0983128A (en) | Junction structure of semiconductor module | |
| JPS62291934A (en) | Mounting method for flip-chip | |
| JPS59150665A (en) | Soldering method | |
| JP2822496B2 (en) | Soldering lead pins to printed wiring board | |
| JPH11163511A (en) | Method for soldering | |
| JPH08111581A (en) | Method of soldering ball grid array printed wiring board | |
| JPH02247076A (en) | Laser beam soldering device | |
| JPH02139944A (en) | Mounting of semiconductor chip | |
| JPH05283477A (en) | Flip chip mounting method | |
| JP2755087B2 (en) | Removable jig | |
| JPH0575197B2 (en) | ||
| JPH02306693A (en) | Mounting and soldering method for electronic component | |
| JPH07118579B2 (en) | Lead component mounting apparatus and method | |
| JPH01184995A (en) | Mounting method for pin grid array package |