JPH0510516Y2 - - Google Patents

Description

[Detailed explanation of the invention] Industrial application field This invention is used for parallel two-circuit transmission lines in which a branch transmission line is connected to one line, and is used for time-limited setting to coordinate with adjacent sections to detect faulty lines. The present invention relates to a short-circuit protection relay device for parallel two-line power transmission lines that interrupts power transmission lines.

BACKGROUND ART FIG. 5 shows a multi-terminal power transmission line in which a branch power transmission line is connected to one of parallel two-circuit power transmission lines 1L and 2L.
In this multi-terminal power transmission line, power from the power source G is transferred from the A terminal bus to B via parallel two-circuit transmission lines 1L and 2L.
Power is transmitted to the end bus and also to the C end bus via the branch transmission line. Such a multi-terminal power transmission line is equipped with a protective relay device 20 that selectively disconnects the short-circuited faulty line when an accident occurs on either of the parallel two-line power transmission lines 1L, 2L. The protective relay device 20 connects the output voltage of the potential transformer PT placed on the A-end bus and the parallel two-line power transmission line 1L,
Two instrument current transformers each installed in 2L
The difference current between the outputs of the CT is input, the short-circuit faulty line in which the internal fault has occurred is determined, and a trip command signal is output to the short-circuit faulty line side and the disconnector trip devices 21 and 22. This protective relay device 20 includes:
2-circuit power transmission line 1 due to an external accident on the C-terminal bus side
In order to prevent L and 2L from being disconnected, a time limit function is required to coordinate with the protective relay device provided in the adjacent section on the C-terminal bus bar side.

Problems to be Solved by the Invention FIG. 6 shows the configuration of a conventional protective relay device 20. The direction determination circuit 23 inputs the difference current between the output voltage of the transformer PT and the output of the current transformer CT to determine the direction of the faulty line, and determines the direction determination signal S ₁₁ of the first line 1L and the direction of the second line 2L. Outputs signal _S21 .
The overcurrent detection circuit 24 inputs the difference current between the outputs of the current transformer CT and detects an overcurrent, and generates an overcurrent detection signal S _C
Output. Direction judgment signal _S11 and overcurrent detection signal
The AND gate 25 to which S _C is applied calculates the logical product and outputs the logical product signal S ₁₂ to the time-limiting relay 26 . The AND gate 27 to which the direction determination signal S ₂₁ and the overcurrent detection signal S _C are applied calculates the logical product thereof and outputs the logical product signal S ₂₂ to the time-limiting relay 28 .
The time-limited relay 26 receives the AND signal S ₁₂ and outputs a trip command signal St ₁ to the circuit breaker trip device 21 after a settling time. Similarly, time-limited relay 28
receives the AND signal S ₂₂ and outputs a trip command signal St ₂ to the breaker trip device 22 after a settling time.

Next, the operation of this conventional example will be explained with reference to the time charts of FIGS. 7 and 8. Figure 7 shows a distant accident that occurred near the B end of the first line 1L _.
Fig. 8 shows the operation in the case of A of the first line 1L.
The operation in the case of a near-end accident _X2 that occurs near the end is shown.

First _, when a long-distance _accident Because an overcurrent flows into the current transformer CT, a large difference occurs in the output current of the current transformer CT. The direction determination circuit 23 determines the output voltage of the transformer PT and the current transformer CT.
Determine the direction of the faulty line based on the difference current between the outputs of
The direction determination signal S ₁₁ is output to the AND gate 25 .
The overcurrent detection circuit 24 also detects an overcurrent detection signal S _C by increasing the difference current between the outputs of the current transformer CT.
Output to AND gates 25 and 27. When the AND gate 25 receives the direction determination signal S ₁₁ and the overcurrent detection signal _SC , it outputs an AND signal S ₁₂ to the time relay 26 as shown in FIG. 7(3). The time-limited relay 26 to which the AND signal S ₁₂ is applied starts its output operation after a settling time T ₁ as shown in FIG. 7(4), and the breaker trips as shown in FIG. 7(5). A trip command signal St ₁ is output to the device 21. When the fault is removed at time _t2 by the trip command, the voltage on the A-terminal bus returns to normal and no overcurrent flows into the first line 1L. The output voltage of transformer PT becomes normal and the current transformer
When the difference current of the CT output becomes zero, AND gate 2
The direction determination signal S ₁₁ and the overcurrent detection signal S _C are no longer applied to the circuit 5, and the AND signal S ₁₂ is no longer output. When the output of the AND signal _S12 disappears,
The trip command signal St ₁ is no longer output from the time-limited relay 26.

In the near-end fault _X2 of the first line 1L shown in FIG. 8, when the fault occurs at time _t1 , the voltage on the A-end bus becomes zero and an overcurrent flows into the first line 1L. Therefore, as shown in Figure 8 (1), the transformer PT
The output voltage of the current transformer CT becomes zero, and the differential current of the output of the current transformer CT increases as shown in FIG. 8(2). At this time, since the transformer PT and the fault point are very close to each other, the output voltage of the transformer PT becomes almost zero immediately after time _t1 . ~80ms) T Outputs _2- direction determination signal _S12 . Therefore, as shown in FIG. 8(3), a short time T2 _AND signal is output from the AND gate 25 to the time-limited relay 2.
However, since the period T ₂ is shorter than the settling time (about 0.4 s) T ₁ of the time-limited relay 26, as shown in Fig. 8 (5)
As shown in , the tripping command signal St ₁ is not output to the breaker tripping device 21 .

As mentioned above, in _the conventional example, the accident elimination operation output is normally performed when _there is a distant accident be.

The purpose of this invention is to solve the problems of the conventional example,
It is an object of the present invention to provide a short-circuit protection relay device for a parallel two-line power transmission line, which has a time limit function and can normally output a fault removal operation even in the case of a near-end fault.

Means for solving the problem The short-circuit protection relay device for parallel two-circuit transmission lines of this invention has two voltage transformers placed on the parallel two-circuit transmission line. a direction determination circuit that inputs the difference current between the outputs of the current detector and determines the direction of the short-circuit faulty line; an overcurrent detection circuit that inputs the difference current and detects an overcurrent flowing into the short-circuit faulty line; a first logic circuit that takes an AND of an overcurrent detection signal output from the current detection circuit and a first line direction determination signal of one of the outputs of the direction determination circuit; and the overcurrent detection signal and the direction determination circuit. is set by the output of the AND signal of the second logic circuit and the first logic circuit, and is reset when the output of the overcurrent detection signal disappears. a first flip-flop circuit, and a second flip-flop circuit.
a second flip-flop circuit that is set by the output of the AND signal of the logic circuit and reset when the output of the overcurrent detection signal disappears; and a second flip-flop circuit that receives the output of the first flip-flop circuit and outputs a first time-limited output signal. a first time-limited relay that receives the output of the second flip-flop circuit and outputs a second time-limited output signal;
a third logic circuit that calculates a logical product of the time-limited output signal and the overcurrent detection signal and outputs a trip command signal for the disconnector of the first line; and the second time-limited output signal and the overcurrent detection. and a fourth logic circuit that calculates the AND of the signals and outputs a command signal for tripping the disconnector of the second line.

Function The difference current between the output voltage of the transformer placed on the busbar and the output of the two current transformers placed on the parallel two-line power transmission line is fed to a direction determination circuit to determine the direction of the short-circuit fault line. A current is applied to the overcurrent detection circuit to perform overcurrent detection, and the logical product of the first and second line direction determination signals of the direction determination circuit and the overcurrent detection signal of the overcurrent detection circuit is The outputs of the first and second flip-flop circuits are set by the AND signals of the two logic circuits, and when the overcurrent detection signal is no longer output, the outputs are reset. The respective time-limited output signals obtained by applying these short-circuit fault detection signals to the first and second time-limited relays, respectively, and the overcurrent detection signal are ANDed by third and fourth logic circuits, and each of the ANDs is performed. The output is derived as a disconnector trip signal. Therefore, even if the output voltage of the transformer becomes almost zero due to a near-end fault and the direction judgment output of the direction judgment circuit disappears, the first and second flip-flop circuits are not reset and the output of the current transformer is Since the reset is performed when the overcurrent detection signal due to the difference current disappears, the time-limited relay, which operates for a limited time based on the outputs of the first and second flip-flop circuits, is prevented from stopping its output operation as in the conventional example. Therefore, even in the case of a near-end accident, it is possible to normally output an accident removal operation while having a time limit function.

Embodiment An embodiment of this invention will be described based on FIGS. 1 to 4. Similarly to the conventional example, the embodiment to be described below is a protective relay 20 shown in FIG.
The output voltage of the transformer PT placed on the end bus and the current transformer CT placed on the parallel two-circuit transmission line 1L, 2L
and outputs a tripping command to the circuit breaker tripping device 21 provided in the first line 1L and the circuit breaker tripping device 22 provided in the second line 2L. It is.

First, the configuration of the protective relay device 20 of this embodiment will be explained with reference to the block diagram of FIG. This protective relay device 20 includes a direction determination circuit 1, an overcurrent detection circuit 2, an AND gate 3 which is a first logic circuit,
AND gate 4 which is a second logic circuit, first flip-flop circuit 5, second flip-flop circuit 6, first time relay 7, second time relay 8, AND gate 9 which is a third logic circuit, and It is composed of an AND gate 10 which is a fourth logic circuit.

The direction determination circuit 1 inputs the difference current between the output voltage of the transformer PT and the output of the current transformer CT, and outputs the first signal to the AND gate 3 according to the relative phase of these two inputs.
A direction determination signal S ₁₁ indicating the line 1L direction is sent to the AND gate 4 as a direction determination signal indicating the second line 2L direction.
Output S ₂₁ respectively. This direction determination circuit 1 is
Due to the memory effect, the output is retained for a short time even if the input is lost.

The overcurrent detection circuit 2 inputs the difference current between the outputs of the current transformer CT, and when an overcurrent flows into either of the parallel two-line power transmission lines 1L and 2L and the difference current between them exceeds a predetermined value, AND gate 3, 4, 9, 1
Outputs overcurrent detection signal _SC to 0. This overcurrent detection signal S _C is also applied to each reset terminal R of the flip-flop circuits 5 and 6.

The AND gate 3 inputs the direction determination signal S ₁₁ from the direction determination circuit 1 and the overcurrent detection signal S _C from the overcurrent detection circuit 2, calculates the logical product of these two inputs, and generates the logical product signal S ₁₂ is applied to the set terminal S of the flip-flop circuit 5.

The AND gate 4 inputs the direction determination signal S ₂₁ from the direction determination circuit 1 and the overcurrent detection signal S _C from the overcurrent detection circuit 2, calculates the logical product of these two inputs, and generates a logical product signal S. ₂₂ is applied to the set terminal S of the flip-flop circuit 6.

The flip-flop circuit 5 is set at the rising edge of the AND signal _S12 outputted from the AND gate 3, and reset at the rising edge of the overcurrent detection signal _SC . While the flip-flop circuit 5 is set, the first line failure detection signal _S1 is output from its output terminal Q to the time relay 7.

The flip-flop circuit 6 is set at the rising edge of the AND signal _S22 , and reset at the falling edge of the overcurrent detection signal _SC . While the flip-flop circuit 6 is set, the second line failure detection signal _S2 is output from its output terminal Q to the time relay 8.

When the time-limited relay 7 receives the first line failure detection signal S ₁ from the flip-flop circuit 5, it provides an output signal S ₁₃ to the AND gate 9 after a settling time determined in time coordination with the adjacent section.

When the time limit relay 8 receives the second line failure detection signal S ₂ from the flip-flop circuit 6, it provides an output signal S ₂₃ to the AND gate 10 after a settling time.

The AND gate 9 performs a logical product of the overcurrent detection signal _SC from the overcurrent detection circuit 2 and the output signal _S13 of the time-limited relay 7, and issues a trip command signal St to the circuit breaker tripping device 21. Outputs ₁ .

The AND gate 10 performs a logical product of the overcurrent detection signal S _C and the output signal S ₂₃ of the time-limited relay 8 and outputs a trip command signal St ₂ to the circuit breaker trip device 22 . AND gates 9 and 10 are connected to flip-flop circuits 5 and 6 and time relays 7 and 10.
This prevents a trip command from being output due to a malfunction of 8.

Next, the operation of this embodiment will be explained in detail with reference to the time charts of FIGS. 2 to 4.
Figure 2 shows a case where a long-distance fault occurs on the first line 1L, Figure 3 shows a case where a long-distance fault occurs on a branch transmission line connected to the second line 2L, and Figure 4 shows a case where a long-distance fault occurs on the first line 2L. This shows a case where a near-end accident occurs in 1L.

First, refer to the time chart in Figure 2 and start
The operation when a distant accident occurs on line 1L will be explained. When an accident occurs at time t ₁ , Fig. 2 (1)
As shown in FIG. 2, the output voltage of the transformer PT decreases, and at the same time, as shown in FIG. 2(2), the differential current of the output of the current transformer CT increases. When the output voltage and the difference current are input, the direction determination circuit 1 ANDs the direction determination signal _S11 of the first line 1L as shown in FIG. 2(3).
Output to gate 3. In addition, the overcurrent detection circuit 2
As shown in FIG. 2 (4), an overcurrent detection signal S _C is output as the difference current increases. When the AND gate 3 receives the direction determination signal S ₁₁ and the overcurrent detection signal S _C ,
As shown in FIG. 2(5), the AND signal _S12 is output to the set terminal S of the flip-flop circuit 5. When the AND signal _S12 rises, the flip-flop circuit 5 outputs the first line failure detection signal _S1 to the time relay 7 as shown in FIG. 2(6). Time-limited relay 7
gives an output signal _S13 to the AND gate 9 after settling time _T1 , as shown in FIG. 2(7). When the AND gate 9 receives both the output signal S ₁₃ of the time-limiting relay 7 and the overcurrent detection signal _SC , it outputs the trip command signal St ₁ as shown in FIG. 2 (8).

Tripping command signal St ₂ is output at time t ₂ ,
When the first line 1L is briefly disconnected, the output voltage of the transformer PT becomes normal, and the differential current between the outputs of the current transformer CT becomes zero. Then, the direction determination signal _S11 and the overcurrent detection signal _SC will no longer be output. When the overcurrent detection signal _SC falls, the flip-flop circuit 5 is reset and the first line failure detection signal _S1 is no longer output. AND gate 9 outputs overcurrent detection signal S _C
When it is no longer given, the trip command signal St ₁ is no longer output.

Next, referring to FIG. 3, an explanation will be given of the operation when a remote accident occurs on the branch power transmission line connected to the second line 2L. When a fault occurs at time _t1 , the output voltage of transformer PT decreases and at the same time the differential current between the outputs of current transformer CT increases. Due to these input changes,
The direction determination circuit 1 receives the direction determination signal of the second line 2L.
_S21 , and the overcurrent detection circuit 2 outputs an overcurrent detection signal _SC . The AND gate 4 to which the direction determination signal S ₂₁ and the overcurrent detection signal _SC are applied sends the AND signal S ₂₂ to the set terminal S of the flip-flop circuit 6.
give to When the AND signal S ₂₂ rises, the flip-flop circuit 6 provides an output signal S ₂₃ to the time-limiting relay 8. In this accident, the protective relay for the branch power line, whose settling time is set shorter than the settling time T ₁ of the time-limited relay 8, first performs the fault removal operation. Therefore, as shown in FIG. 3 (7), the fault is removed at time t ₂ before the settling time T ₁ of the time-limited relay 8 is reached, and the trip command signal St ₂ is output from the AND gate 10.
remains unoutputted.

Next, referring to FIG. 4, an explanation will be given of the operation when a near-end accident occurs, which is a problem in the conventional example. When a near-end fault occurs in the first line 1L at time _t1 , the output voltage of transformer PT becomes almost zero immediately after time _t1 , and the differential current between the outputs of current transformer CT increases. Although the output voltage of the transformer PT becomes almost zero immediately after time _t1 , the direction determination circuit 1 has a memory effect and outputs the _T2 direction determination signal _S11 for a short time as shown in FIG. 4(3). do. The direction determination signal S ₁₁ and the overcurrent detection signal S _C are given to the AND gate 3, and the AND signal is
By applying S ₁₂ to the set terminal, the flip-flop circuit 7 receives the first line failure detection signal S ₁
is output to the time-limited relay 7. This first line failure detection signal _S1 is output until the overcurrent detection signal _SC applied to the reset terminal R of the flip-flop circuit 5 falls. When the first line failure detection signal S ₁ is applied and the settling time T ₁ has elapsed, the time relay 7 provides an output signal S ₁₃ to the AND gate 9.
The AND gate 9 outputs the trip command signal St ₁ in response to the output signal S ₁₃ of the time-limited relay 7 and the overcurrent detection signal _SC .

Tripping command signal St ₁ is output at time t ₂ ,
When the first line 1L is briefly disconnected, the output voltage of the transformer PT is restored to normal, and the differential current between the outputs of the current transformer CT becomes zero. When the differential current between the outputs of the current transformer CT becomes zero, the flip-flop circuit 5 is reset and the first line failure detection signal _S1 is no longer output.
When the overcurrent detection signal S _C is no longer applied, the AND gate 9 no longer outputs the trip command signal St ₁ .

As described above, in this embodiment, due to the operation of the flip-flop circuits 5 and 6, even if the output voltage of the transformer PT becomes zero due to a near end fault, the overcurrent is detected in the current transformer CT. , since the failure detection signals S ₁ and S ₂ are given to the time-limited relays 7 and 8, their settling time
A situation in which the failure detection signals S ₁ and S ₂ are no longer inputted before T ₁ elapses and the trip command signals St ₁ and St ₂ are not output from the AND gates 9 and 10 does not occur. Therefore, it is possible to solve the problem of the conventional example in which when a near-end fault occurs, the faulty line is not immediately disconnected and the fault is not removed.

Effects of the invention According to the short-circuit protection relay device for parallel two-line power transmission lines of this invention, even if the output voltage of the transformer becomes almost zero due to a near end fault and the direction judgment output of the direction judgment circuit is lost, the flip-flop The output of the circuit is not reset, and the reset is performed as soon as the overcurrent detection due to the difference current between the current transformer outputs disappears, which prevents the time-limited relay, which operates for a limited time based on the output of the flip-flop circuit, from ceasing to output. Therefore, even in the case of a near-end accident, it is possible to normally output an accident removal operation while having a time limit function.

Furthermore, it is possible to prevent a trip command from being erroneously output due to a malfunction of the flip-flop circuit and time-limited relay provided for detecting a close-end fault, thereby improving reliability. .

[Brief explanation of drawings]

Figure 1 is a block diagram showing the configuration of an embodiment of this invention, Figures 2 to 4 are time charts for explaining the operation of an embodiment of this invention, and Figure 5 is a parallel two-line power transmission line. 6 is a block diagram showing the configuration of a conventional example, and FIGS. 7 and 8 are time charts for explaining the operation of the conventional example. 1...Direction determination circuit, 2...Overcurrent detection circuit,
3, 4, 9, 6...AND gate, 5, 6...Flip-flop circuit, 7, 8...Time-limiting relay, 2
0...Protective relay device.

Claims (1)

[Scope of utility model registration request] a direction determination circuit that determines the direction of a short-circuit fault line by inputting the output voltage of a voltage transformer placed on the busbar and the difference current between the outputs of two voltage transformers placed on the parallel two-line power transmission line; an overcurrent detection circuit that inputs the difference current and detects an overcurrent flowing into the short-circuit faulty line; an overcurrent detection signal output from the overcurrent detection circuit; and a first one of the output of the direction determination circuit. a first logic circuit that takes an AND of line direction determination signals; a second logic circuit that takes an AND of the overcurrent detection signal and a second line direction determination signal, the other of the outputs of the direction determination circuit; Said first
A first flip-flop circuit that is set by the output of the AND signal of the logic circuit and reset when the output of the overcurrent detection signal disappears; a second flip-flop circuit that is reset when the output of the detection signal disappears; a first time-limiting relay that receives the output of the first flip-flop circuit and outputs a first time-limited output signal; a second time-limited relay that receives the output and outputs a second time-limited output signal; and a logical product of the first time-limited output signal and the overcurrent detection signal to issue a trip command for the disconnector of the first line. a third logic circuit that outputs a signal; and a fourth logic circuit that performs a logical product of the second time limit output signal and the overcurrent detection signal and outputs a trip command signal for the disconnector of the second line. Short-circuit protection relay device for parallel two-line power transmission line equipped with a circuit.