JPS6124899B2 - - Google Patents

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Publication number
JPS6124899B2
JPS6124899B2 JP55103604A JP10360480A JPS6124899B2 JP S6124899 B2 JPS6124899 B2 JP S6124899B2 JP 55103604 A JP55103604 A JP 55103604A JP 10360480 A JP10360480 A JP 10360480A JP S6124899 B2 JPS6124899 B2 JP S6124899B2
Authority
JP
Japan
Prior art keywords
zero
current
polarity
terminal
sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55103604A
Other languages
Japanese (ja)
Other versions
JPS5731324A (en
Inventor
Kunio Matsuzawa
Akira Yoshida
Hiroshi Sasaki
Atsuhiro Yoshizaki
Fumio Iwatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Tokyo Electric Power Co Holdings Inc
Original Assignee
Tokyo Electric Power Co Inc
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Power Co Inc, Hitachi Ltd filed Critical Tokyo Electric Power Co Inc
Priority to JP10360480A priority Critical patent/JPS5731324A/en
Publication of JPS5731324A publication Critical patent/JPS5731324A/en
Publication of JPS6124899B2 publication Critical patent/JPS6124899B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は抵抗接地系統の地絡保護リレー方式に
係り、特に、故障選択性に効果がある電流差動リ
レーに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ground fault protection relay system for a resistive grounding system, and more particularly to a current differential relay that is effective in fault selectivity.

従来の抵抗接地系統の地絡保護方式としては、
零相電圧、零相電流による方向判定リレーを用
い、保護対象区間各端子において外部方向と見る
端子がなく、いずれかの端子でも内部方向と見れ
ば前記区間内故障と判断し、各端子にトリツプ指
令を与えるいわゆる方向比較リレー方式を用いて
いる。又、性能向上策として、各端子の方向リレ
ーの検出感度を故障発生とともに低感度に走査し
結果的には零相有効分電流の差動特性を得る方式
がある。
Conventional ground fault protection methods for resistance grounding systems include:
Using a direction determination relay based on zero-sequence voltage and zero-sequence current, if there is no terminal in each terminal in the protected area that is considered to be in the external direction, and any terminal is considered to be in the internal direction, it is determined that there is a fault within the area, and a trip is applied to each terminal. It uses a so-called direction comparison relay system that gives commands. In addition, as a measure to improve performance, there is a method in which the detection sensitivity of the directional relay of each terminal is scanned to a low sensitivity as soon as a failure occurs, and as a result, differential characteristics of the zero-sequence effective current are obtained.

しかし、従来方式では2端子系統に限定すれば
上記の差動特性が得られるが、3端子以上の分岐
のある多端子送電線の保護目的に対しては性能が
不十分である。
However, although the conventional system can obtain the above-mentioned differential characteristics if limited to a two-terminal system, its performance is insufficient for the purpose of protecting multi-terminal power transmission lines with branches of three or more terminals.

本発明の目的は、保護区間各端子の地絡有効分
電流を総合的に判別し、多端子系統においても故
障検出感度を向上することにある。
An object of the present invention is to comprehensively determine the ground fault active current of each terminal in a protection zone, and to improve failure detection sensitivity even in a multi-terminal system.

本発明は、保護区間各端子における故障時の零
相電流の有効分を検出する手段として、内部方向
と外部方向の識別を任意の扇形位相特性により判
別し、無効分電流の通過、および外部故障電流通
過に対して比率差動特性が得られるようにした。
As a means for detecting the active component of the zero-sequence current at the time of a fault at each terminal in the protection zone, the present invention distinguishes between the internal direction and the external direction using arbitrary fan-shaped phase characteristics, and detects the passage of the reactive component current and the external fault. It was made possible to obtain ratio differential characteristics for current passage.

本発明の実施例を第1図に示す3端子分岐系統
単線図をもとにして説明する。同図に示す記号と
動作についてつぎに述べる。電力系統は電気所
A,BおよびCから成り、各電気所の設置物の内
容は同等物についてはサフイツクスによりA,
B,Cの場所を示すものとする。EA,EB,EC
は電源である。もちろん電源EA,EB,ECはそ
れぞれ短絡容量、電圧位相が任意に整定できる同
期運転系統であり、負荷端になることもあり得る
ものである。TA,TB,TCは各々変圧器であ
り、その中性点は接地抵抗RA,RB,RCで接地
されたものを示すが、実際には対地静電容量補償
用リアクトル接地となることもあり得る。CBA
CBB,CBCはしや断器である。PLは保護対象送
電線である。LA,LB,LCは保護リレーに必要
な情報を伝送するための電力線搬送波の阻止フイ
ルタ用インダクタンスである。CA,CB,CC
電力線搬送波送信用結合コンデンサである。
CTA,CTB,CTCは変流器であり、PLを通過す
る零相分電流を取り出すためのもので、その出力
を各々IOA,IOB,IOCで表わす。PTA,PTB
PTCは電圧変成器であつて、それぞれ零相電圧V
OA,VOB,VOCを取り出すものである。ここで、
PTA,PTB,PTCの出力電圧VOA,VOB,VOC
ほぼ同位相で同一電圧になるように、電圧変成
比、極性を定める。
An embodiment of the present invention will be described based on a single line diagram of a three-terminal branch system shown in FIG. The symbols and operations shown in the figure will be described below. The power system consists of electric stations A, B, and C, and the contents of each electric station's installations are A,
The locations of B and C shall be shown. E A , E B , E C
is the power supply. Of course, the power supplies E A , E B , and E C are synchronous operation systems in which the short-circuit capacity and voltage phase can be set arbitrarily, and they can also serve as load ends. T A , T B , and T C are each transformers, and their neutral points are shown to be grounded by grounding resistors R A , R B , and R C , but in reality, they are grounded by reactors for compensating ground capacitance. It is possible that CB A ,
CB B and CB C are breakers. PL is the protected transmission line. L A , L B , and L C are inductances for power line carrier blocking filters for transmitting information necessary for the protection relay. C A , C B , and C C are coupling capacitors for power line carrier wave transmission.
CT A , CT B , and CT C are current transformers for taking out the zero-sequence current passing through PL, and their outputs are represented by I OA , I OB , and I OC , respectively. PT A , PT B ,
PT C is a voltage transformer, each with a zero-sequence voltage V
It extracts OA , V OB and V OC . here,
The voltage transformation ratio and polarity are determined so that the output voltages V OA , V OB , and V OC of PT A , PT B , and P C are approximately in phase and at the same voltage.

一方、CTA,CTB,CTCはPLの故障時に流入
する電流がVOと同位相になる方向に各々極性を
合せておく。すなわち、PLの内部故障時にはVO
とIOが同位相となり、外部故障時には故障点に
近い端子が流出方向でVOとIOが逆位相となり、
他の流入端子はVOとIOが同位相となる接続方法
をとる。1A,1B,1Cは零相電流の有効分電流
に比例したパルス幅を取り出すための電流・パル
ス幅変換器である。その内容については後に述べ
る。2A,2B,2Cは電力線搬送波を送、受信す
るための搬送端局装置である。3A,3B,3C
各々の端子において、1A,1B,1Cで取り出し
たパルス幅を演算することによつて、零相電流の
有効分電流に対する差動特性を得るための差動判
定部である。3A,3B,3Cにおいて内部故障と
判定したときには、各々の出力によりしや断器
CBA,CBB,CBCにしや断指令を与える。もちろ
ん、しや断器の信頼度を増すために別に転送トリ
ツプ指令により、各端子全てにオア論理のしや断
指令を与えてもよい。
On the other hand, the polarities of CT A , CT B , and CT C are adjusted so that the current flowing in when the PL fails is in the same phase as V O . In other words, when the PL internally fails, V O
and I O are in phase, and in the event of an external fault, the terminal near the fault point is in the outflow direction, and V O and I O are in opposite phase.
The other inflow terminals are connected so that V O and I O are in phase. 1 A , 1 B , and 1 C are current/pulse width converters for extracting a pulse width proportional to the effective component current of the zero-sequence current. The contents will be discussed later. 2 A , 2 B , and 2 C are carrier terminal equipment for transmitting and receiving power line carrier waves. 3 A , 3 B , and 3 C are used to obtain the differential characteristics for the effective component current of the zero-sequence current by calculating the pulse widths taken at 1 A , 1 B , and 1 C at each terminal. This is a differential determination section. When it is determined that there is an internal failure in 3 A , 3 B , and 3 C , a power disconnection is activated by each output.
Give a shedding command to CB A , CB B , and CB C. Of course, in order to increase the reliability of the breaker, an OR logic breaker command may be given to all terminals by a separate transfer trip command.

以上、本発明の全体構成を述べたが、とくに本
発明の効果を発揮する部分について具体的に実施
例により説明する。尚、第1図と同等物は同一記
号を用い、各端子同等物については電気所Aを代
表例にして説明する。
The overall configuration of the present invention has been described above, and the parts that exhibit the effects of the present invention will be specifically explained using examples. Components equivalent to those in FIG. 1 are given the same symbols, and each terminal equivalent will be explained using electric station A as a representative example.

第1図の1A、すなわち零相有効分電流の電流
パルス幅変換器の機能について述べる。ここで
は、次の(1)、(2)、(3)式を順次実行する。
The function of the current pulse width converter of 1 A in FIG. 1, that is, the zero-sequence effective current, will be described. Here, the following equations (1), (2), and (3) are executed sequentially.

S1=IOA/2∫〓sinθdθ ……(1) S1=kIOA/2∫〓sinθdθ ……(2) S=S1+(−S2) ……(3) ここで、IOAは入力とした零相電流であり、α
は零相電圧VOAを基準位相としたときの零相電流
OAの任意の遅れ位相差を示す。このため、S1
OAとIOAが同極性のときのIOAの積分値、S2
OAとIOAが逆極性のときのIOAの積分値を夫々
示している。θは角度についての積分変数であ
り、(2)式のkは本発明の地絡保護リレーの流入電
流範囲の整定するための係数である。係数kの整
定の考え方について以下説明する。
S 1 = I OA /2∫ x 〓sinθdθ …(1) S 1 =kI OA /2∫〓 p sinθdθ …(2) S=S 1 +(−S 2 ) …(3) Here, I OA is the input zero-sequence current, α
represents an arbitrary delayed phase difference of the zero-sequence current I OA when the zero-sequence voltage V OA is the reference phase. Therefore, S 1 represents the integral value of I OA when V OA and I OA have the same polarity, and S 2 represents the integral value of I OA when V OA and I OA have opposite polarities. θ is an integral variable regarding the angle, and k in equation (2) is a coefficient for setting the inflow current range of the earth fault protection relay of the present invention. The concept of setting the coefficient k will be explained below.

第2図は零相有効分電流を取り出す場合の位相
特性の説明図である。同図aは零相電圧VOを基
準にしたときの零相電流IOの流入電流域と流出
電流域の整定例を示す。すなわち、VO基準で位
相差φ(おくれ、進みの絶対相差角)のハツチン
グを施した部分が流入電流域で他は流出電流域で
ある。この第2図aの特性を得たいときには、第
2図bに示すように零相電圧VOAの波形を基準に
して、IOAの同符号の面積S1(上記(1)式)と異符
号の面積S2(上記(2)式)が第2図aで示した位相
差α=φのときに相互に等しくなる(S1=S2)よ
うに、φに応じて(2)式の係数kを定めればよい。
つまり、次式のようにしてkを定める。
FIG. 2 is an explanatory diagram of the phase characteristics when extracting the zero-sequence effective current. Figure a shows an example of setting the inflow current region and outflow current region of the zero-sequence current I O when the zero-sequence voltage V O is used as a reference. That is, the hatched portion of the phase difference φ (lag and lead absolute phase difference angles) based on V O is the inflow current region, and the rest is the outflow current region. When you want to obtain the characteristic shown in Figure 2a, as shown in Figure 2b, the waveform of the zero-sequence voltage VOA is used as a reference, and the area S1 of the same sign of IOA is different from the area S1 (formula (1) above). Equation (2) is adjusted according to φ so that the area S 2 of the code (formula (2) above) becomes equal to each other (S 1 =S 2 ) when the phase difference α=φ shown in Figure 2a. It is sufficient to determine the coefficient k of .
That is, k is determined as shown in the following equation.

このようにしたとき、(3)式のSが本発明での地
絡有効分電流の量を示すものである。
When this is done, S in equation (3) represents the amount of ground fault active current in the present invention.

本方式によれば、VOAとIOAが同位相、すなわ
ち、α=0゜ではS=IOA(流入方向 正) α=180゜ではS=kIOA(流出方向 負) となり、有効分は第3図aのごとき特性となる。
According to this method, V OA and I OA are in the same phase, that is, when α = 0°, S = I OA (positive inflow direction), and when α = 180°, S = kI OA (negative outflow direction), and the effective component is The characteristics are as shown in Figure 3a.

このように、第1図の電流・パルス巾変換器1
Aでは前記Sで示すレベルに応じたパルス幅変換
を行う。同図aにおいてSaは流入、Sbは流出を
意味する。第3図bは、第3図aの例Sa,Sb
対するパルス幅変換の概念図であり、SaはTa
幅に、SbはTbの幅にパルスを発生するもので所
定のパルス幅出力後は断続的な出力とする。しか
も、Saは地絡有効分電流の正の値を示し、パル
スのレベル“断”をTa間とし、Sbは地絡有効分
電流の負の値を示し、パルス幅のレベル“有り”
をTb間とする例である。
In this way, the current/pulse width converter 1 in FIG.
At A , pulse width conversion is performed according to the level indicated by S above. In Figure a, S a means inflow and S b means outflow. FIG. 3b is a conceptual diagram of pulse width conversion for examples S a and S b in FIG. 3 a, where S a generates a pulse with a width of T a and S b generates a pulse with a width of T b . After outputting a predetermined pulse width, the output is intermittent. In addition, S a indicates a positive value of the ground fault active current, the pulse level "off" is between T a, and S b indicates a negative value of the ground fault active current, and the pulse width level "off" is between T a . ”
This is an example in which T is between T b .

各端子とも同様に有効分電流のパルス幅変換を
行い、それらのパルス幅を第1図搬送端局装置2
Aにより電力線搬送波としてCA,PLを介して伝
送し合い、差動判定部3Aによりパルス幅の各端
子の総和を求める。その結果 のときPLの内部区間事故と判定する。
For each terminal, pulse width conversion of the effective current is performed in the same way, and the pulse widths are converted to
A transmits them as power line carrier waves via C A and PL, and the differential determination unit 3 A calculates the sum of the pulse widths at each terminal. the result When this happens, it is determined that the accident occurred in the PL internal section.

ただし、Spは検出レベルの整定値である。
尚、(4)式を演算するには、A〜Cの各端子同一時
刻の入力信号をもとにしなければならないから、
伝送による遅れ時間の補正、およびパルス幅変換
開始等を同一条件にとる必要がある。以上の条件
で(4)式の動作範囲を比率特性を例にして示すと、
第4図の例のごとく位相角φに応じて定めた係数
kによる傾きをもつものとなる。
However, S p is a set value of the detection level.
In addition, in order to calculate equation (4), it is necessary to use input signals at the same time for each terminal of A to C, so
It is necessary to correct the delay time due to transmission, start pulse width conversion, etc. under the same conditions. The operating range of equation (4) under the above conditions is shown using ratio characteristics as an example.
As in the example shown in FIG. 4, the slope is determined by the coefficient k determined according to the phase angle φ.

ただし、同図において、 Ip;(4)式Spの等価有効分電流の整定値 ΣΙio;各端子の有効分電流流入方向和(正) ΣΙput;各端子の有効分電流流出方向和(負) である。同図のハツチング内が内部事故判定領域
となる。
However, in the same figure, I p ; Setting value of the equivalent effective current of equation (4) S p ΣΙ io ; Sum of effective current inflow direction of each terminal (positive) ΣΙ put ; Sum of effective current outflow direction of each terminal (negative). The hatched area in the figure is the internal accident determination area.

第5図に電流・パルス巾変換器1、差動判定部
3の構成の詳細実施例を電気所Aの装置を代表例
で示す。まず、1AにおいてDはダイオードであ
り積分器50にはIOA,VOAが同極性となる期間
だけ入力が与えられその結果(1)式のS1が導出され
る。51も積分器であるが、極性反転器52を介
してIOAを入力するため、VOA,IOAが異符号の
期間積分することになる。しかも、乗算器53に
よりIOAにkを乗ずるため積分器51の出力は(2)
式のS1とS2となる。54は加算器でありS1とS2
和Sを求める。尚、54の加算期間はVOAの零点
に同期しVOAの0゜から360゜までの一周期間と
される。
FIG. 5 shows a detailed embodiment of the configuration of the current/pulse width converter 1 and the differential determination section 3 using a device at electric station A as a representative example. First, at 1A, D is a diode, and an input is given to the integrator 50 only during the period when I OA and V OA have the same polarity, and as a result, S 1 of equation (1) is derived. 51 is also an integrator, but since I OA is inputted through the polarity inverter 52, integration is performed over a period in which V OA and I OA have opposite signs. Moreover, since the multiplier 53 multiplies I OA by k, the output of the integrator 51 is (2)
S 1 and S 2 in Eq. 54 is an adder which calculates the sum S of S 1 and S 2 . Note that the addition period 54 is synchronized with the zero point of V OA and is defined as one cycle period from 0° to 360° of V OA .

55はゲート回路であり、変換許容信号発生器
56の信号によつて入力Sを次段の比較器57、
ゲート制御用符号判定器60,61に送る。変換
許容信号発生器56は故障検出リレー、たとえば
OAの過電流検出リレー、VOAの過電圧検出リレ
ー等の動作出力信号を用いることでもよい。これ
により、56は事故発生を検知して出力すること
になる。積分器58は変換許容信号発生器56に
よつて起動され、時間の経過に比例して変化する
出力を与える。但し、58aは正方向に変化する
出力を、58bは負方向に変化する出力を与え
る。比較器57はその入力Sと積分器58からの
入力の比較を行ない起動時から、比較器57の2
つの比較入力の大小関係が反転するまで、入力信
号Sについて比較をする。たとえば比較器57a
では積分器58aの正方向へ変化する出力とのレ
ベルの比較を行い58aの出力>信号Sとなるま
で出力Taを出力する。出力Taはたとえば電力線
搬送波を阻止するための“断”信号とする。58
aの出力>信号SとなつたのちはTaを断続波と
する。
Reference numeral 55 denotes a gate circuit, which uses the signal from the conversion permission signal generator 56 to pass the input S to the comparator 57 in the next stage.
The signal is sent to gate control sign determiners 60 and 61. The conversion permission signal generator 56 may use an operation output signal from a failure detection relay, such as an I OA overcurrent detection relay or a V OA overvoltage detection relay. As a result, 56 detects and outputs the occurrence of an accident. Integrator 58 is activated by conversion permit signal generator 56 and provides an output that varies proportionally over time. However, 58a provides an output that changes in the positive direction, and 58b provides an output that changes in the negative direction. The comparator 57 compares its input S with the input from the integrator 58.
The input signals S are compared until the magnitude relationship between the two comparison inputs is reversed. For example, comparator 57a
Then, the level is compared with the output of the integrator 58a, which changes in the positive direction, and the output T a is output until the output of the integrator 58a becomes greater than the signal S. The output T a is, for example, a "cut" signal for blocking the power line carrier wave. 58
After the output of a>signal S, T a becomes an intermittent wave.

また、同様に比較器57bでは積分器58bの
負方向へ変化する出力とのレベル比較を行ない、
58bの出力<信号Sとなるまで出力Tbを出力
する。出力Tbが与えられているときは、流出電
流とみて電力線搬送波を送信するように、たとえ
ばレベル“有り”を出する。58bの出力<信号
Sとなつた後はTaと同様に断続波を出力し、パ
ルス幅判定の終了したことを示す。
Similarly, the comparator 57b compares the level with the output of the integrator 58b, which changes in the negative direction.
The output T b is output until the output of 58b<signal S. When the output T b is given, it is regarded as an outflow current and outputs a level "present" so that the power line carrier wave is transmitted. After the output of 58b<signal S, an intermittent wave is output in the same manner as T a , indicating that the pulse width determination has been completed.

60および61はゲート制御用符号判定器でS
>0なるとき60によつてゲート62を開き、信
号Taを有効にする。S<0のときには61によ
つて63のゲートを開き信号Tbを有効にする。
すなわち無効となつている信号はたとえば断にセ
ツトする。64は前記信号Ta,Tbの加算器であ
り、ゲート回路62および63によつて有効と見
なした方の信号のみ通過する。加算器64の出力
は第1図で示した2Aに渡す。
60 and 61 are gate control sign determiners S
>0, gate 62 is opened by 60 and signal T a is enabled. When S<0, the gate 63 is opened by 61 and the signal T b is made valid.
That is, a signal that is disabled is set to OFF, for example. 64 is an adder for the signals T a and T b , and only the signal deemed valid by the gate circuits 62 and 63 is passed through. The output of adder 64 is passed to 2A shown in FIG.

以上の説明から明らかなように、相手端に送出
される信号Ta,Tbの信号長(連続出力を与えて
いる期間)は信号Sの大きさ、つまり地絡有効分
電流の大きさに相当する。また電力線搬送波の有
無は地絡有効分電流の極性に相当する。
As is clear from the above explanation, the signal length (period during which continuous output is given) of the signals T a and T b sent to the other end depends on the magnitude of the signal S, that is, the magnitude of the ground fault active current. Equivalent to. Also, the presence or absence of a power line carrier corresponds to the polarity of the ground fault active current.

一方、2Aから受信した信号(自端子も含む)
は受信信号伝送時間を等価的に一致させるための
伝送遅延補償用タイマ65で時間補償する。66
は各端子からの出力を加算する加算器であり、受
信信号“断”の長さを正、受信レベル“有り”を
負、断続波は“0”とみなして信号長に応じたア
ナログ値を夫々求め極性を考慮して全端子分アナ
ログ値を加算し、67のレベル判定器により、等
価的な地絡有効分電流の差動リレーの判定を行な
う。
On the other hand, the signal received from 2 A (including its own terminal)
is time-compensated by a transmission delay compensation timer 65 for equivalently matching received signal transmission times. 66
is an adder that adds the outputs from each terminal, and assumes that the length of the received signal "off" is positive, the received level "present" is negative, and the intermittent wave is "0", and an analog value is calculated according to the signal length. Analog values for all terminals are added up, taking into consideration the polarities obtained, and a level determiner 67 determines the equivalent ground fault active current of the differential relay.

68は一致ゲートであり、67の判定結果を高
速度化するための回路である。すなわち、67の
出力のみでは全端子のパルス幅変換信号が全て断
続波になるまで演算したのちでないと最終判定で
きないが、差動リレーとしては、あらかじめ定め
た以上の流入電流があり、流出端子の条件となる
信号“有り”がなければ、トリツプを許容しても
よい。
68 is a coincidence gate, which is a circuit for speeding up the judgment result of 67. In other words, with only the output of 67, the final judgment cannot be made until the pulse width conversion signals of all terminals have been calculated to become intermittent waves, but as a differential relay, there is an inflow current exceeding a predetermined value, and the output of the outflow terminal is If there is no signal “present” as a condition, tripping may be allowed.

68はそのために用いる流出端となるところが
全てなしを検出するための一致ゲートであつて、
受信信号に一つでも受信レベル“有り”があれば
つぎの一致ゲート69にトリツプ許容信号を出さ
ない。69は一致ゲートであつて、67と68、
および信頼度向上策のため56の出力の全トリツ
プ許容信号によつてのみトリツプ指令を当該しや
断に出力するものである。
Reference numeral 68 is a coincidence gate used for this purpose to detect that the outflow end is completely absent.
If even one of the received signals has a reception level "present", a trip permission signal is not output to the next coincidence gate 69. 69 is a coincidence gate, 67 and 68,
Also, as a measure to improve reliability, a trip command is outputted only by the entire trip permission signal outputted from 56 at the appropriate time.

以上述べた本発明により、動作信頼度の高い多
端子系統の地絡有効分電流差動特性が得られ高感
度の事故検出が高速度でできる。
According to the present invention described above, ground fault active component current differential characteristics of a multi-terminal system with high operational reliability can be obtained, and fault detection with high sensitivity can be performed at high speed.

本発明の実施例は3端子系統の送電線保護をモ
デルに説明したが、4端子以上の多端子になつて
も同様な構成で応用が可能であることはもちろん
である。
Although the embodiments of the present invention have been described using a three-terminal power transmission line protection model, it is of course possible to apply the same configuration to a multi-terminal system of four or more terminals.

また、送電線保護に限らず、母線保護、機器保
護用として、電力線搬送波を用いない保護リレー
システムにも本発明は適用できる。
Furthermore, the present invention is applicable not only to power transmission line protection but also to protection relay systems that do not use power line carrier waves for bus bar protection and equipment protection.

また、第2図aで示した位相特性を得る手段と
して、第6図に示すように入力電流のレベルをシ
フトして、特性相差角φにおいてVOA基準で同符
号と異符号の面積を等しくすればよい。
In addition, as a means to obtain the phase characteristics shown in Fig. 2a, the level of the input current is shifted as shown in Fig. 6, and the areas of the same sign and the opposite sign are made equal based on the V OA standard at the characteristic phase difference angle φ. do it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の全体構成図を示す。第2図は
本発明の特性のねらいを示す。第3図は地絡有効
分電流の導出量説明図を示す。第4図は本発明に
よる比率差動特性例を示す。第5図は本発明の回
路ブロツク構成例を示す。第6図は本発明の変形
例を示す。 EA,EB,EC……電源、TA,TB,TC……変
圧器、RA,RB,TC……接地抵抗、CBA
CBB,CBC……しや断器、PL……送電線、LA
B,LC……インダクタンス、CA,CB,CC
…結合コンデンサ、CTA,CTB,CTC……変流
器、IOA,IOB,IOC……零相電流、PTA
PTB,PTC……電圧変成器、VOA,VOB,VOC
…零相電圧、1A,1B,1C……電流・パルス幅
変換器、2A,2B,2C……搬送端局装置、3A
B,3C……差動判定部、A……電気所A、B…
…電気所B、C……電気所C。
FIG. 1 shows an overall configuration diagram of the present invention. FIG. 2 shows the aim of the characteristics of the invention. FIG. 3 shows an explanatory diagram of the amount of ground fault effective current derived. FIG. 4 shows an example of ratio differential characteristics according to the present invention. FIG. 5 shows an example of the circuit block configuration of the present invention. FIG. 6 shows a modification of the invention. E A , E B , E C ... Power supply, T A , T B , T C ... Transformer, R A , R B , T C ... Earthing resistance, CB A ,
CB B , CB C ...Shiya disconnector, PL...Transmission line, L A ,
L B , L C ... Inductance, C A , C B , C C ...
…Coupling capacitor, CT A , CT B , CT C … Current transformer, I OA , I OB , I OC … Zero-sequence current, P T A ,
PT B , PT C ... Voltage transformer, V OA , V OB , V OC ...
...Zero-sequence voltage, 1 A , 1 B , 1 C ... Current/pulse width converter, 2 A , 2 B , 2 C ... Carrier terminal equipment, 3 A ,
3 B , 3 C ... Differential determination section, A... Electrical station A, B...
...Electric station B, C...Electric station C.

Claims (1)

【特許請求の範囲】 1 多端子電力系統の地絡を検出するために電相
電流と零相電圧と故障検出リレーの出力とを入力
する地絡保護リレー装置において、各端子には零
相電圧と零相電流が同極性となるとき零相電流を
積分する第1の積分器と、逆極性となるとき零相
電流を積分する第2の積分器と、これらの積分器
のいずれかの入力または出力側に設置された係数
器、故障検出リレーの出力に応動して第1と第2
の積分器の出力の絶対値の差の極性と大きさに応
じて他端子へ送出する搬送波の有無と搬送波の有
無の時間長とを制御する搬送波制御手段とを備
え、少なくとも一つの端子には全端子からの搬送
波を受信してこれより各端子で検出した第1と第
2の積分器の出力の絶対値の差の大きさと極性を
導出し、全端子の出力差を考慮して加算し、加算
値を所定極性の所定値と比較して加算値が所定値
よりも大きい時多端子電力系統の内部事故と判断
してその保護を行う判定部を備えるとともに、2
入力の位相差φ(但しφがφ<90゜)のときの第
1と第2の積分器出力の絶対値差が零となるよう
に前記係数器の係数を定めたことを特徴とする地
絡保護リレー装置。 2 多端子電力系統の地絡を検出するために電相
電流と零相電圧と故障検出リレーの出力とを入力
する地絡保護リレー装置において、各端子には零
相電圧とバイアスされた零相電流が同極性となる
ときこれを積分する第1の積分器と、逆極性とな
るとき零相電流を積分する第2の積分器と、故障
検出リレーの出力に応動して第1と第2の積分器
の出力の絶対値の差の極性と大きさに応じて他端
子へ送出する搬送波の有無と搬送波の有無の時間
長とを制御する搬送波制御手段とを備え、少なく
とも一つの端子には全端子からの搬送波を受信し
てこれより各端子で検出した第1と第2の積分器
の出力の絶対値の差の大きさと極性を導出し、全
端子の出力差を考慮して加算し、加算値を所定極
性の所定値と比較して加算値が所定値よりも大き
い時多端子電力系統の内部事故と判断してその保
護を行う判定部を備えるとともに、2入力の位相
差φ(但しφがφ<90゜)のときの第1と第2の
積分器出力の絶対値差が零となるように前記零相
電流に対して付与したバイアス値を定めたことを
特徴とする地絡保護リレー装置。
[Claims] 1. In a ground fault protection relay device that inputs a phase current, a zero-sequence voltage, and the output of a failure detection relay in order to detect a ground fault in a multi-terminal power system, each terminal has a zero-sequence voltage. A first integrator that integrates the zero-sequence current when the zero-sequence current has the same polarity as and a second integrator that integrates the zero-sequence current when the zero-sequence current has the opposite polarity, and an input of one of these integrators. Or, in response to the output of a coefficient unit installed on the output side or a failure detection relay, the first and second
carrier wave control means for controlling the presence or absence of a carrier wave to be sent to other terminals and the length of time for the presence or absence of the carrier wave according to the polarity and magnitude of the difference between the absolute values of the outputs of the integrators; The carrier waves from all terminals are received, and from this the magnitude and polarity of the difference in absolute value between the outputs of the first and second integrators detected at each terminal are derived, and the results are added taking into account the output differences of all terminals. , comprising a determining unit that compares the added value with a predetermined value of a predetermined polarity, and when the added value is larger than the predetermined value, determines that there is an internal accident in the multi-terminal power system and protects the multi-terminal power system;
The coefficient unit is characterized in that the coefficients of the coefficient multiplier are determined so that the absolute value difference between the outputs of the first and second integrators is zero when the input phase difference φ (where φ<90°) Short circuit protection relay device. 2 In a ground fault protection relay device that inputs a phase current, a zero-sequence voltage, and the output of a fault detection relay to detect a ground fault in a multi-terminal power system, each terminal receives a zero-sequence voltage and a biased zero-sequence. A first integrator that integrates the current when it has the same polarity, a second integrator that integrates the zero-sequence current when it has the opposite polarity, and a first and second integrator that integrates the zero-sequence current when the current has the same polarity. carrier wave control means for controlling the presence or absence of a carrier wave to be sent to other terminals and the length of time for the presence or absence of the carrier wave according to the polarity and magnitude of the difference between the absolute values of the outputs of the integrators; The carrier waves from all terminals are received, and from this the magnitude and polarity of the difference in absolute value between the outputs of the first and second integrators detected at each terminal are derived, and the results are added taking into account the output differences of all terminals. , includes a determination unit that compares the added value with a predetermined value of a predetermined polarity, and when the added value is larger than the predetermined value, determines that it is an internal fault in the multi-terminal power system and protects it, and also has a determination unit that performs protection against the internal fault of the multi-terminal power system. However, the bias value applied to the zero-sequence current is determined so that the absolute value difference between the first and second integrator outputs is zero when φ<90°). Short circuit protection relay device.
JP10360480A 1980-07-30 1980-07-30 Ground fault protection relay unit Granted JPS5731324A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10360480A JPS5731324A (en) 1980-07-30 1980-07-30 Ground fault protection relay unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10360480A JPS5731324A (en) 1980-07-30 1980-07-30 Ground fault protection relay unit

Publications (2)

Publication Number Publication Date
JPS5731324A JPS5731324A (en) 1982-02-19
JPS6124899B2 true JPS6124899B2 (en) 1986-06-13

Family

ID=14358369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10360480A Granted JPS5731324A (en) 1980-07-30 1980-07-30 Ground fault protection relay unit

Country Status (1)

Country Link
JP (1) JPS5731324A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6172419A (en) * 1984-09-17 1986-04-14 Fujitsu Ltd Echo canceller control system

Also Published As

Publication number Publication date
JPS5731324A (en) 1982-02-19

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