JPH0497670A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To make the device having a special display function small and to reduce the cost by utilizing a memory function of a liquid crystal display panel itself for the special display function. CONSTITUTION:Tentative still display and split display of a display picture are implemented by using plural split signal electrode driving circuits 42 and scanning electrode driving circuits 43 and applying intermittent operation or sequential operation of the signal electrode driving circuits 42 and scanning electrode driving circuits 43 to each picture element electrode of a liquid crystal display panel 4. The split display includes the series display displaying sequentially reduced pictures into split patterns and a channel search display in which a picture of a different channel is sequentially displayed. Thus, a special display function is obtained by using a frame memory, the liquid crystal display device is made small and the cost is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a liquid crystal display device such as a liquid crystal television having a special display function.

(Prior Art) Recent image display devices, such as televisions, have functions such as static display of displayed images at regular intervals (stroboscopic display), with the aim of increasing the psychological effect on the viewer. , a function that divides the screen into multiple parts and displays reduced images one after another on the divided screen (series display), and a function that divides the screen into multiple parts and displays images for each channel one after another on a split screen. Special display functions such as functions (channel search) are added. Generally, these special display functions are
This is achieved by having an image signal holding means such as a frame memory in the signal processing circuit, and updating the held image signals intermittently or partially. Frame memory is usually made up of semiconductor memory.

However, the frame memory required to implement the above-mentioned special display function requires a capacity of 4M bits even if the NTSC signal is stored as is, and 4M bits or more if the NTSC signal is demodulated into component signals and stored. . When such a large capacity memory is used, the price of the device inevitably increases. Furthermore, since it uses a large amount of memory, it is inconvenient for miniaturizing devices. especially,
A problem with liquid crystal televisions, which are thinner than televisions using CRTs, is that the devices become larger.

In the case of LCD TVs, they are used as portable TVs to take advantage of their small size.

In that case, unlike home-use stationary televisions, the same broadcasts are not always received. The number of broadcasting stations and channels available vary depending on the region, and you will have to choose from them to watch the broadcast. However, in the case of current LCD TVs, is there a function to search for the channel being broadcast?The received channel is displayed on the entire screen, and the broadcast content is displayed separately for each channel using frame memory. It is not possible to select a channel by comparing the channels.

Furthermore, liquid crystal panels are becoming larger and are now being used not only in portables but also in stationary TVs such as those using CRTs. Projectors with large screen displays that use liquid crystal panels as light valves are also being commercialized.

In this way, when a liquid crystal panel is used as a home-use stationary television, it is necessary to have a function that increases the psychological effect on the viewer through strobe display, series display, etc.

However, if these functions are realized using semiconductor memory, problems arise such as the equipment becoming more expensive and larger as described above.

(Problem to be solved by the invention) In this way, when special display functions such as strobe display, series display, and channel display are realized by adding frame memory, the price and size of the liquid crystal display device will increase. There was a problem.

The present invention was made to solve such problems, and an object of the present invention is to provide a liquid crystal display device that realizes a special display function without using a frame memory.

[Structure of the Invention] (Means for Solving the Problems) A liquid crystal display device according to the present invention includes a plurality of signal electrode drive signal lines and a plurality of scan electrode drive signal lines disposed to intersect therewith. In the liquid crystal display part having display pixels in the part,
A plurality of scan electrode drive signal lines are divided and wired so that the display screen can be divided into a plurality of regions and driven. In such a liquid crystal display section, a signal electrode drive circuit for sampling and applying one scanning line worth of display signals to a plurality of signal electrode drive signal lines is divided into a plurality of parts and arranged. Further, a scan electrode drive circuit for sequentially applying a scan signal to a plurality of scan electrode drive signal lines is also divided into a plurality of parts and arranged in correspondence with the divided scan electrode drive signal lines. Each of the signal electrode drive circuit and the scan electrode drive circuit, which are divided into a plurality of parts, is provided with a switching means for switching between independent operation and interlocked operation. The timing control circuit is also provided with an operation mode controller that controls intermittent operation or sequential operation of the signal electrode drive circuit and the scan electrode drive circuit.

(Function) In the present invention, each pixel electrode of a liquid crystal display panel is driven intermittently by using a signal electrode drive circuit and a scan electrode drive circuit that are each divided into a plurality of parts. By operating or sequentially operating, a display image can be displayed temporarily still or divided. The split display includes a series display in which reduced images are sequentially displayed on a split screen, and a channel search display in which images of different channels are sequentially displayed. The special display function of the present invention utilizes the memory function of the liquid crystal display panel itself, and is realized without providing a frame memory in the signal processing circuit. Therefore, it is possible to reduce the size and cost of the device.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the liquid crystal display device of the present invention.

In FIG. 1, a video signal processing circuit 2 is a circuit that outputs a display signal SIG to a signal electrode drive circuit of a liquid crystal display panel 4 based on an input image signal. The timing control circuit 3, based on the synchronization signal of the input image signal,
This circuit creates and outputs various control signals for creating the display signal SIG to the video signal processing circuit 2. The timing control circuit 3 also outputs various drive control signals to the signal electrode drive circuit and scanning electrode drive circuit of the liquid crystal display panel 4 according to the manually input synchronization signal of the image signal and the operation mode of the liquid crystal display device. do.

FIG. 2 is a diagram showing an example of the configuration of the timing control circuit 3. As shown in FIG. When the image signal is manually input to the timing control circuit 3,
A synchronization separation circuit 31 separates and extracts a synchronization signal from the image signal. The separated and extracted synchronization signal is passed through a phase synchronization circuit (
PLL) 32, the vertical synchronizing pulse V synchronized with the vertical synchronizing signal of the input image signal, the horizontal synchronizing pulse H1 synchronizing with the horizontal synchronizing signal, the original clock CK for sampling the video signal SIG, and the image signal R- An image signal demodulation synchronization signal 5YNC for demodulating into a G-B signal is created. The operation mode controller 33 controls the operation mode of the entire liquid crystal display device based on the output of the PLL circuit 32, and controls various circuits below the PLL circuit 32, the liquid crystal display channel 4, and the video signal processing circuit 2. This is a circuit that outputs a control signal. Since the operation mode controller 33 has various control signals, a microprocessor is actually used. Furthermore, since various control signals from the operation mode controller 33 need to be output in synchronization with the image signal, the control signals are output in synchronization with the image signal using the vertical synchronization pulse V and horizontal synchronization pulse H from the PLL circuit 32. do. Based on the control signal from the operation moto controller 33, the liquid crystal display panel switches between the normal operation mode and the special display mode to display an image on the liquid crystal display panel 4. Further, at the output section of the PLL circuit 32, an X frequency divider circuit 34. Y
Frequency divider circuit 35, field counter 36 that generates a start pulse ST, polarity inversion control circuit 38 that outputs a polarity inversion control signal POL, scanning output control signals ENl to EN
A shift register 37 etc. for obtaining 4 is provided.

FIG. 3 is a diagram showing a specific example of the configuration of the liquid crystal display panel 4. As shown in FIG. The liquid crystal display section 41 is constructed using an active matrix array, and basically includes a plurality of signal electrode drive signal lines. A display pixel is provided at each intersection of a plurality of scan electrode drive signal lines arranged to intersect with the scan electrode drive signal lines. In the case of this embodiment, the liquid crystal display section 41 is connected to the first to fourth display sections 11
～■It is divided into 4 parts. Specifically, among a plurality of signal electrode drive signal lines and scan electrode drive signal lines that are arranged to cross each other, the scan electrode drive signal line is connected to the liquid crystal display section 4.
It is divided in the middle of 1. That is, the first display section 11
The scanning electrode drive signal lines are separated between the second display section I2 and the third display section I3 and the fourth display section I4.

Corresponding to this division of the display section, the signal electrode drive circuit 42 includes a first drive circuit 421 connected to the signal electrode drive signal lines of the first and third display sections If and I3, and a second and fourth drive circuit 421 connected to the signal electrode drive signal lines of the first and third display sections If and I3. It is divided into a second drive circuit 422 connected to the signal electrode drive signal lines of display sections I2 and I4. Further, the scan electrode drive circuit 43 is divided into first to fourth drive circuits 431 to 434 connected to the scan electrode drive signal lines of the first to fourth display sections If-14, respectively. In other words, the scan electrode drive signal line from the first scan electrode drive circuit 431 is connected only to the pixel electrode of the first liquid crystal display section 11, and the pixel electrodes of the remaining half of the scan lines are connected to the second scan electrode drive circuit 432. It is connected. Similarly, the third scan electrode drive circuit 433
is connected to the pixel electrode of the third liquid crystal display section I3, and the fourth scan electrode drive circuit 4-34 is connected to the pixel electrode of the fourth liquid crystal display section I4. Therefore, the first to fourth scan electrode drive circuits 431 to 434 each have a quarter of the liquid crystal display section 41.
This means that each pixel electrode is driven.

A changeover switch 44 is provided between the first signal electrode drive circuit 421 and the second signal electrode drive circuit 422. This is for selecting whether to operate the first signal electrode drive circuit 421 and the second signal electrode drive circuit 422 independently or in conjunction, depending on the operation mode.

That is, the signal electrode drive circuit 42 samples the display signal SIG for each scanning line and applies it to a plurality of signal electrode drive signal lines. The display signal SIG is input to the second signal electrode drive circuits 421 and 422 separately to operate them independently, or the output of the first signal electrode drive circuit 421 is input to the second signal electrode drive circuit 422. This allows the switch to perform normal operation. First scan electrode drive circuit 431
Similarly, between the and third scan electrode drive circuits 433, and between the second scan electrode drive circuits 432 and the fourth scan electrode drive circuits 434, there is an independent operation for independently scanning the divided display portions, and a continuous operation. Changeover switches 451 and 452 are provided for selecting interlocking operations for scanning.

Control signals for the operation timing and operation mode of the drive circuit are input from the timing control circuit 3 to the liquid crystal display panel 4 configured in this manner. Further, a display signal corresponding to the operation mode is inputted from the video signal processing circuit 2.

FIG. 4 shows a specific example of the configuration of the video signal processing circuit 2. The input image signal is sent to the RGB matrix circuit 2 based on the periodic signal 5YNC for signal demodulation from the timing control circuit 3.
1, it is demodulated into RGB signals. Next, the signal band is limited by the band-limiting filter, and the polarity inversion control signal P from the timing control circuit 3 is sent to the polarity inversion circuit 24.
The display signal SIG whose polarity has been inverted based on OL is output to the signal electrode drive circuit of the liquid crystal panel 4. The band-limiting filter includes a first band-limiting filter 22 that has a signal passband that can be displayed by all pixels of the liquid crystal display panel 47, and a signal passband that is 1/2 of the first band-limiting filter in both the horizontal and vertical directions. There is a second band-limiting filter 23. The filter output selection signal FIL from the timing control circuit 3 outputs the output of the first band-limiting filter 22 in the normal mode and the output of the second band-limiting filter 23 in the split display mode.
is selected and output to the subsequent circuit.

The operation of the liquid crystal display device configured in this manner will be specifically explained below.

First is the case of normal mode. The normal mode is a mode in which one screen of images is displayed on the entire liquid crystal display section 41.

In the normal mode, the signal changeover switch 44. The movable terminals of all the scan changeover switches 451 and 452 are connected to the normal mode terminal N side. This control is performed by a control signal from the operation mode controller 33 in the timing control circuit 3. At this time, the display signal SIG is input from the video signal processing circuit 2 to the first signal electrode drive circuit 421, and the output from the first signal electrode drive circuit 421 is input to the second signal electrode drive circuit 422. . The first and second signal electrode drive circuits 421 and 422 receive a clock signal XCK corresponding to the number of pixels of one scanning line of the liquid crystal display section 41.
is input, the display signal SIG is sampled one after another by the clock XCK, and the first signal electrode drive circuit 421
and the second signal electrode drive circuit 422 sample the display signal for -scanning lines. The sampled display signal is output from the signal electrode drive circuit 42 to the liquid crystal display section 41, and the signal is written into the pixel electrode corresponding to the scanning line of the image signal. The pixel electrode corresponding to the scanning line of the image signal is selected by the output of the scanning electrode drive circuit 43. When a start pulse ST indicating the beginning of a display signal is input, the scan electrode drive circuit 43 outputs a scan signal to write a display signal to the pixel electrode of the first scan line of the liquid crystal display section 41 in accordance with the scan of the display signal. Output. Thereafter, corresponding pixel electrodes are driven one after another in accordance with the scanning of the display signal. At this time, a clock YCK corresponding to the scanning of the display signal is input to the scanning electrode drive circuit 43, and by shifting the start pulse ST with the clock YCK, the pixel electrode is scanned in accordance with the scanning of the display signal. be exposed. Here, the first to fourth scan electrode drive circuits 431 to 434 are supplied with signals ENI to EN that control the respective scan outputs.
4 is input, or in the normal mode, ENI to EN4 are all turned on as shown in FIG. Therefore,
Display signals corresponding to the display pixel electrodes are written in all areas of the liquid crystal display section 41, and a normal operation of displaying one screen on the entire liquid crystal display section 41 is performed.

Next, the strobe display operation in the special display mode will be explained. The scan electrode drive circuit and the changeover switches 44 and 451 and 452 added to the scan electrode drive circuit are set in the same way as in the normal operation mode. Furthermore, the clocks XCK and YCK input to the signal electrode drive circuit 42 and the scan electrode drive circuit 43 are also the same as in the normal operation mode.

The start pulse ST indicating the beginning of the display signal SIG is input every time corresponding to one screen of the human input image signal in the normal operation mode, but in the strobe display mode it is input only once for every several screens of the input image signal. .

Further, scan output control signals ENI to EN4 of the scan electrode drive circuit 43 are also input so that the scan output is turned on only when the start pulse ST of the display image is input. Therefore, although one screen's worth of images is displayed on the liquid crystal display section 41, the display signals are only written to the pixel electrodes once every several screens of input image signals, so the displayed image is not frame-delayed. It becomes an image and can be displayed using a strobe.

FIG. 6 shows a timing chart of control signals of the scanning electrode drive circuit 43 during strobe display.

In FIG. 6, a start pulse ST and scan output control signals ENI of the first scan electrode drive circuit 431 to scan output control signals EN4 of the fourth scan electrode drive circuit 434 are output simultaneously in the n field. These scanning output control signals ENI to EN4 remain in the ON state for a period of n fields. The first scan electrode drive circuit 431 and the third scan electrode drive circuit 433 scan the first display section 11 and the third display section I3 in one field. Further, the second scan electrode drive circuit 432 and the fourth scan electrode drive circuit 434 similarly scan the second liquid crystal display section I2 and the fourth liquid crystal display section 4 in one field. After writing the display image of field n,
Start pulse S in +1 field and n+2 field
T is not output and scanning output control signals ENI~E
All N4 become OFF state. Therefore, during this period, no display image is written to any part of the liquid crystal display section 41, and the display image written in the n fields is held. The start pulse ST is output again in the n+3 field, and the scanning output control signals EN1 to EN4 are turned on.
become a state. As a result, the display image of the n+3 field is written on the liquid crystal display section 41, and the display image is updated. As described above, strobe display is performed on the liquid crystal display section 41 by repeating the intermittent operation of the drive circuit.

Since the start pulse ST input to the scan electrode drive circuit 43 and the scan output control signals ENI to EN4 can be input at arbitrary intervals, strobe display can also be performed at arbitrary intervals. However, since the display signal held in the display pixel electrode in a normal liquid crystal display panel is for a period of about several hundred milliseconds to several seconds, it is necessary to update the display image faster than that. The retention time of a display signal retained by a display pixel electrode varies depending on the liquid crystal material, the circuit configuration of the pixel electrode, and its material. Therefore, if materials and circuit configurations with good retention characteristics are used, it is possible to lengthen the interval between flash displays.

Next, split display in the special display mode will be explained. In the case of split display, the changeover switches 44 and 451, 452 added to the signal electrode drive circuit 42 and the scan electrode drive circuit 43 are set to the split display terminal M side. In addition, the clock XCK input to the signal electrode drive circuit 42
The clock YCK input to the scan electrode drive circuit 43 becomes 1/2 of that in the normal mode. This is done by changing the frequency division ratios of the X frequency divider circuit 34 and the Y frequency divider circuit 35 of the timing control circuit 3. Setting of this frequency division ratio is performed by the operation mode controller 33.

If the clock XCK input to the signal electrode drive circuit 42 becomes 1/2 of that in the normal mode, the number of samples in the signal electrode drive circuit 42 also becomes 1/2. Therefore, although the resolution is reduced to 1/2, the first signal electrode drive circuit 421 and the second signal electrode drive circuit 422 can each sample the display signal for one scanning line. Furthermore, if the clock YCK input to the scan electrode drive circuit 43 becomes 1/2,
Only half of the pixel electrodes of the liquid crystal display section 41 are scanned in the time equivalent to one screen. Therefore, by sequentially operating these signal electrode drive circuits 42 and scan electrode drive circuits 43, divided display becomes possible.

FIG. 7 shows a timing chart of control signals of the scanning electrode drive circuit 43 during divided display. In the n field, the control signal of the scanning electrode drive circuit 43 is ENI L
However, the pixel electrodes of only the first display section 11 are scanned by the first scan electrode drive circuit 431.

Further, since the clock YCK to the scan electrode drive circuit 43 is half that of the normal mode, the pixel electrode scan is performed only 1/2 of the normal mode. In this way, in the n field, the display signal is written only to the first liquid crystal display section 1, and the display signal written to the first liquid crystal display section 11 is thinned out to 1/2 both vertically and horizontally compared to the normal mode. This will result in a brighter display signal. In other words, the first liquid crystal display section If has 1/1/2 of the normal display.
An image reduced to 4 will be displayed.

In the n+1 field, the second scan electrode drive circuit 432
As a result, the pixel electrodes are scanned only in the second display section I2, and an image reduced to 1/4 of the normal display is displayed on the second liquid crystal display section I2. The first liquid crystal display section 11 to which writing was performed in the n-field holds the display signal in the n-field. Similarly, in the n+2 field, an image reduced to 1/4 of the normal size is displayed on the third liquid crystal display section I3, and in the n+3 field, the image is displayed on the fourth liquid crystal display section I3.
4, an image reduced to 1/4 of the normal display is displayed.

As described above, the liquid crystal display section 41 displays 1/1 of the normal display.
The images of fields n to n+3, which have been reduced to 4, are displayed in order, making it possible to display them as a series.

Further, as shown in FIG. 8, by inputting the start pulse ST and the control signals ENI to EN4 of the scanning electrode drive circuit at intervals of several fields, the display interval of the series display can be changed. In the partial display mode, the clock XCK for sampling the display signal is half that of the normal mode, so if the display signal of the same signal band as in the normal mode is input to the signal electrode drive circuit, the displayed image will be This causes aliasing noise. Therefore, in the split display mode, it is necessary to input a display signal with a limited signal band to the signal electrode drive circuit. This is because the image signal processing circuit 2 includes a band-limiting filter 22.
This is possible by providing a switch 23 and controlling it by switching.

Next, the channel search display in the special display mode will be explained.

FIG. 9 is a block diagram showing an example of the configuration of a liquid crystal television using the liquid crystal display device of the present invention. In the case of FIG. 9, the configuration is the same as that of FIG. 1 except that the timing control circuit 3 has a channel selection function for the tuner 1. FIG. 10 shows a timing chart of scan control signals of the scan electrode drive circuit when channel search display is performed.

When performing channel search display, the liquid crystal display device operates in a split display mode. First, in the n field of the ■channel, one screen of the ■channel is written as an image of size 174 in the normal display mode on the first liquid crystal display section 11. When writing to the first liquid crystal display section 1 is completed, a channel selection signal CHAN for the J channel is outputted from the timing control circuit 3 to the tuner 1, and the J channel is received by the tuner 1. Here, since it is not always possible to stably receive the J channel immediately after channel switching, the timing control circuit 3 stabilizes the reception and displays the display on the liquid crystal panel 4 between the n-1 fields until the circuit stabilizes. The second liquid crystal display section I of the liquid crystal panel 4 is shown in the n-th field in which the circuit operates stably without writing any signals.
Write an image of size /4 in normal operation mode to 2.

By repeating the same operation, like the series display in the split display mode, from the -th liquid crystal display section 11 to the fourth
By sequentially writing images of different channels on the liquid crystal display section 14 of the LCD, channel search display becomes possible.

In the embodiment, examples of strobe display, series display, and channel search display are shown as special display modes, but various other display modes can be created by combining sequential operation and intermittent operation of the signal electrode drive circuit and scan electrode drive circuit. can be realized. In addition, in the embodiment, the number of divisions during divided display is set to 4, or the pixel electrodes of one scanning line of the display panel are divided into three or more sets, and each set is connected to a scanning electrode drive circuit that can independently control the scanning. Multiple split displays are possible.

[Effects of the Invention] As explained in 1-+ above, according to the present invention, special display functions such as strobe display, series display, and channel search display of images can be provided without having a frame memory in the signal processing circuit. A liquid crystal display device can be obtained. And since frame memory is not used, liquid crystal display devices with special display functions can be made smaller.

This makes it possible to lower prices. Furthermore, since display signals are written to the liquid crystal panel intermittently during special display, the power consumption can be reduced accordingly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the liquid crystal display device of the present invention, FIG. 2 is a block diagram showing a specific example of a timing control circuit, FIG. 3 is a block diagram showing a specific example of a liquid crystal panel, and FIG. The figure is a block diagram showing a specific example of a video signal processing circuit, Figure 5 is a timing diagram showing scan control in normal mode, Figure 6 is a timing diagram showing scan control of strobe display in special display mode, and Figure 7 is a timing diagram showing scan control in special display mode. The first timing diagram shows the scanning control of series display in the special display mode, FIG. 8 is the second timing diagram showing the scanning control of series display in the special display mode, and FIG. FIG. 10 is a timing chart showing scan control of channel search display in special display mode. 1... Tuner, 2... Video signal processing circuit, 3...
・Timing control circuit, 4...Liquid crystal panel, 22...
- First band-limiting filter, 23... Second band-limiting filter, 34... Display signal sampling clock division R circuit, 35... Scanning clock frequency dividing circuit, 36...
Start pulse creation field counter, 41...Liquid crystal display section, 421, 422...Signal electrode drive circuit, 4
31-434...Scanning electrode drive circuit, 44...Display signal changeover switch, 451.452...Scanning signal changeover switch. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Scope of Claims] A display pixel is provided at each intersection of a plurality of signal electrode drive signal lines and a plurality of scan electrode drive signal lines disposed to intersect therewith, and the plurality of scan electrode drive signal lines are a liquid crystal display section each having divided wiring so that the display screen can be divided into a plurality of regions and driven, and a display signal for one scanning line being sampled and applied to the plurality of signal electrode drive signal lines; A signal electrode drive circuit divided into a plurality of parts, and a scanning circuit divided into a plurality of parts corresponding to the divided scanning electrode drive signal lines for sequentially applying scanning signals to the plurality of scan electrode drive signal lines. an electrode drive circuit; display signal switching means for switching between independent operation and linked operation of the plurality of signal electrode drive circuits; scanning signal switching means for switching between independent operation and linked operation of the plurality of scan electrode drive circuits; and the signal electrode. 1. A liquid crystal display device comprising: a timing control circuit having an operation mode controller that controls intermittent operation or sequential operation of a drive circuit and a scan electrode drive circuit.