JPH0495138A - Detection system for microprocessor processing abnormality - Google Patents

Detection system for microprocessor processing abnormality

Info

Publication number
JPH0495138A
JPH0495138A JP2209853A JP20985390A JPH0495138A JP H0495138 A JPH0495138 A JP H0495138A JP 2209853 A JP2209853 A JP 2209853A JP 20985390 A JP20985390 A JP 20985390A JP H0495138 A JPH0495138 A JP H0495138A
Authority
JP
Japan
Prior art keywords
peripheral circuit
microprocessor
processing
watchdog timer
abnormality
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2209853A
Other languages
Japanese (ja)
Inventor
Masayoshi Matsumoto
政良 松本
Makio Okuyama
奥山 牧夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Miyagi Ltd
Original Assignee
NEC Corp
NEC Miyagi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Miyagi Ltd filed Critical NEC Corp
Priority to JP2209853A priority Critical patent/JPH0495138A/en
Publication of JPH0495138A publication Critical patent/JPH0495138A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To detect the processing abnormality of a microprocessor due to the abnormality of a peripheral circuit by performing the access processing of a watchdog times after discriminating that the peripheral circuit is in the processable state. CONSTITUTION:An arbitrary peripheral circuit 31 which performs arbitrary processing and a watchdog timer 33 are provided, and this timer outputs an alarm to the external when it is not accessed by a microprocessor 32 for a certain determined time, and the access processing of the watchdog timer 33 is performed after it is judged that the peripheral circuit 31 is in the processable state. Consequently, the watchdog timer 33 is not accessed when the peripheral circuit 31 cannot perform the processing because of abnormality. Thus, the abnormality of the peripheral circuit 31 is detected also.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、マイクロプロセッサ処理異常の検出方式に関
し、特にウォッチドッグタイマを用いたマイクロプロセ
ッサ処理異常の検出方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for detecting abnormality in microprocessor processing, and particularly to a method for detecting abnormality in microprocessor processing using a watchdog timer.

〔従来の技術〕[Conventional technology]

任意の処理を行う任意の周辺回路と、定められた一定時
間マイクロプロセッサよりアクセスされない場合に外部
に対してアラームを出力するウォッチドッグタイマとを
有するマイクロプロセッサシステムにおける従来のマイ
クロプロセッサ処理異常の検出方式は、第2図に示すよ
うに、周辺回路の状態検出(ステップ5ll)を行い、
次にウォッチドッグタイマのアクセス処理(ステップ5
12)実行し、その後に検出した周辺回路の状態を判断
しくステップ513)、処理が可能な状態であれば処理
を行い(ステップ514)、処理が不可能な状態であれ
ば再度゛周辺回路の状態判断を行う方式となっていた。
Conventional microprocessor processing abnormality detection method in a microprocessor system that has an arbitrary peripheral circuit that performs arbitrary processing and a watchdog timer that outputs an alarm to the outside if it is not accessed by the microprocessor for a predetermined period of time As shown in FIG. 2, the state of the peripheral circuit is detected (step 5ll),
Next, watchdog timer access processing (step 5)
12) After that, the state of the detected peripheral circuit is judged (Step 513). If the state is possible, the process is performed (Step 514); if the state is impossible, the state of the peripheral circuit is judged again. It was a method for determining the status.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

この従来のマイクロプロセッサ処理異常の検出方式では
、マイクロプロセッサの処理の停止については検出可能
であるが、周辺回路に異常が発生し、処理が不可能であ
る場合も周辺回路の状態検出を続け、マイクロプロセッ
サの処理が継続されるため、ウォッチドッグタイマのア
クセスも実行されることになり、周辺回路の異常による
マイクロプロセッサの処理異常は検出できない欠点があ
った。
With this conventional microprocessor processing abnormality detection method, it is possible to detect the stoppage of microprocessor processing, but even if an abnormality occurs in a peripheral circuit and processing is impossible, it continues to detect the state of the peripheral circuit. Since microprocessor processing continues, watchdog timer access is also executed, which has the disadvantage that microprocessor processing abnormalities due to abnormalities in peripheral circuits cannot be detected.

本発明の目的は、このような欠点を除去したマイクロプ
ロセッサ処理異常の検出方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a microprocessor processing abnormality detection method that eliminates such drawbacks.

[課題を解決するための手段] 本発明は、任意の処理を行う任意の周辺回路と、定めら
れた一定時間マイクロプロセッサよりアクセスされない
場合に外部に対してアラームを出力するウォッチドッグ
タイマとを有するマイクロプロセッサシステムにおける
マイクロプロセッサ処理異常の検出方式において、 周辺回路が処理可能である状態と判断した後に、ウォッ
チドッグタイマのアクセス処理を行うことを特徴とする
[Means for Solving the Problems] The present invention includes an arbitrary peripheral circuit that performs arbitrary processing and a watchdog timer that outputs an alarm to the outside if the microprocessor is not accessed for a predetermined period of time. A method for detecting a microprocessor processing abnormality in a microprocessor system is characterized in that a watchdog timer access process is performed after determining that a peripheral circuit is in a processable state.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第3図は本発明のマイクロプロセッサ処理異常の検出方
式が適用されるマイクロプロセッサシステムを示す。こ
のマイクロプロセッサシステムは、マイクロプロセッサ
32と、周辺回路31と、ウォッチドッグタイマ33と
を有している。
FIG. 3 shows a microprocessor system to which the microprocessor processing abnormality detection method of the present invention is applied. This microprocessor system includes a microprocessor 32, a peripheral circuit 31, and a watchdog timer 33.

第1図は本発明の一実施例のマイクロプロセッサ処理異
常の検出方式を示す流れ図である。周辺回路31の状態
を検出(ステップSL)した後に、その検出結果の判断
を行い(ステップS2)、処理可能な状態であればウォ
ッチドッグタイマ33のアクセス処理(ステップS3)
を行い、周辺回路31に対する任意の処理を実行しくス
テップ34)、ステップS2の′判断で周辺回路31が
処理不可能な状態であれば再度周辺回路の状態検出を行
う。
FIG. 1 is a flowchart showing a microprocessor processing abnormality detection method according to an embodiment of the present invention. After detecting the state of the peripheral circuit 31 (step SL), the detection result is judged (step S2), and if it is in a processable state, the watchdog timer 33 is accessed (step S3).
Then, any processing for the peripheral circuit 31 is executed (step 34), and if it is determined in step S2 that the peripheral circuit 31 is in an unprocessable state, the state of the peripheral circuit is detected again.

ウォッチドッグタイマ33の計測時間を、周辺回路31
の状態が正常な場合に処理可能な状態であると判断され
る時間よりも長い値に設定すれば、周辺回路31に異常
がある場合には、ウォッチドッグタイマ33はアクセス
されず、周辺回路31の異常が検出される。
The measurement time of the watchdog timer 33 is set to the peripheral circuit 31.
If the watchdog timer 33 is set to a value longer than the time at which it is determined that processing is possible when the state of the peripheral circuit 31 is normal, the watchdog timer 33 will not be accessed if there is an abnormality in the peripheral circuit 31. Anomaly is detected.

(発明の効果) 以上説明したように本発明は、周辺回路に異常があり処
理が不可能である場合にはウォッチドッグタイマのアク
セスが実行されないため、周辺回路の異常についても検
出できる効果がある。
(Effects of the Invention) As explained above, the present invention has the effect of being able to detect abnormalities in the peripheral circuits because access to the watchdog timer is not executed when the peripheral circuits are abnormal and cannot be processed. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のマイクロプロセ・ンサ処理
異常の検出方式を示す流れ図、 第2図は従来の技術のマイクロプロセッサ処理異常の検
出方式を示す図、 第3図は本発明のマイクロプロセッサ処理異常の検出方
式が適用されるマイクロプロセッサシステムを示す。 31・・・・・周辺回路 32・・・・・マイクロプロセッサ 33・・・・・ウォッチドッグタイマ 代理人 弁理士  岩 佐  義 幸 亮1図 亮2図 弗3図
FIG. 1 is a flowchart showing a method for detecting a microprocessor processing abnormality according to an embodiment of the present invention. FIG. 2 is a diagram showing a method for detecting a microprocessor processing abnormality according to the prior art. FIG. 1 shows a microprocessor system to which the microprocessor processing abnormality detection method is applied. 31...Peripheral circuit 32...Microprocessor 33...Watchdog timer agent Patent attorney Yoshiaki Iwasa

Claims (1)

【特許請求の範囲】[Claims] (1)任意の処理を行う任意の周辺回路と、定められた
一定時間マイクロプロセッサよりアクセスされない場合
に外部に対してアラームを出力するウォッチドッグタイ
マとを有するマイクロプロセッサシステムにおけるマイ
クロプロセッサ処理異常の検出方式において、 周辺回路が処理可能である状態と判断した後に、ウォッ
チドッグタイマのアクセス処理を行うことを特徴とする
マイクロプロセッサ処理異常の検出方式。
(1) Detection of microprocessor processing abnormalities in a microprocessor system that has arbitrary peripheral circuits that perform arbitrary processing and a watchdog timer that outputs an alarm to the outside if the microprocessor is not accessed for a predetermined period of time. A microprocessor processing abnormality detection method, characterized in that a watchdog timer access process is performed after determining that a peripheral circuit is in a processable state.
JP2209853A 1990-08-08 1990-08-08 Detection system for microprocessor processing abnormality Pending JPH0495138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2209853A JPH0495138A (en) 1990-08-08 1990-08-08 Detection system for microprocessor processing abnormality

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2209853A JPH0495138A (en) 1990-08-08 1990-08-08 Detection system for microprocessor processing abnormality

Publications (1)

Publication Number Publication Date
JPH0495138A true JPH0495138A (en) 1992-03-27

Family

ID=16579707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2209853A Pending JPH0495138A (en) 1990-08-08 1990-08-08 Detection system for microprocessor processing abnormality

Country Status (1)

Country Link
JP (1) JPH0495138A (en)

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