JPH0485855A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a semiconductor integrated circuit where the cross-sectional area of wiring is increased and the resistance is decreased by providing a contact of conductive material between first and second wiring layers along the longitudinal direction thereof and forming a layer of conductive material along the wiring. CONSTITUTION:A region on an oxide film 3, in which a buried contact is formed, is subjected to etching and a buried tungsten contact 6 is formed therein by CVD followed by formation of a second wiring layer 7 by sputtering. The step is carried out over the entire area along first and second wiring layers 5, 7 thus forming a buried tungsten contact layer 6 between the first and second wiring layers 5, 7. According to the constitution, cross-sectional area of wiring is reduced by the amount of the buried tungsten contact 6 resulting in reduction of wiring resistance.

Description

[Detailed Description of the Invention] [Industrial Application Field 1] The present invention relates to a method for reducing wiring resistance in a semiconductor integrated circuit. When the wiring length difference S is long, signal delay becomes a problem due to the influence of wiring resistance and the like. As a countermeasure to this problem, attempts have been made to improve the wiring resistance.One example of this improvement is to reduce the resistance by wiring the wiring in two layers, upper and lower, and making the potential of both wirings the same through contact holes. .

An example thereof is shown in FIGS. 3 and 4.

In the figure, (1) is the first wiring layer, (2) is the second wiring layer, (3) is the oxide film, and (4) is the first wiring layer (1) and the second wiring layer ( 2) is a contact hole for connecting. FIG. 4 is a sectional view taken along line AA shown in FIG. 3.

Next, the effect will be explained.

The first wiring layer (1) and the second wiring layer (2) form two layers of wiring, upper and lower.
) are connected through the contact hole (4) to make the potentials of the first wiring layer (1) and the second wiring layer (2) the same. Wiring layer (
2) are at the same potential, so the cross-sectional area of the wiring in this case is the sum of the cross-sectional areas of the first wiring layer (1) and the second wiring layer (2), K, which is the cross-sectional area of the wiring. This is due to the increase in Here, the wiring resistance is inversely proportional to the cross-sectional area, so the larger the cross-sectional area, the smaller the wiring resistance. Wiring resistance can be reduced by making the contact holes the same.

[Problem to be solved by the invention]

Since the conventional semiconductor integrated circuit is constructed as described above, the cross section of the contact portion of the first wiring layer and the second wiring layer is as shown in FIG. 4, and the size of the contact hole,
There was a problem in that the cross-sectional area of the wiring did not change even if the number was changed.

The present invention was made to solve the above-mentioned problems, and an object thereof is to obtain a semiconductor integrated circuit in which the resistance of the wiring is reduced by increasing the cross-sectional area of the wiring.

[Means to solve the problem]

In the semiconductor integrated circuit according to the present invention, the first wiring layer and the second wiring layer are formed using a conductive material along the first wiring layer and the second wiring layer.
[Operation] According to the present invention, a layer of a tetraelectric material is formed along between the wirings of the first wiring layer and the second wiring layer by providing contacts between the wiring layers of the first wiring layer and the second wiring layer. A contact of a 4-conducting material is provided in the middle along the wiring layer and the second wiring layer, and a layer of conductive material is formed along the first wiring layer and the second wiring layer. The cross-sectional area of the wiring increases by the amount of the material. Therefore, by increasing the cross-sectional area of the wiring, the wiring resistance is reduced. Embodiment C] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1st
The figure is a side sectional view of the semiconductor integrated circuit, and FIG. 2 is a sectional view taken along line BB shown in FIG.

In the figure, (5) is the first wiring layer made of aluminum, and the substrate (5) is the first wiring layer made of aluminum.
(3) is an oxide film formed after forming the first wiring layer (5) by sputtering. (6) is tungsten embedding. (7) is the second wiring layer of aluminum. A region where a buried contact is to be formed is etched on the oxide film (3), and a tungsten buried contact (6) is formed in the etched region by C''JD (chemical vapor deposition). A wiring layer (7) is formed by sputtering.

The above process is repeated on the first wiring layer (5) and the second wiring layer (7).
) to form a layer of tungsten buried contacts (6) between the first wiring layer (5) and the second wiring layer (7).

Next, the effect will be explained. In FIG. 2, the first wiring layer (5) and the second wiring layer (7) are connected by a tungsten buried contact (6) K. The potential of layer (7) is kept the same. For this reason, a tungsten embedded mounting tact (
The cross-sectional area of the wiring is increased by 6), and the wiring resistance is reduced. For example, in the conventional example shown in Figure 3, the cross-sectional area of the wiring is 2
When doubled, the wiring resistance becomes 1, but in this embodiment, when the cross-sectional area of the wiring is doubled, the wiring resistance becomes less than Σ.

〔Effect of the invention〕

As described above, according to the present invention, the first wiring layer and the second
A contact is made between the upper and lower two layers using a conductive material along the wiring layer, and a layer of conductive material is formed along the upper and lower two layers of wiring to increase the cross-sectional area of the wiring.
This has the effect of reducing the resistance of the wiring without increasing the cross-sectional area of the wiring.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional side view showing a semiconductor integrated circuit according to an embodiment of the present invention, FIG. 2 is a cross-sectional view taken along line BB shown in FIG. 1, and FIG. 3 is a cross-sectional view (II 4 is a cross-sectional view taken along line A-A shown in FIG. 3. In the figure, (3) is an oxide film, (5) is a first wiring layer,
(6) is a tungsten recessed contact, (7)
is the second wiring layer. In each figure, the same reference numerals indicate the same or equivalent parts. Figure 1 sJ, 7 aluminum contact 4 quadrant layers t Kusigataten's 3 [/>i/-1] ψ contact 7
8z Meal J Otsuyosen layer 2 Figure 3 3rd layer 3 Figure 1: 1st wiring layer 2: 20th wiring layer 3'a'L4tzx 4-: Contact hole Figure 4

Claims (1)

[Claims] It has a first wiring layer formed on a semiconductor substrate and a second wiring layer formed on the first wiring layer, and the contact between the first wiring layer and the second wiring layer is connected to the second wiring layer. In a semiconductor integrated circuit made of a conductive material different from the first wiring layer and the second wiring layer, the contact is provided along the first wiring layer and the second wiring layer. A semiconductor integrated circuit characterized in that the layer made of the conductive material is formed along the first wiring layer and the second wiring layer.