JPH048451U - - Google Patents

Info

Publication number
JPH048451U
JPH048451U JP4944790U JP4944790U JPH048451U JP H048451 U JPH048451 U JP H048451U JP 4944790 U JP4944790 U JP 4944790U JP 4944790 U JP4944790 U JP 4944790U JP H048451 U JPH048451 U JP H048451U
Authority
JP
Japan
Prior art keywords
silicon substrate
junction surface
silicon
diode
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4944790U
Other languages
English (en)
Other versions
JP2509647Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4944790U priority Critical patent/JP2509647Y2/ja
Publication of JPH048451U publication Critical patent/JPH048451U/ja
Application granted granted Critical
Publication of JP2509647Y2 publication Critical patent/JP2509647Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Landscapes

  • Photovoltaic Devices (AREA)
  • Light Receiving Elements (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【図面の簡単な説明】
第1図は本案の一実施例の略断面図、第2図は
他の実施例の略断面図、第3図は従来の一例の略
断面図である。 1a,5a……N型シリコン基板、1b,5b
……P層、2……銀層、3……シリコン酸化膜、
4,4−1……酸化膜、5b……P層、6,6−
1……P電極、7……インタコネクタ、8,9,
9−1……N電極。

Claims (1)

    【実用新案登録請求の範囲】
  1. 第1のシリコン基板のPN接合面に対向するよ
    うに、第2のシリコン基板のPN接合面を直列又
    は並列に接続できるように配置し、第2のシリコ
    ン基板の他方の面に金属層を介してシリコン化合
    物の膜を有するダイオード。
JP4944790U 1990-05-11 1990-05-11 ダイオ―ド Expired - Fee Related JP2509647Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4944790U JP2509647Y2 (ja) 1990-05-11 1990-05-11 ダイオ―ド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4944790U JP2509647Y2 (ja) 1990-05-11 1990-05-11 ダイオ―ド

Publications (2)

Publication Number Publication Date
JPH048451U true JPH048451U (ja) 1992-01-27
JP2509647Y2 JP2509647Y2 (ja) 1996-09-04

Family

ID=31567148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4944790U Expired - Fee Related JP2509647Y2 (ja) 1990-05-11 1990-05-11 ダイオ―ド

Country Status (1)

Country Link
JP (1) JP2509647Y2 (ja)

Also Published As

Publication number Publication date
JP2509647Y2 (ja) 1996-09-04

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees