JPH0482760U - - Google Patents
Info
- Publication number
- JPH0482760U JPH0482760U JP1990123837U JP12383790U JPH0482760U JP H0482760 U JPH0482760 U JP H0482760U JP 1990123837 U JP1990123837 U JP 1990123837U JP 12383790 U JP12383790 U JP 12383790U JP H0482760 U JPH0482760 U JP H0482760U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- current
- eeprom
- microcomputer
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Description
第1図は本考案の第1の実施例を示すEEPR
OM内蔵マイコンを搭載したICカードの概略の
構成図、第2図は従来のEEPROM内蔵マイコ
ンを搭載したICカードの概略の構成図、第3図
は本考案の第2の実施例を示すEEPROM内蔵
マイコンを搭載したICカードの要部の構成図で
ある。
30……コネクト部、31……電源端子、35
……グランド端子、40……マイクロプロセツサ
(MPU)、41……制御部、41a……電流制
御手段、41b……オン、オフ設定手段、50…
…昇圧回路、60……EEPROM、70,70
A……電流パス手段72……NMOS、72A…
…PMOS、A1〜An……制御信号、CI,C
Ia……電流制御信号、CM……メモリ制御信号
、M1〜Mn……EEPROM素子、R1〜Rn
……抵抗素子、VDD……電源電圧。
FIG. 1 shows an EEPR showing a first embodiment of the present invention.
Figure 2 is a schematic configuration diagram of an IC card equipped with a microcomputer with built-in OM. Figure 2 is a schematic diagram of an IC card equipped with a conventional microcomputer with built-in EEPROM. Figure 3 is an IC card with built-in EEPROM showing the second embodiment of the present invention. FIG. 2 is a configuration diagram of main parts of an IC card equipped with a microcomputer. 30...Connection part, 31...Power terminal, 35
...Ground terminal, 40...Microprocessor (MPU), 41...Control unit, 41a...Current control means, 41b...On/off setting means, 50...
...Booster circuit, 60...EEPROM, 70,70
A...Current path means 72...NMOS, 72A...
...PMOS, A 1 to A n ...control signal, CI, C
Ia...Current control signal, CM...Memory control signal, M1 to Mn ...EEPROM element, R1 to Rn
...Resistance element, VDD...Power supply voltage.
Claims (1)
る電源電圧により動作し、プログラム命令に従つ
てマイクロコンピユータ全体を制御するマイクロ
プロセツサと、前記マイクロプロセツサによりデ
ータの書込み及び読出しが制御されるEEPRO
Mとを、備えEEPROM内蔵マイクロコンピユ
ータにおいて、 前記データの読出し時に電流制御信号を出力す
る電流制御手段と、 前記電流信号によりオン状態となつて前記電源
端子。グランド端子間に電流パス経路を形成し、
前記データの書込み時に流れる電源電流に対応し
た電流を該電流パス経路に流す電流パス手段とを
、 設けたことを特徴とするEEPROM内蔵マイク
ロコンピユータ。 2 請求項1記載のEEPROM内蔵マイクロコ
ンピユータにおいて、 前記電流パス手段は、前記電流制御信号により
オン状態となるスイツチと、前記スイツチを貸介
して前記電源端子・グランド端子間に直列接続さ
れた複数の抵抗素子と、前記各抵抗素子にそれぞ
れ並列接続された複数の短絡用スイツチ手段とで
、構成し、 前記各短絡用スイツチ手段のオン、オフ設定を
行うオン、オフ設定手段を、設けたことを特徴と
するEEPROM内蔵マイクロコンピユータ。[Claims for Utility Model Registration] 1. A microprocessor that operates with a power supply voltage applied through a power supply terminal and a ground terminal and controls the entire microcomputer according to program instructions, and a device for writing data by the microprocessor. and EEPRO whose readout is controlled
A microcomputer with a built-in EEPROM, comprising: current control means that outputs a current control signal when reading the data; and a current control means that is turned on by the current signal to connect the power supply terminal to the power supply terminal. Form a current path between the ground terminals,
A microcomputer with a built-in EEPROM, comprising current path means for causing a current corresponding to a power supply current flowing during data writing to flow through the current path. 2. The EEPROM built-in microcomputer according to claim 1, wherein the current path means includes a switch that is turned on by the current control signal, and a plurality of devices connected in series between the power supply terminal and the ground terminal via the switch. comprising a resistor element and a plurality of short-circuit switch means connected in parallel to each of the resistor elements, and further includes an on/off setting means for setting each short-circuit switch means on or off. Microcomputer with built-in EEPROM.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990123837U JPH0482760U (en) | 1990-11-26 | 1990-11-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990123837U JPH0482760U (en) | 1990-11-26 | 1990-11-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0482760U true JPH0482760U (en) | 1992-07-17 |
Family
ID=31871523
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990123837U Pending JPH0482760U (en) | 1990-11-26 | 1990-11-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0482760U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012059104A (en) * | 2010-09-10 | 2012-03-22 | Fujitsu Semiconductor Ltd | Information processor |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS527649A (en) * | 1975-05-13 | 1977-01-20 | Innovation Ste Int | Data memory and transmission system |
-
1990
- 1990-11-26 JP JP1990123837U patent/JPH0482760U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS527649A (en) * | 1975-05-13 | 1977-01-20 | Innovation Ste Int | Data memory and transmission system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012059104A (en) * | 2010-09-10 | 2012-03-22 | Fujitsu Semiconductor Ltd | Information processor |
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