JPS649695B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a latching relay drive circuit, that is, a latching relay known as a bistable relay has a single winding type and a two winding type. The present invention relates to a drive circuit.

A single-winding latching relay is generally configured to perform setting and resetting operations depending on the direction of the current flowing through the relay coil, and to maintain that state even after the excitation is cut off.

FIG. 1 shows a conventional latching relay drive circuit configured to drive the single winding latching relay described above. In the same figure, 1, 2,
3 and 4 are NPN type transistors, 5 is a relay coil of a latching relay, and 6, 7, 8, and 9 are resistors. Assuming that the first input terminal is a set input terminal, if an H level set signal is now applied to the first input terminal S, transistors 1 and 4 will be turned on.
Both are turned on. On the other hand, since the second input terminal R corresponding to the reset side is at L level, transistors 2 and 3 remain OFF. Then, by turning on transistors 1 and 4 and turning off transistors 2 and 3, the power supply V _CC → transistor 1 as shown by the solid line.
A current path from →relay coil 5 →transistor 4 →ground is created, and a setting current flows through relay coil 5, setting the latching relay. Also,
When the second input terminal R on the reset side is at H level and the first input terminal S is at L level, that is, when a reset signal is applied, transistors 2 and 3 are turned on.
Transistors 1 and 4 are turned OFF, and a reset current flows through the path of power supply V _CC → transistor 3 → relay coil 5 → transistor 2 → ground as shown by the broken line, and this reset current is in the opposite direction to the aforementioned set current. Therefore, reset the latching relay.

In the above conventional example, a latching relay drive circuit can be obtained with a simple configuration, but the disadvantage is that stable operation cannot be achieved unless the voltage of the set/reset signal is equal to or higher than the V _CC level. have. That is, when a set signal is applied to the first input terminal S for setting and transistors 1 and 4 are turned on, most of the power supply voltage V _CC is applied to the relay coil 5 due to the voltage drop across the relay coil 5.
, and the emitter voltage of transistor 1 becomes V _CC
When the voltage of the set signal is low, sufficient current cannot be supplied to the base of transistor 1, and transistor 1 is turned off again. This problem makes it difficult to obtain stable operation in this conventional example. It was hot.

Further, when the current is cut off by canceling the set/reset signal, the back electromotive force generated by the relay coil may destroy the transistor or the power supply circuit (not shown).

The present invention was proposed in view of the above points, and uses an inverter instead of an NPN transistor.
To provide a latching relay drive circuit that uses a PNP transistor to operate even with comparatively low voltage set/reset signals, can be implemented as a one-chip IC, and eliminates the adverse effects of the back electromotive force of the relay coil. The purpose is to

The present invention will be described below with reference to the drawings.

FIG. 2 shows a first embodiment of the present invention, and parts having the same functions as those in FIG. 1 are given the same reference numerals.

In the circuit configuration, the first input terminal S is connected via a resistor 9 to the base of a transistor 4 whose emitter is grounded, and whose emitter is connected to the power supply V _CC via a series circuit of an inverter 12 and a resistor 14. It is connected to the base of a PNP type transistor 10.

On the other hand, if the first input terminal S is assumed to be a set input terminal, a second input terminal R corresponding to a reset input terminal is connected to the base of an NPN type transistor 2 whose emitter is grounded via a resistor 7, and an inverter 13, It is connected via a series circuit of a resistor 15 to the base of a PNP type transistor 11 whose emitter is connected to the power supply V _CC . Further, the collectors of the transistors 10 and 2 are each connected to one end of the relay coil 5, and the collectors of the transistors 11 and 4 are each connected to the other end of the relay coil 5.

Therefore, when an H level set signal is applied to the first input terminal S, an L level voltage is applied to the base of the transistor 10 via the inverter 12, so the PNP type transistor 10 is turned on.
Transistor 4 is turned on by directly applying an H level set signal via resistor 9.

On the other hand, since the second input terminal R is at L level, both transistors 11 and 7 are off. Then,
As shown by the solid line, power supply V _CC →transistor 10→
A set current flows through the path from relay coil 5 to transistor 4 to ground, setting the latching relay. Moreover, when the reset signal is applied to the second input terminal R, on the contrary, transistors 11 and 2
ON, transistors 10 and 4 turn OFF, and the path is set as shown by the broken line: power supply V _CC → transistor 11 → relay coil 5 → transistor 2 → ground. A reset current flows in the opposite direction to the current and resets the latching relay. .

As described above, in place of transistors 1 and 3, which were difficult to turn on in the conventional example of Fig. 1, this embodiment uses an inverter and a PNP type transistor, so the set/reset signal is set to the threshold of the inverter. It is sufficient if the value exceeds , and stable operation can be obtained at a relatively low voltage.

Next, FIG. 3 shows a second embodiment, in which the PNP type transistors 10 and 11 of the previous embodiment are changed to Darlington connection to improve the current amplification rate. In other words, there is a high possibility that this type of latching relay drive circuit will be manufactured as a monolithic IC, and in a monolithic IC, due to its structure, it is not possible to create a PNP type transistor with a large current amplification rate, so the normal current Width increase rate
h _fe is a very small value of 1 to 10, and the base current required to turn on is large, so the first embodiment shown in FIG. 2 is not suitable for fabrication into a monolithic IC. However, in the example in Figure 3,
PNP type transistor 10 and NPN type transistor 16 are connected in Darlington, and similarly
The PNP type transistor 11 and the NPN type transistor 17 are also connected in Darlington. This Darlington connection is equivalent to one PNP transistor as shown in Figure 4 (b), and the current amplification factor h _fe is the product of the current amplification factors of the two transistors, so even if it is made into a monolithic IC, a small base is required. It can be operated with sufficient current, and in the circuit of Fig. 3, NPN type transistors 2 and 4 connected in series are used.
The imbalance between the two can be resolved.

Note that since the operation is the same as that of the first embodiment shown in FIG. 2 described above, the explanation thereof will be omitted to avoid duplication.

Next, FIG. 5 shows a third embodiment, which is characterized in that a back electromotive force absorption circuit for the relay coil 5 is provided in the second embodiment shown in FIG. The configuration differs from the second embodiment in that an anti-series circuit of Zener diodes 18 and 19 is connected in parallel to both ends of the relay coil 5.

However, to explain the operation of this embodiment, when the set/reset signal is released, the current path passing through the relay coil 5 is cut off, so the voltage at both ends of the relay coil 5 is several hundred times higher than the power supply voltage V _CC . High voltage is about to be generated. However, the current due to this back electromotive force is bypassed by the Zener diodes 18 and 19, so that the voltage across the relay coil 5 does not become higher than the Zener voltage, thereby preventing the adverse effects of the back electromotive force.

As described above, in the present invention, an NPN that is difficult to turn on with a low voltage set/reset signal has been developed.
Since an inverter and a PNP type transistor are used instead of a type transistor, stable operation can be obtained even with relatively low voltage set/reset signals.Also, by configuring the NPN type transistor in a Darlington connection, the current amplification rate can be improved. It is possible to improve this and make monolithic ICs possible, and by connecting two Zener diodes in anti-series and connecting them in parallel to both ends of the relay coil, it is possible to prevent the destruction of transistors and power supply circuits due to back electromotive force. Has significant advantages.

[Brief explanation of the drawing]

FIG. 1 shows a conventional latching relay drive circuit, FIG. 2 shows a first embodiment of the latching relay drive circuit according to the present invention, and FIG. 3 shows a second embodiment of the same.
FIG. 4 is an explanatory diagram of the second embodiment, and FIG. 5 is an explanatory diagram of the third embodiment. S...first input terminal, R...second input terminal, 2,
4, 10, 11, 16, 17...transistor, 1
2, 13...Inverter, 5...Relay coil, 7,
9, 14, 15...Resistor, 18, 19...Zener diode.

Claims (1)

[Claims] 1. Connect the first input terminal S to a second terminal whose emitter is grounded.
A series circuit of a first inverter 12 and a third resistor 14 is connected to the base of a first PNP transistor 10 whose emitter is connected to the base of the NPN transistor 4 through a second resistor 9 and whose emitter is connected to the power _supply V CC. The second input terminal R is connected to the base of the first NPN transistor 2 whose emitter is grounded via the first resistor 7, and the emitter of the second PNP transistor 11 is connected to the power supply V _CC . The first PNP transistor 10 and the first
Latching characterized in that the collector of the NPN transistor 2 is connected to one end of the relay coil 5, and the collectors of the second PNP transistor 11 and the second NPN transistor 4 are connected to the other end of the relay coil 5. Relay drive circuit. 2. The latching relay drive circuit according to claim 1, wherein the first and second PNP transistors are configured by a Darlington connection of a PNP transistor and an NPN transistor. 3 Connect the first input terminal S to the second terminal whose emitter is grounded.
A series circuit of a first inverter 12 and a third resistor 14 is connected to the base of the first PNP transistor 10, which is connected to the base of the NPN transistor 4 via the second resistor 9 and whose emitter is connected to the power _supply V CC. a first NPN transistor 2 connected through the
is connected to the base of the second PNP transistor 11 via the first resistor 7 and whose emitter is connected to the power supply V _CC via a series circuit of a second inverter 13 and a fourth resistor 15. ,
connecting the collector of the first PNP transistor 10 to the base of the third NPN transistor 16;
The collector of the third NPN transistor is powered
V _CC , the emitter of the third NPN transistor and the collector of the first NPN transistor are connected to one end of the relay coil 5, and the collector of the second PNP transistor 11 is connected to the fourth NPN transistor 17. connect to the base of
The collector of the fourth NPN transistor 17 is connected to the power supply V _CC , the emitter of the fourth NPN transistor and the collector of the second NPN transistor 4 are connected to the other end of the relay coil 5,
A latching relay drive circuit characterized in that an anti-series circuit of first and second Zener diodes 18 and 19 is connected in parallel to both ends of the relay coil 5.