JPH0481347B2 - - Google Patents

Info

Publication number
JPH0481347B2
JPH0481347B2 JP58147106A JP14710683A JPH0481347B2 JP H0481347 B2 JPH0481347 B2 JP H0481347B2 JP 58147106 A JP58147106 A JP 58147106A JP 14710683 A JP14710683 A JP 14710683A JP H0481347 B2 JPH0481347 B2 JP H0481347B2
Authority
JP
Japan
Prior art keywords
region
gate electrode
injection
punch
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58147106A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6038881A (ja
Inventor
Yutaka Hayashi
Masaaki Kamya
Yoshikazu Kojima
Kojiro Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology, Seiko Epson Corp filed Critical Agency of Industrial Science and Technology
Priority to JP58147106A priority Critical patent/JPS6038881A/ja
Publication of JPS6038881A publication Critical patent/JPS6038881A/ja
Publication of JPH0481347B2 publication Critical patent/JPH0481347B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel

Landscapes

  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
JP58147106A 1983-08-11 1983-08-11 半導体不揮発性メモリ Granted JPS6038881A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58147106A JPS6038881A (ja) 1983-08-11 1983-08-11 半導体不揮発性メモリ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58147106A JPS6038881A (ja) 1983-08-11 1983-08-11 半導体不揮発性メモリ

Publications (2)

Publication Number Publication Date
JPS6038881A JPS6038881A (ja) 1985-02-28
JPH0481347B2 true JPH0481347B2 (enrdf_load_stackoverflow) 1992-12-22

Family

ID=15422647

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58147106A Granted JPS6038881A (ja) 1983-08-11 1983-08-11 半導体不揮発性メモリ

Country Status (1)

Country Link
JP (1) JPS6038881A (enrdf_load_stackoverflow)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6419801A (en) * 1987-07-15 1989-01-23 Dx Antenna Polarized wave discriminator
US5047812A (en) * 1989-02-27 1991-09-10 Motorola, Inc. Insulated gate field effect device
US5467305A (en) * 1992-03-12 1995-11-14 International Business Machines Corporation Three-dimensional direct-write EEPROM arrays and fabrication methods
US5594685A (en) * 1994-12-16 1997-01-14 National Semiconductor Corporation Method for programming a single EPROM or flash memory cell to store multiple bits of data that utilizes a punchthrough current
US5808937A (en) * 1994-12-16 1998-09-15 National Semiconductor Corporation Self-convergent method for programming FLASH and EEPROM memory cells that moves the threshold voltage from an erased threshold voltage range to one of a plurality of programmed threshold voltage ranges
US5557567A (en) * 1995-04-06 1996-09-17 National Semiconductor Corp. Method for programming an AMG EPROM or flash memory when cells of the array are formed to store multiple bits of data
US6051465A (en) * 1997-07-30 2000-04-18 Matsushita Electronics Corporation Method for fabricating nonvolatile semiconductor memory device
US6121655A (en) 1997-12-30 2000-09-19 Matsushita Electric Industrial Co., Ltd. Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit
US6051860A (en) * 1998-01-16 2000-04-18 Matsushita Electric Industrial Co., Ltd. Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit
US6147379A (en) * 1998-04-13 2000-11-14 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
JP2007158196A (ja) * 2005-12-07 2007-06-21 Sharp Corp 不揮発性半導体装置およびその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5353983A (en) * 1976-10-27 1978-05-16 Hitachi Ltd Semiconductor non-volatile memory device

Also Published As

Publication number Publication date
JPS6038881A (ja) 1985-02-28

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