JPH0478188B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a MOS transistor, and particularly to the structure of its gate electrode.

[Prior Art] As shown in FIG. 2, a conventional MOS transistor, taking an n-channel transistor as an example, has a source region 4, a drain region 1, a gate oxide film 3, and a gate electrode 2 on a p-type substrate 5. It is customary to have a structure consisting of polysilicon, and polysilicon has usually been used for the gate electrode 2. However, even if the thickness of polysilicon is set to about 5000㎓, the sheet resistance can only be lowered to about 20Ω/□, so as shown in FIG.
A multilayer structure in which layers 7 of high-melting point metals such as Ti, Mo, WSi2, TiSi2, and MoSi2 or their silicides are stacked is being used as gate electrodes, and thereby the resistance of the gate electrode can be lowered to 5Ω/□. I've been exposed to it.

[Problems to be Solved by the Invention] However, recently there has been a demand for high-speed operation of transistors, and it has been found that reducing the gate electrode resistance is particularly effective for improving the read speed of memory. It seems effective to increase the thickness of the refractory metal or its silicide layer 7 to reduce the gate electrode resistance, but increasing the thickness may reduce the controllability of the gate length 8 or cause stress. This causes an increase in the variation in V _TH .

The present invention was made to establish the above-mentioned low resistance, and aims to realize a reduction in the resistance of the gate electrode. Another object of the invention is to reduce the resistance of the gate electrode at low cost.

[Means for Solving the Problems] The gate electrode of the MOS transistor according to the present invention has a structure in which multiple layers of polysilicon and metal or metal silicide are stacked,
Further, the metal or metal silicide in all the layers of the plurality of layers is the same material.

[Function] A gate electrode having a multilayer structure of polysilicon and metal or metal silicide obtained by the above method can reduce its resistance, and by stacking the layers, the resistance can be reduced to 1Ω. /□ or less sheet resistance, which in turn enables high-speed operation of transistors. Further, even though the plurality of layers are stacked, the metal or metal silicide in all the layers is made of the same material, so it can be manufactured by a simple process.

[Embodiments of the Invention] FIG. 1 is a cross-sectional view showing a typical gate electrode of the present invention. The gate electrode shown in FIG. 1 has a laminated structure of a polysilicon layer 6 and a high melting point metal layer or its silicide layer 9 on the gate oxide film 3, and further includes a layer of the high melting point metal layer or its silicide layer 9. A laminated structure of a polysilicon layer 10 and a high melting point metal layer or its silicide layer 11 is provided thereon. That is, the gate electrode in FIG. 1 has a structure in which two laminated structures made of polysilicon and a high melting point metal layer or a silicide layer thereof are stacked. That is, in this gate electrode, the high melting point metal layer or its silicide layers 9 and 11 in each stacked structure are made of the same material. The number of laminated structures constituting the gate electrode of the MOS transistor according to the present invention can be increased to three or more as necessary in order to obtain a targeted low resistance value.

Further, even if the number of laminated structures is increased, the manufacturing process can be simplified because the high melting point metal layer or its silicide layers 9 and 11 are made of the same material.

[Effects of the Invention] According to the MOS transistor according to the invention, high-speed operation is possible by using a resistor as the gate electrode resistance.In particular, the speed of signal transmission in an integrated circuit is increased, and a device using this MOS transistor can be used. It has a great effect on high performance.

Furthermore, although the gate electrode resistance is made low by stacking multiple layers of the stacked structure, the metal or metal silicide in all of the layers is the same material, so the manufacturing process can be simplified. It is possible and has the advantage that it can be obtained at low cost.

[Brief explanation of the drawing]

Figure 1 shows the electrode structure of a MOS transistor according to an embodiment of the present invention, Figure 2 shows the electrode structure of a conventional MOS transistor, and Figure 3 shows the structure of a high-melting point metal or its silicide stacked to reduce resistance. This is the electrode structure of a transistor. In the figure, 1 is a drain region, 3 is a gate oxide film,
4 is a source region, 5 is a p-type silicon substrate, 6, 1
0 is a polysilicon layer, and 9 and 11 are high melting point metal layers or their silicide layers. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. The gate electrode has a multi-layered structure of polysilicon and metal or metal silicide, and the metal or metal silicide in all of the plurality of layers is made of the same material. MOS type transistor.