JPH0477134U - - Google Patents

Info

Publication number
JPH0477134U
JPH0477134U JP11974290U JP11974290U JPH0477134U JP H0477134 U JPH0477134 U JP H0477134U JP 11974290 U JP11974290 U JP 11974290U JP 11974290 U JP11974290 U JP 11974290U JP H0477134 U JPH0477134 U JP H0477134U
Authority
JP
Japan
Prior art keywords
chip
circuit board
flexible circuit
bonded
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11974290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11974290U priority Critical patent/JPH0477134U/ja
Publication of JPH0477134U publication Critical patent/JPH0477134U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図1 本発明の実施例におけ回路の接続方
法の第一の工程の分断面図、第1図2 本発明の
実施例におけ回路の接続方法の第二の工程の分断
面図、第1図3 本発明の他の実施例における第
二の工程の部分断面図、第2図1 従来の実施例
における回路の接続方法の第一の工程の分断面図
、第2図2 従来の実施例における回路の接続方
方法の第二の工程の分断面図、第2図3 従来の
実施例における回路の接続方法の第3の工程の部
分断面図。 1,21……ICチツプ、2,22……液晶パ
ネル、3,23……電極パターン、4,24……
フレキシブル回路基板、5,25……ICチツプ
を駆動する入力信号を供給する電極パターン、9
,29……異方導電性接着剤層、7,27……銅
箔パターン、8,28……カバーレイ、6,26
……接着剤層、10……本発明における圧着ツー
ル、30……従来における圧着ツールA、11…
…テフロンシート、31……従来における圧着ツ
ールB。
FIG. 1 1 A cross-sectional view of the first step of the circuit connection method in the embodiment of the present invention, FIG. 1 2 A cross-sectional view of the second step of the circuit connection method in the embodiment of the present invention, Fig. 1 3 A partial sectional view of the second step in another embodiment of the present invention, Fig. 2 1 A sectional view of the first step of the circuit connection method in the conventional embodiment, Fig. 2 2 FIG. 2 is a cross-sectional view of the second step of the circuit connection method in the embodiment. FIG. 3 is a partial cross-sectional view of the third step of the circuit connection method in the conventional embodiment. 1, 21... IC chip, 2, 22... Liquid crystal panel, 3, 23... Electrode pattern, 4, 24...
Flexible circuit board, 5, 25... Electrode pattern for supplying input signals to drive the IC chip, 9
, 29... Anisotropic conductive adhesive layer, 7, 27... Copper foil pattern, 8, 28... Coverlay, 6, 26
...Adhesive layer, 10...Crimping tool in the present invention, 30... Conventional pressure bonding tool A, 11...
...Teflon sheet, 31... Conventional crimping tool B.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ICチツプ上に形成された接続電極と、上下2
枚のガラスあるいは樹脂等よりなる基板の間に液
晶層を挟持してなる液晶パネルの基板上に形成さ
れた上記ICチツプの接続電極と相対峙して形成
された接続用回路が、絶縁性接着剤あるいは異方
導電性接着剤あるいは導電ペースト等により接合
された液晶パネルにおいて、上記ICチツプを駆
動する入力信号を供給する回路部品は、ポリイミ
ドあるいはポリエステルあるいはポリエチレンテ
レフタレート等のフレキシブル回路基板よりなり
、上記フレキシブル回路基板のガラス基板上への
接合部と上記ICチツプのガラス基板上への接合
を、上記フレキシブル回路基板とICチツプの厚
みの差分だけ、あるいは上記フレキシブル回路基
板やICチツプをガラス基板に接合するときにツ
ールの下に敷くテフロン、Siゴムシート等の厚
さを上記フレキシブル回路基板やICチツプの厚
みに加えた差分だけ段差をつけたツールにて一括
して上記フレキシブル回路基板とICチツプを圧
着接合することを特徴とする回路の接合方法。
The connection electrodes formed on the IC chip and the upper and lower 2
A connection circuit formed facing the connection electrode of the IC chip formed on the substrate of a liquid crystal panel in which a liquid crystal layer is sandwiched between two substrates made of glass or resin, etc. is bonded with an insulating adhesive. In a liquid crystal panel bonded with an anisotropic conductive adhesive, anisotropic conductive adhesive, conductive paste, etc., the circuit components that supply the input signals for driving the IC chip are made of a flexible circuit board made of polyimide, polyester, polyethylene terephthalate, etc. The bonding portion of the flexible circuit board to the glass substrate and the IC chip to the glass substrate may be bonded by the difference in thickness between the flexible circuit board and the IC chip, or the flexible circuit board or IC chip may be bonded to the glass substrate. The above flexible circuit board and IC chip are assembled at once using a tool with a step that is equal to the thickness of the Teflon, Si rubber sheet, etc. placed under the tool, added to the thickness of the above flexible circuit board or IC chip. A circuit joining method characterized by crimp joining.
JP11974290U 1990-11-15 1990-11-15 Pending JPH0477134U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11974290U JPH0477134U (en) 1990-11-15 1990-11-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11974290U JPH0477134U (en) 1990-11-15 1990-11-15

Publications (1)

Publication Number Publication Date
JPH0477134U true JPH0477134U (en) 1992-07-06

Family

ID=31867679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11974290U Pending JPH0477134U (en) 1990-11-15 1990-11-15

Country Status (1)

Country Link
JP (1) JPH0477134U (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303130A (en) * 2005-04-20 2006-11-02 Sharp Corp Method for connecting drive circuit board to display panel
JP2006339613A (en) * 2005-06-06 2006-12-14 Alps Electric Co Ltd Wiring connection structure and liquid crystal display device
WO2008102476A1 (en) * 2007-02-22 2008-08-28 Sharp Kabushiki Kaisha Electronic circuit device, process for manufacturing the same and display apparatus
JP2008205068A (en) * 2007-02-19 2008-09-04 Matsushita Electric Ind Co Ltd Pressure head and component pressure bonding device
JP2012124504A (en) * 2005-02-02 2012-06-28 Sony Chemical & Information Device Corp Method of implementing electrical component
JP2013048300A (en) * 2012-12-03 2013-03-07 Dexerials Corp Thermo-compression bonding apparatus and packaging method of electric component
KR101271939B1 (en) * 2006-02-01 2013-06-07 데쿠세리아루즈 가부시키가이샤 Method of mounting electric part
JP2016072410A (en) * 2014-09-30 2016-05-09 株式会社フジクラ Printed wiring board

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012124504A (en) * 2005-02-02 2012-06-28 Sony Chemical & Information Device Corp Method of implementing electrical component
JP2006303130A (en) * 2005-04-20 2006-11-02 Sharp Corp Method for connecting drive circuit board to display panel
JP4602150B2 (en) * 2005-04-20 2010-12-22 シャープ株式会社 Connection method of drive circuit board and display panel
JP2006339613A (en) * 2005-06-06 2006-12-14 Alps Electric Co Ltd Wiring connection structure and liquid crystal display device
JP4575845B2 (en) * 2005-06-06 2010-11-04 アルプス電気株式会社 Wiring connection structure and liquid crystal display device
KR101271939B1 (en) * 2006-02-01 2013-06-07 데쿠세리아루즈 가부시키가이샤 Method of mounting electric part
JP2008205068A (en) * 2007-02-19 2008-09-04 Matsushita Electric Ind Co Ltd Pressure head and component pressure bonding device
WO2008102476A1 (en) * 2007-02-22 2008-08-28 Sharp Kabushiki Kaisha Electronic circuit device, process for manufacturing the same and display apparatus
JP2013048300A (en) * 2012-12-03 2013-03-07 Dexerials Corp Thermo-compression bonding apparatus and packaging method of electric component
JP2016072410A (en) * 2014-09-30 2016-05-09 株式会社フジクラ Printed wiring board
US10123411B2 (en) 2014-09-30 2018-11-06 Fujikura Ltd. Printed wiring board

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