JPH0476922A - Manufacture of bipolar transistor - Google Patents

Abstract

PURPOSE:To enable micronization for increase in packaging density of an integrated circuit and for speedup of its operation by forming a side wall made of an insulator on the opening wall of a polysilicon layer and by opening an emitter layer which extends to the opening bottom. CONSTITUTION:A side wall 1 is formed by the anisotropical etching of a silicon oxide layer 10, and the side wall 11 and the wall of a silicon dioxide layer 7 are used as a mask to remove a silicon nitride layer 6 under them by wet etching. Next, the silicon oxide layer 5 is removed by wet etching to bore opening that reaches the base layer. After the base layer of the opening bottom is surfaced with a polysilicon layer 12, it is given N-type conductivity and patterned into a polysilicon emitter. This design enables micronization of a bipolar transistor and increase in packaging density of an integrated circuit. Since the polysilicon layers 4, 9 serve as the extraction electrodes of the base layer 3, speedup of a bipolar transistor is possible by decreases in base resistance.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for manufacturing an emitter layer and a base layer lead-out electrode of a bipolar transistor, particularly an epitaxial-based hyperpolar transistor, and an integrated circuit using the bipolar transistor by miniaturizing the bipolar transistor. With the aim of achieving high integration and further enabling high-speed operation, an island-shaped mask layer is provided on the base layer, and a polysilicon layer is grown in areas other than the mask layer using a photo-excited low-temperature selective growth method. forming an opening in the polysilicon layer by removing the cough island-shaped mask layer, forming an insulating layer on the surface of the polysilicon layer, and forming a sidewall made of an insulator on the sidewall of the opening of the polysilicon layer; An emitter layer was grown extending on the bottom surface of the opening, and the polysilicon layer was configured to serve as an extraction electrode from the base layer.

In this case, instead of providing an island-shaped mask layer on the base layer and growing a polysilicon layer in areas other than the mask layer by photo-excited low-temperature selective growth method, an island-shaped mask layer is formed on the base layer. Alternatively, a mask layer may be provided, a polysilicon layer may be grown over the entire upper surface including the mask layer, and the upper surface of the polysilicon layer may be removed flatly to expose the mask layer.

[Industrial application field]

The present invention relates to a method for manufacturing an emitter layer and a base layer extraction electrode of a bipolar transistor, in particular an epitaxial base bipolar transistor.

[Prior Art] A conventional method for manufacturing an epitaxial base bibolar transistor is to form a silicon oxide layer on an epitaxially grown base region, form an emitter layer through an opening in the silicon oxide layer, and form a junction with the base region. method was adopted.

FIG. 3 is a block diagram of a conventional epitaxial base high-bolar transistor.

In FIG. 3, 21 is a semiconductor substrate that becomes a collector active layer, 22 is a field oxide film, 23 is a single crystal layer that is a base layer, 24 is a polysilicon layer that is an extraction electrode of the base layer, and 25 is a silicon oxide layer. , 26 is an opening in the silicon oxide layer, and 27 is an emitter layer.

The method for manufacturing this device is to form a single crystal layer 23 which will become a base layer on a plane formed by a semiconductor substrate 21 which will become a collector active layer and a field oxide film 22 surrounding it.
A polysilicon layer 24 is grown to serve as an extraction electrode for the base layer, and a silicon oxide layer 25 is formed on the entire surface of the polysilicon layer 24 by vapor phase growth, and an opening is formed in a region of this oxide layer that will become an emitter by photolithography. 26,
A polysilicon layer 27 containing impurities is formed on the entire surface including the opening 26 by a vapor phase growth method, leaving a portion of the polysilicon layer 27 that will become the emitter layer in the opening 26 and a portion that will become the extraction electrode. A method of removal was used.

[Problem to be solved by the invention]

According to the above-mentioned conventional manufacturing method, since the opening 26 in the oxide layer for forming the emitter layer 27 is formed by photolithography, the opening is made smaller than the accuracy.
In addition, in order to provide some margin for alignment, the collector active region 21 and the base region 2
3 cannot be made small, and as a result, the capacitance between the collector and base increases, slowing down the operation of the circuit, and the size of the transistor increases, making it difficult to achieve high integration. Was.

Furthermore, since the polysilicon layer 24, which becomes the extraction electrode of the base layer 23, is formed in the same process as the base layer 23, its thickness is thin and has a high resistance, which impedes high-speed operation and causes the current The drawback was that the capacity was not sufficient.

The present invention eliminates the drawbacks of the conventional technology and enables the formation of a minute emitter layer and the surrounding layer lead-out electrode by self-aligning by using only one mask to define the emitter region. The purpose of this invention is to miniaturize bipolar transistors to increase the degree of integration of integrated circuits using the bipolar transistors, and to enable high-speed operation thereof.

[Means to solve the problem]

In the method for manufacturing a bipolar transistor according to the present invention, an island-shaped mask layer is provided on a base layer, a polysilicon layer is grown in a region other than the mask layer by a photo-excited low-temperature selective growth method, and the island-shaped mask layer is removed to form an opening in the polysilicon layer, an insulating layer is formed on the surface of the polysilicon layer, a sidewall made of an insulator is formed on the sidewall of the opening in the polysilicon layer, and a sidewall is formed on the bottom of the opening. A method was adopted in which the existing emitter layer was grown and the polysilicon layer was used as an extraction electrode from the base layer.

In this case, instead of providing an island-shaped mask layer on the base layer and growing a polysilicon layer in areas other than the mask layer by photo-excited low-temperature selective growth method, an island-shaped mask layer is formed on the base layer. It is also possible to adopt a method in which a mask layer is provided, a polysilicon layer is grown over the entire upper surface including the mask layer, and the upper surface of the polysilicon layer is removed flatly to expose the mask layer.

[Effect]

According to the method for manufacturing a bipolar transistor of the present invention,
The sidewall allows the area of the emitter layer to be miniaturized with good reproducibility beyond the limits of photolithography technology, and the emitter layer and the base extraction electrode around it are self-aligned, making it possible to miniaturize bipolar transistors. This makes it possible to increase the degree of integration of integrated circuit devices containing the same.

In addition, the area of the emitter layer can be miniaturized, and since alignment margin is not required for self-aligning, the area of the collector and base can be reduced, and as a result, the capacitance between the collector and the base can be reduced. Furthermore, since a thick polysilicon layer is used as an extraction electrode from the base layer, the base resistance is reduced, allowing high-speed operation of this bipolar transistor.

〔Example〕

Hereinafter, a method for manufacturing an epitaxial base bipolar transistor according to an embodiment of the present invention will be explained with reference to the drawings.

(1) First Example A method for manufacturing a bipolar transistor according to a first example of the present invention will be described.

First Step (FIG. 1(a)) [Epitaxial Growth of Base Layer] A silicon layer is grown by vapor phase growth on the plane of the single crystal collector active layer l and the surrounding field oxide film 2 made of silicon dioxide.

As a result of this growth, a silicon single crystal layer 3 serving as a base region grows on the collector active layer 1, and a polysilicon layer 4 grows on the field oxide film 2.

The vapor phase growth of this silicon layer must be performed at a low temperature of 650° C. or lower in order to prevent the grain boundaries of the polysilicon layer 40 grown on the field oxide film 2 from becoming abnormally large.

In this example, the temperature of the substrate was lowered to 650° C. or less, and a photoexcited epitaxial growth method was used.

Second step (FIG. 1(b)) [Buttering of emitter region] A silicon dioxide layer 5, a silicon nitride layer 6, a silicon dioxide layer 7, a silicon nitride layer 8 are formed on the entire surface of the base layer 3 grown in the first step. are sequentially laminated by vapor phase epitaxy to form four mask layers.

Thereafter, the portions of the four mask layers other than the island-shaped region that will become the emitter region are removed by etching.

Third step (FIG. 1(C)) [Selective growth of polysilicon layer] A polysilicon layer 9 is selectively grown in a region other than the four island-shaped mask layers formed in the second step.

In order to selectively grow silicon in areas where a mask is not formed and not in areas where a mask is formed, it is usually necessary to raise the temperature to 1000° C. or higher.

However, when the temperature exceeds 1000°C, the grain boundaries of the growing polysilicon become large, making subsequent processing difficult.
In addition, Si (111
) surface is formed.

On the other hand, if the temperature is lowered while the growth conditions remain the same, selectivity will be lost and silicon will grow even on the mask.

If the growth surface is irradiated with ultraviolet rays while silicon is growing at low temperatures, the ultraviolet rays will detach the silicon growth species adsorbed on the mask and hinder the growth of silicon in these areas, thus inhibiting the growth of silicon. Selectivity can be improved by using a mask.

Fourth step (FIG. 1(d)) [Surface oxidation of polysilicon layer] Wet etching the uppermost silicon nitride layer 8,
The removal is continued until it stops at the silicon oxide layer 7 below.

Thereafter, the exposed surface of the polysilicon layer is oxidized to form a silicon oxide layer 10.

Fifth step (FIG. 1(e)) [Formation of sidewalls] A thick silicon oxide layer is formed on the entire surface by vapor phase growth, and sidewalls 11 are formed by anisotropic etching.

Since the bottom surface of the silicon oxide layer 7 is also removed by this anisotropic etching, the silicon nitride layer is exposed at the bottom surface of the opening.

Next, using the sidewall 11 and the sidewall portion of the silicon oxide layer 7 as a mask, the underlying silicon nitride layer 6 is removed by wet etching.

Then, the underlying silicon oxide layer 5 is removed by wet etching so as not to damage the silicon single crystal layer 3 serving as the base region, and an opening reaching the base layer is provided.

Sixth step (FIG. 1(e)) [Formation of emitter] A polysilicon layer 12 containing no impurities is formed by vapor phase growth on the surface of the base layer at the bottom of the opening formed in the fourth step. An impurity such as As is implanted into the polysilicon layer 12 to give it n-type conductivity, and the polysilicon layer 12 is patterned, and the impurity of this emitter layer is diffused (driven) into the base to form a polysilicon emitter.

According to this embodiment, a side wall made of an insulator is formed on the side wall of the opening created after removing the island-shaped mask layer, and the emitter layer 12 is formed extending on the bottom surface of this opening. The surrounding base extraction electrode 9 is self-lined, and the area of the emitter layer can be miniaturized by the thickness of the sidewall beyond the limits of photolithography technology.

As a result, this bipolar transistor can be miniaturized,
Further, an integrated circuit including this bipolar transistor can be highly integrated.

Since the area of the emitter layer can be miniaturized and no margin is required for alignment, the area of the collector and base can be reduced, and as a result, the collector-base capacitance is reduced. In addition, polysilicon layer 4
Since the polysilicon layer 9 serves as an extraction electrode of the base layer 3, the base resistance can be reduced, so that high-speed operation of the bipolar transistor can be achieved.

Further, since the photo-excited low-temperature selective growth method is used, polysilicon layer 9 having a desired shape having fine grain boundaries can be formed in one step.

(2) Second Embodiment A method for manufacturing a bipolar transistor according to a second embodiment of the present invention will be described.

1st process ~ 2nd process This is the same as the first to second steps in the first embodiment.

Step 3-1 (Figure 2(a)) [Growth of polysilicon layer] Over the entire surface including the top of the four mask layers formed in the second step,
A polysilicon layer 9-1 is grown by CVD.

Step 3-2 (Figure 2(b)) [Buttering of polysilicon layer] The polysilicon layer 9-1 formed in step 3-1 is removed up to the uppermost silicon nitride layer 8 and flattened. pattern.

Fourth to fifth steps These are the same as the fourth step (FIG. 1(d)) to the fifth step (FIG. 1(f)) in the first embodiment.

According to this embodiment as well, the bipolar transistor can be miniaturized and the integrated circuit including the bipolar transistor can be highly integrated.

Furthermore, since the capacitance between the collector and the base and the base resistance can be reduced, the speed of the bipolar transistor can be increased.

[Effects of the Invention] According to the present invention, a polysilicon layer is formed around an island-shaped mask layer, and a side wall made of an insulator is formed on the side wall of an opening that is formed after removing this island-shaped mask layer.
Since the emitter layer is formed in this opening, the area of the emitter layer can be miniaturized (0,
2 μmmΦ) and the emitter layer and the base extraction electrode around it are self-aligned, so the bipolar transistor can be miniaturized and the integrated circuit including this bipolar transistor can be highly integrated.

Furthermore, since a thick polysilicon layer is used as an extraction electrode from the base layer, base resistance can be reduced, which, in combination with a reduction in collector-base capacitance, can speed up the operation of the bipolar transistor.

[Brief explanation of drawings]

FIGS. 1(a) to (f) are manufacturing process diagrams of a bipolar transistor according to the first embodiment of the present invention, and FIGS. 2(a) and (b) are
3 is a manufacturing process diagram of a bipolar transistor according to a second embodiment of the present invention, and FIG. 3 is a diagram showing the configuration of a conventional bipolar transistor. 1-single crystal collector active layer, 2--field oxide film,
3- silicon single crystal layer serving as base region, 4 polysilicon layer, 5- silicon dioxide layer, 6 silicon nitride layer, 7-
silicon dioxide layer, 8-silicon nitride layer, 9-polysilicon layer, 10--silicon oxide layer, II--side wall, I2 silicon layer poly

Claims (2)

[Claims] (1) An island-shaped mask layer is provided on the base layer, a polysilicon layer is grown in areas other than the mask layer by photo-excited low-temperature selective growth method, and the island-shaped mask layer is removed to form a polysilicon layer. forming an opening in the polysilicon layer, forming an insulating layer on the surface of the polysilicon layer, forming a sidewall made of an insulator on the sidewall of the opening in the polysilicon layer, and growing an emitter layer extending on the bottom surface of the opening. . A method for manufacturing a bipolar transistor, characterized in that the polysilicon layer is used as an extraction electrode from a base layer. (2) providing an island-shaped mask layer on the base layer, growing a polysilicon layer over the entire upper surface including the mask layer, and flattening the upper surface of the polysilicon layer to expose the mask layer; forming an opening in the polysilicon layer by removing the island-shaped mask layer, forming an insulating layer on the surface of the polysilicon layer, and forming a sidewall made of an insulator on the sidewall of the opening of the polysilicon layer; A method for manufacturing a bipolar transistor, comprising growing an emitter layer extending on the bottom surface of the opening, and using the polysilicon layer as an extraction electrode from the base layer.