JPH0474433A - Method and apparatus for manufacturing semiconductor intergrated circuit device - Google Patents

Abstract

PURPOSE:To remarkably enhance the connecting relaibility of an electrode to a bump electrode by a method wherein a metal foil is placed on the electrode on a mounting board, the electrode and the metal foil are heated and alloyed and the bump electrode is formed on the electrode. CONSTITUTION:An Au ribbon 11 is sucked and fixed onto a chuck block 35; a ribbon cutting blade 37 is lowered; the Au ribbon 11 is cut; an Au foil 12 having a prescribed area is formed. In succession, the foil is sucked by a chuck collet 39; it is conveyed to a metal-foil positioning part C; it is placed in the chip-mounting face of a package board 2. While the foil has been placed on a carrier 40, it is conveyed to a heating part D and is placed on a heating block 42. Then, in this state an electric current is applied to a heater 45 which has been built in the heating block 42; the package board 2 is heated to a prescribed temperature. Sn on the surface of electrodes 6 is diffused into the Au foil 12; a eutectic alloying reaction is caused; bump electrodes 7a which are composed of an Au-Sn alloy and which are in a molten state are formed on the respective electrodes 6 in a self-aligned manner. The residue of the Au foil 12 which has been sucked to a metal-foil fixation collet 43 is collected in a pocket 47; it is regenerated and utilized as the Au ribbon 11.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a manufacturing technology of semiconductor integrated circuit devices, and is particularly applicable to the formation of bump electrodes of semiconductor integrated circuit devices mounted by face-down bonding method. It is related to effective technology.

[Conventional technology]

In recent years, logic LSIs such as gate arrays and microcomputers have become more multi-functional and denser, and as a result, external terminals (
The number of input/output pins is rapidly increasing. For this reason, the wire bonding method, which connects external devices by bonding wires to electrode pads provided on the periphery of the semiconductor chip, has reached its limit, and instead, bump electrodes made of solder etc. are used on the chip electrodes. The flip-chip method, in which the chip is bonded face-down to the substrate via the bump electrodes, is attracting attention.

The flip-chip method described above allows terminals to be provided not only at the periphery of the chip but also at the center, so it is possible to increase the number of pins on the chip, and it is also possible to shorten the wiring length inside the chip. , it has the feature of being able to accelerate the speeding up of logic LSIs. In addition, bump electrodes are used not only as external terminals when mounting a chip on a substrate, but also as chip carriers in which a chip is hermetically sealed in a cavity consisting of a package substrate and a cap. It is also used as an external terminal.

Solder vapor deposition and solder ball supply methods are known as methods for forming bump electrodes on chips and chip carriers.

To form bump electrodes on a chip using the solder vapor deposition method, electrode pads are first formed by etching the surface protection film of the chip and opening contact holes that reach the Aβ wiring. Next, thin films of Cr5Cu and Au, for example, are sequentially laminated on the chip using a vapor deposition method, and then the thin films at locations other than the electrode pads are removed by etching to form a solder base layer (BL) on the electrode pads.
M; Ba1l Limiting Metali
zation). The solder base layer is formed to cover the bottom, sidewalls, and upper edge of the contact hole. Cr constituting the bottom layer of the solder base layer is provided to prevent alloying reaction between the solder and Δr. Cu constituting the intermediate layer of the solder base layer is provided to improve solder wettability and increase the bonding strength with the solder base layer. Au constituting the uppermost layer of the solder base layer is provided to prevent corrosion of the Cu. Next, a 5n
A hemispherical bump electrode is formed by selectively forming a solder layer made of -Pb alloy and finally heating and melting this solder layer in a reflow oven. The method for forming the bump electrode described above is described, for example, in Bulletin of the Japan Institute of Metals, Vol. 23, No. 12 (1984'), P1004-P1.
013, IEEJ study group materials (March 17, 1989 edition) P46, etc.

Next, to connect the bump electrodes to the chip carrier using the solder ball supply method, first prepare a flat glass jig with many through holes, and insert a solder ball into each of the through holes. . The through hole is provided so as to correspond to the position of the electrode (land) on the lower surface of the chip carrier. Since the inner diameter of the through hole is slightly smaller than the diameter of the solder ball, a portion of the solder ball is inserted into the through hole, and the rest protrudes above the through hole. Next, the chip carrier is placed on the jig on which the solder balls are placed, and the chip carrier is aligned so that each of the electrodes on the lower surface of the chip carrier is placed on the solder balls. This positioning is done mechanically. Next, the chip carrier in this state is transported to a reflow oven, and the solder poles are heated and melted to form hemispherical bump electrodes on the electrodes on the lower surface of the chip carrier. The method for forming the bump electrodes described above is described in detail in, for example, Japanese Patent Laid-Open No. 1-243554.

[Problem to be solved by the invention]

The inventors of the present invention investigated the aforementioned bump electrode formation methods (solder vapor deposition method and solder ball supply method) and found the following problems.

First of all, the solder evaporation method has problems such as: ■ There are problems with the controllability of the thick film process, ■ It requires extremely expensive solder deposition equipment, and ■ The masks used in the solder deposition process must be created for each product. For this reason, it takes a lot of time and money to form the bump electrodes, and as a result, there is a problem in that the manufacturing cost of the bump electrodes is extremely high.

On the other hand, the solder ball supply method has a problem in connection reliability of bump electrodes because the accuracy of alignment between the solder balls and the electrodes to which they are connected is low. In other words, since the solder ball positioned on the jig is only partially inserted into the through hole, it easily rotates when the chip carrier is placed on it, and this rotation changes the position of the electrode and the solder ball. The relationship will shift. In addition, when the chip carrier is placed on the jig, the electrodes of the chip carrier and the solder balls are only in point contact, so vibrations generated during the process of transporting them to the reflow oven can also cause their positional relationship to shift. It ends up. Furthermore, the vibration may cause the solder ball to fall out of the through hole.

The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a technique that can form bump electrodes at low cost.

Another object of the present invention is to provide a technique that can improve the connection reliability of bump electrodes.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

The present invention is a method of forming a bump electrode on the electrode by placing a metal foil on the electrode of a mounting board and alloying the electrode and the metal foil by heating.

[Effect]

According to the above-described means, bump electrodes can be formed on all electrodes in a self-aligned manner and collectively through a eutectic alloying reaction between the electrodes of the mounting board and the metal foil placed thereon. Therefore, there is no need to create masks depending on the number of electrodes or their arrangement, and there is no need for expensive manufacturing equipment.Furthermore, the time required to form bump electrodes is extremely short. It can be formed extremely inexpensively.

Furthermore, since the bump electrode can be formed on the electrode in a self-aligned manner, the connection reliability between the electrode and the bump electrode is significantly improved.

The present invention will be explained below with reference to Examples. In addition, in all the figures for explaining the embodiment, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

[Example 1] As shown in FIG. 6, the chip carrier 1a of this Example 1
In this example, a semiconductor chip 5 is mounted in a cavity 4 made up of a package substrate 2 and a cap 3 using a face-down bonding method. The package substrate 2 is made of ceramic such as alumina or mullite, and the cap 3 is made of ceramic such as AIN. A large number of electrode pads (not shown) are provided on the element formation surface (lower surface) of the upper chip 5, and the same number of electrodes 6 as the upper electrode pads are provided on the chip mounting surface of the package substrate 2. . The upper electrode 6 and the electrode pad of the chip 5 are:
They are electrically connected via bump electrodes 7a formed on the electrodes 6 by a method described later. The bump electrode 7a is made of an Au-Sn alloy containing about 20% by weight of Sn.

A large number of leads 8 forming external terminals of the chip carrier 1a are provided on the outer periphery of the package substrate 2.

The leads 8 are made of an Fe-based alloy such as 42 alloy, and are connected to the electrodes 6 on the chip mounting surface via wiring (not shown) provided on the inner layer of the package substrate 2. The cap 3 also serves as a heat sink, and a large number of heat radiation fins 9 are provided on its upper surface. The cap 3 is bonded to the back surface of the chip 5 and the upper edge of the package substrate 2 through a brazing material 10, thereby hermetically sealing the chip 5 within the cavity 4 and separating it from the chip 5. The structure is such that the generated heat is transmitted to the cap 3 through the brazing material 10. The above brazing filler metal 10
is, for example, pb-Sn containing about 10% by weight of Pb.
Made of alloy.

Next, the package substrate 2 of the chip carrier 1a described above is
The method of forming the bump electrode 7a on the electrode 6 is shown in FIGS.
This will be explained using FIG. FIG. 1 is a schematic diagram of a main part of a bump forming apparatus 30 used for forming bump electrodes, and FIGS. 2 to 5 are cross-sectional views of a package substrate shown in each step.

As shown in FIG. 1, the bump forming apparatus 30 used in this embodiment 1 includes a metal foil supply section (A), a metal foil cutting section (B),
, a metal foil positioning section (C), a heating section (D), and a metal foil recovery section (E). A package substrate 2 shown in FIG. 2 is waiting on the stage 31 of the metal foil positioning section (C). The electrodes 6 provided on the chip mounting surface of the package substrate 2 are made of metallization formed by screen printing W (tungsten) ink during molding of the package substrate 2, and the surface thereof is electroplated with Sn. There is.

Therefore, first, the Au ribbon 11 wound around the spool 32 of the metal foil supply section (A) is sent forward by the rotation of the delivery roller 33, and its tip is transferred to the metal foil cutting section (B).
placed on the chuck block 35 of. The Au ribbon 11 has a thickness of about 100 to 200 μm.

The amount of feed of the Au1J bomb 11 is controlled by a pulse motor (not shown) that electrically controls the rotation angle.

The rotational motion of the pulse motor is transmitted to the delivery roller 33 via the drive row 534.

Next, the Au ribbon 11 placed on the chuck block 35 is sucked and fixed onto the chuck block 35 by exhaust from the vacuum exhaust port 36, and then the ribbon cutting blade 37
is lowered to cut the Au ribbon 11 to form an Au foil 12 having a predetermined area. Next, the upper EAu foil 12 is adsorbed by a chuck collet 39 equipped with a vacuum exhaust port 38 and transported to the metal foil positioning section (C), where it is placed on the chip mounting surface of the package substrate 2 waiting there. do.

The package substrate 2 is placed on a carrier 40 made of ceramic and fixed by positioning pins 41. As shown in FIG.
The outer dimensions of the Au foil 12 placed thereon are slightly smaller than the area of the chip mounting surface. Above Au112
is placed so as to cover the upper surface of all the electrodes 6 provided on the chip mounting surface, so that each electrode 6 and the Au
No alignment with the foil 12 is necessary at all.

Next, the package substrate 2 with the Au foil 12 placed on the chip mounting surface is transported to the heating section (D) while being placed on the carrier 40 by a carrier transport mechanism (not shown),
Place it on the beat block 42. Subsequently, the metal foil fixing collet 43 is brought close to the package substrate 2 from above, and nitrogen gas is sprayed onto the entire upper surface of the Au foil 12 from the inert gas inlet 44 which also serves as a vacuum exhaust port. This results in
Since the Au foil 12 on the package substrate 2 is pressed onto the electrodes 6 by the pressure of nitrogen gas, it is in perfect contact with all the electrodes 6, regardless of its own warpage, deformation, or variations in the height of the electrodes 6. do.

Next, in this state, the heater 45 built into the heat block 42 is energized to heat the package substrate 2 to a predetermined temperature. The heating temperature of the heat block 42 is determined by the thermocouple 46
is fed back and controlled to be constant. In this way, the electrode 6 of the package substrate 2 and the Au 112 closely attached thereto are heated to a temperature somewhat higher than 280°C, which is the eutectic point between Sn (the plating layer on the surface of the electrode 6) and Au. As a result, Sn on the surface of the electrodes 6 diffuses into the Au foil 12 to cause a eutectic alloying reaction, and as shown in FIG. Electrode 7a is formed in self-alignment. Subsequently, the remaining Au foil 12 that did not participate in the above-mentioned self-eutectic alloying reaction is adsorbed by the metal foil fixing collet 43 and removed from the package substrate 2, and the temperature of the heat block 42 is lowered to remove it from the top of the electrode 6. The remaining bump electrode 7a is solidified (FIG. 5). Metal foil fixing collet 43
The residue of the Au foil 12 adsorbed to the metal foil recovery section (E)
The Au ribbon 11 is transported to the pocket 47 and collected in the pocket 47.
It is recycled as Further, the package substrate 2 is housed together with the carrier 40 in a carrier stocker (not shown), and is cooled to room temperature.

In order to mount the chip 5 on the package substrate 2 through the bump electrodes 7a formed by the method of Jeroki, the chip 5 with a solder base layer (BLM) formed on the surface of the electrode pad in advance is mounted on the package substrate 2. , and the chip 5 is positioned so that each of the electrode pads on the lower surface of the chip 5 is placed on the bump electrode 7a. This alignment is done mechanically. Next, the package substrate 2 in this state is transferred to a reflow oven, and the bump electrodes 7a are heated and melted to connect the electrode pads of the chip 5 and the bump electrodes 7a.

According to the bump forming method of Example 1 having the above configuration, the following effects can be obtained.

(1) Since the bump electrodes 7a are formed on all the electrodes 6 in a self-aligned manner and collectively through a eutectic alloying reaction between the electrodes 6 of the package substrate 2 and the Au foil 12 in close contact thereon, ■Unlike the solder vapor deposition method, there is no need to create vapor deposition masks depending on the number of electrodes and their arrangement. ■No need for expensive solder evaporation equipment. ■The time required to form bump electrodes is extremely short. For these reasons,
Bump electrodes can be formed at extremely low cost.

(2) By forming the bump electrode 7a on the electrode 6 in a self-aligned manner, the alignment accuracy between the electrode 6 and the bump electrode 7a becomes extremely high, so that the connection reliability between the two is significantly improved.

In the bump forming method of Example 1 described above, nitrogen gas was sprayed onto the upper surface of the Au foil placed on the package substrate, and the AU foil was brought into close contact with the electrode by the pressure. As shown in Figure 7, A
A pressure bonding jig 48 may be pressed against the upper surface of the U foil 12 to bring the Au foil 12 and the electrode 6 into close contact. In this case, the crimping jig 4
By embedding a heater in 8, it is also possible to heat the Au foil 12 and the electrode 6 from above. Furthermore, the Au foil 12 and the electrode 6 can be crimped by ultrasonically vibrating the crimping jig 48.

In order to prevent the molten bump electrode 7a from adhering to the bottom surface of the crimping jig 48, it is preferable to coat the bottom surface of the crimping jig 48 with a material having a small coefficient of friction such as fluororesin. In addition, instead of applying pressure to the top surface of the AU foil by blowing gas or using a pressure bonding jig, as shown in FIG. Through-holes 49 may be provided and the lower surface of the Au foil 12 may be vacuum-suctioned downward through these through-holes 49 to bring the Au foil 12 and the electrode 6 into close contact. However, in this case, the bump electrode 7a is placed on the electrode 6.
After forming the through hole 49, it is necessary to fill the inside of the through hole 49 with some kind of material such as resin.

Since the package substrate 2 of the chip carrier 1a of this embodiment 1 has a cavity 4 provided on its chip mounting surface, simply inserting the Au foil 12 into the cavity 4 creates an Au foil.
The foil 12 can be automatically positioned on the chip mounting surface. However, depending on the type of chip carrier, there are some that do not have a cavity provided on the chip mounting surface of the package substrate. In such a case, as shown in FIG. 9, a frame 50 is placed so as to surround the outer periphery of the electrode 6 forming area on the chip mounting surface, and the Au foil 12 is inserted into the frame 50. can be automatically positioned on the chip mounting surface.

In the bump forming method of Example 1 described above, the bump electrode was formed by causing a eutectic alloying reaction between the Sn plating on the surface of the electrode and the Au. AU plating is applied to the
A bump electrode made of an Au-Sn alloy can also be formed on the electrode by placing an n-foil on the electrode. In addition, instead of the above method of plating the surface of the electrode, it is also possible to form an Au (or Sn) electrode on the package substrate and directly connect it to the Sn foil (or Au foil) placed on the eutectic alloy. A chemical reaction may be caused.

The metal material constituting the electrode (or the plating layer on its surface) and the metal material constituting the foil are not limited to the above-mentioned combination of Au and Sn, but may be metals that cause an alloying reaction. , any combination can be made. Examples of typical combinations are shown in Table 1 below.
Describe it in

In each combination shown in the table, which metal (■ or ■) is used to form the foil is arbitrary.

Table 1 C Example 2] As shown in FIG. 14, the semiconductor integrated circuit device of Example 2 has a mounting wiring board 13 bonded to the periphery of its chip carrier mounting surface via a brazing material 14. In the cavity 16 composed of the cap 15'! x number of chip carriers 1b are mounted. A chip carrier lb is mounted on the chip carrier mounting surface of the mounting wiring board 13.
A large number of electrodes 17 are provided for mounting. The electrode 17 is made of metallization formed by screen printing W (tungsten) ink during molding of the mounting wiring board 13. A large number of external pins 18 are provided on the lower surface of the mounting wiring board 13. The above external pin 18 and electrode 1
7 is electrically connected through wiring (not shown) provided in the inner layer of the mounting wiring board 13. cap 15
A cooling block 19 is connected to the upper surface of the cooling block 19, and a large number of refrigerant passages 20 are provided within the cooling block 19. A refrigerant such as water flows in the refrigerant g820.

The chip carrier 1b has a chip 5 mounted in a cavity 4 composed of a package substrate 2 and a cap 3 bonded to the periphery of the chip mounting surface via a brazing material 10. A large number of electrode pads (not shown) are provided on the element forming surface (lower surface) of the chip 5.
The chip mounting surface of the package substrate 2 is provided with the same number of electrodes 6 as the electrode pads. The electrode 6 and the electrode pad of the chip 5 are electrically connected via a bump electrode 7b. The bump electrode 7b is the same as that of the embodiment 1.
The bumps are formed on the electrodes 6 of the package substrate 2 using the bump forming method described above, and are made of a Pb-Ag alloy containing about 2.5% by weight of Ag. The bump electrode 7b is made by placing PB foil on the electrode 6 plated with Ag, for example.
Both are heated at a temperature higher than 303° C., which is the eutectic point of Ag and Pb, to cause a eutectic alloying reaction, thereby forming self-alignment on the electrode 6.

A large number of electrodes 21 are provided on the lower surface of the package substrate 2 of the chip carrier 1b. The electrode 21 and the electrode 6 on the chip mounting surface are electrically connected via wiring (not shown) provided in the inner layer of the package substrate 2. The electrode 21 is made of metallization formed by screen printing W (tungsten) ink when the package substrate 2 is molded. The chip carrier 1b is mounted on the chip carrier mounting surface of the mounting wiring board 13 via bump electrodes 7C formed on the electrodes 21 by a method to be described later. The bump electrode 7C is made of a Sn-Ag alloy containing about 3.5% by weight of Ag.

In the cavity 16, cooling fins 22 are interposed between the cap 15 and the chip carrier 1b. The lower surface of the cooling fin 22 is connected to the chip carrier 1.
It is connected to the upper surface of the cap 3 of b. cooling fin 2
The upper surface of 2 is in contact with the cap 15. The cooling fins 22 and the cap 15 are fitted into each other through uneven portions provided on the surfaces in contact with each other.

Next, the package substrate 2 of the chip carrier 1b described above is
A method of forming the bump electrode 7C on the lower surface of the electrode 21 will be explained using FIGS. 10 to 12 and FIGS. 13(a) to (f). Note that in FIGS. 10 to 12, the electrodes 21 on the lower surface of the package substrate 2 are schematically shown.

First, as shown in FIG. 10, the chip carrier 1b
The lower surface of the package substrate 2, that is, the surface on which the electrodes 21 are provided, faces upward. The electrode 21 is made of metallization formed by screen printing W (tungsten) ink during molding of the package substrate 2, and its surface is electroplated with Ag. Subsequently, as shown in FIG. 11, the S
Place the n-foil 23. On the upper surface of the Sn foil, an electrode 21
A grid-like cutout 24 is provided at a position corresponding to the gap. The area of the Sn foil 23 within the area defined by the cutout 24 is the same.

Cross section of the notch 24 provided in the Sn foil 23 (first
The shape of the cross section taken along line A-A in Figure 1 is as shown in Figure 13 (a
) It has a triangular shape as shown in the figure. The cross-sectional shape of the notch 24 may be rectangular as shown in FIG. 13(b) or hemispherical as shown in FIG. 13(c). Also,
As shown in FIGS. 13(d) to 13(f), the triangular, square, or hemispherical notches 24 may be provided on both sides of the Sn foil 23.

Next, the electrode 21 of the package substrate 2 and the Sn foil 23 placed thereon are heated to a temperature somewhat higher than the eutectic point of Ag and Sn (221° C.).

As a result, Ag on the surface of the electrode 21 diffuses into the Sn foil 23 and a eutectic alloying reaction occurs, forming a molten bump electrode 7C made of Sn-Ag alloy in the Sn foil 23 on the electrode 21. . Thereafter, by removing the remaining Sn foil 23 that did not participate in the eutectic alloying reaction, a bump electrode 7a is formed on the electrode 21 in a self-aligned manner, as shown in FIG. 12.

Note that the puff cage substrate 2 of the chip carrier 1b of Example 2 is provided with electrodes 2 over the entire area except for the outer periphery of the lower surface. Some are only available in In such a case, as shown in Figure 15,
A rectangular hole is provided in the center of the Sn foil 23, and the Sn foil 23 is provided only on the area where the electrode 21 is provided. According to this configuration, the bump electrode 7C is provided only on the electrode 21,
Since it is possible to prevent the Sn foil 23 from remaining in areas where the electrodes 21 are not present, the bump electrode formation method of Example 2 can also be applied to a chip carrier in which the electrodes 21 are provided only on the outer periphery of the package substrate 2. Can be applied.

[Example 3] A method for forming a bump electrode according to Example 3 will be described with reference to FIGS. 16 to 18.

As shown in FIG. 16, the Sn foil 23 of Example 3 is constructed by cutting the Sn foil 23 of Example 2 from its notch 24 into a shape corresponding to the electrodes 21 arranged in a row. , holes 5 for fixing the Sn foil 23 at both ends thereof.
1.

First, as shown in FIG. 17, the chip carrier 1b is placed on the metal foil fixing jig 52, and the Sn foil 23 is placed on the electrode 21 of the package substrate 2.

The metal foil fixing jig 52 is provided with a pin 53 at a position corresponding to the hole 51 of the Sn foil 23. To align the electrode 21 and 5T1i23, insert the pin 53 into the hole 51. This is done by inserting. Thereafter, by performing the same steps as in Example 2, the bump electrode (not shown) of Example 3 is formed on the electrode 21 in a self-aligned manner. Note that the metal foil fixing jig 52 can also be placed on the chip carrier lb, as shown in FIG. 18.

[Example 4] The method for forming a bump electrode according to Example 4 is described in the nineteenth example! ! 1
〜Explained using FIG. 22.

First, a chip 5 as shown in FIG. 19 is prepared. The chip 5 is made of GaAs (gallium arsenide), and a large number of electrode pads 60 are provided on its main surface. The electrode pad 60 is made of Au.

To form the electrode pad 6o, first, a barrier metal 62 made of a high melting point metal such as MO is selectively formed on the ΔU wiring 61 formed on the semiconductor wafer. Next, C.V.
A silicon oxide insulating film 63 is deposited on the entire surface of the wafer using the D method, and a contact hole 64 reaching the barrier metal 62 is formed by selectively opening a portion of the insulating film 63 . Thereafter, the electrode pad 6D is formed on the barrier metal 62 by patterning a thin film of ΔU deposited over the entire surface of the wafer using a vapor deposition method or a sputtering method. Finally, the wafer is diced to obtain chips 5.

Next, as shown in FIG. 20, a Sn foil 23 is placed on the chip 5.
Place. The Sn foil 23 is placed so as to cover the upper surfaces of all the electrode pads 60 on the chip 5. Also in this case, for example, by spraying nitrogen gas onto the entire upper surface of the Sn foil 23, the Sn foil 23 and each electrode pad 60 are brought into complete contact with each other.

Next, in this state, the electrode pad 6Q and the Sn foil 23 placed thereon are heated at 280° C., which is the eutectic point of Sn and Au.
By heating to a temperature slightly higher than A molten bump electrode 7d made of Au-3n alloy is formed on the pad 60 in a self-aligned manner. continue,
The remaining Sn foil 23 that did not participate in the eutectic alloying reaction
is removed from the top of the chip 5, and the temperature of the chip 5 is lowered to solidify the bump electrodes 7d remaining on the electrode pads 60 (FIG. 22).

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to Examples 1 to 4, and can be modified in various ways without departing from the gist thereof. It goes without saying that there is.

In Examples 1 to 4, the bump electrodes were formed using binary alloys such as Au-3n alloy, AgSn alloy, and Pb-Ag alloy. Bump electrodes can also be formed from alloys. For example, Ag-plated electrodes and solder (Pb-3
By using a PPb-3n-A alloy foil, a bump electrode of PPb-3n-A alloy can be formed.

In Examples 1 to 3, the bump electrodes are formed on the electrodes of a ceramic substrate.
Any one can be used.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In the method for manufacturing a semiconductor integrated circuit device of the present invention, a bump electrode is formed on the electrode by placing a metal foil on an electrode of a mounting board and alloying the electrode and the metal foil by heating. According to this method, bump electrodes can be formed at extremely low cost.

Moreover, the connection reliability between the electrode and the bump electrode can be significantly improved.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of a bump forming apparatus that is an embodiment of the present invention; FIGS. 2 to 5 are cross-sectional views of a package substrate showing step-by-step a bump forming method that is an embodiment of the present invention; FIG. 6 is a sectional view of a chip carrier used in this embodiment, FIGS. 7 to 9 are sectional views of a package substrate showing bump forming methods according to other embodiments of the present invention, and FIGS. FIG. 12 is a perspective view of a chip carrier showing the process order of a bump forming method according to another embodiment of the present invention, and FIG. 13(a) to FIG. 14 is a sectional view of a chip carrier used in this embodiment, and FIG. 15 is a schematic diagram showing the cross-sectional shape of a notch. FIG. 15 is a sectional view of a chip carrier showing a bump forming method according to yet another embodiment of the present invention. FIG. 16 is a perspective view of a metal foil showing a bump forming method according to still another embodiment of the present invention, and FIG. 17 is a chip showing a bump forming method using the metal foil shown in FIG. FIG. 18 is a perspective view of a main part of a chip carrier showing a bump forming method according to still another embodiment of the present invention; FIGS. 19 to 22 are a perspective view of a main part of a chip carrier according to still another embodiment of the present invention FIG. 1 is a cross-sectional view of a main part of a semiconductor chip showing a bump forming method according to an embodiment in the order of steps. la, lb...Chip carrier, 2...Package board, 3.15...Cap, 4.16...Cavity, 5...Semiconductor chip, 6°17.21...Electrode, 7a , 7b, 7c, 7d...bump electrode, 8...
・Lead, 9... Radiation fin, 10.14... Brazing metal, 11... Au ribbon, 12... Au foil, 13
...Mounted wiring board, 18...External pin, 19...
Cooling block, 20... Refrigerant path, 22... Cooling fin, 23... Sn foil, 24... Notch, 30...
- Bump forming device, 31...stage, 32...spool, 33...feeding roller, 34...drive roller, 35...chuck block, 36.38...
Vacuum exhaust port, 37... Ribbon cutting blade, 39... Chuck collet, 40... Carrier, 41... Positioning pin, 42... Heat block, 43... Metal foil fixing collet, 44... ...Inert gas, 45...Heater, 46...Thermocouple, 47...Pocket, 48...
・Crimp jig, 49...through hole, 50...frame, 51・
... hole, 52 ... metal foil fixing jig, 53 ... pin, 60 ... electrode pad, 61 ... Au wiring, 62 ...
... Barrier metal, 63 ... Insulating film, 64 ... Contact hole. Agent Patent Attorney Dai Tsutsui Diagram b Diagram

Claims (1)

[Claims] 1. The method includes the step of placing a metal foil on an electrode of a mounting board and forming a bump electrode on the electrode by alloying the electrode and the metal foil by heating. A method of manufacturing a semiconductor integrated circuit device, characterized in that: 2. By applying pressure to the top surface of the metal foil,
2. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the metal foil is brought into close contact with the electrode. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 2, further comprising blowing gas onto the upper surface of the metal foil. 4. The method of manufacturing a semiconductor integrated circuit device according to claim 2, wherein the metal foil is vacuum-suctioned through a hole provided in the mounting board. 5. The method of manufacturing a semiconductor integrated circuit device according to claim 1, further comprising arranging a frame on the mounting board for aligning the electrode and the metal foil. 6. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the metal foil is provided with a notch. 7. The method further comprises the step of placing a metal foil on an electrode pad of a semiconductor chip and forming a bump electrode on the electrode pad by alloying the electrode pad and the metal foil by heating. A method for manufacturing a semiconductor integrated circuit device. 8. Metal foil cutting means for cutting the ribbon-shaped metal foil supplied from the metal foil supply means into predetermined dimensions; metal foil positioning means for placing the metal foil on the electrode of the mounting board; A heating means for forming a bump electrode on the electrode by alloying the metal foil with the metal foil by heating, and a metal foil recovery means for removing unnecessary metal foil remaining on the mounting board. A semiconductor integrated circuit device manufacturing device characterized by: