JPH0474380A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPH0474380A
JPH0474380A JP2185798A JP18579890A JPH0474380A JP H0474380 A JPH0474380 A JP H0474380A JP 2185798 A JP2185798 A JP 2185798A JP 18579890 A JP18579890 A JP 18579890A JP H0474380 A JPH0474380 A JP H0474380A
Authority
JP
Japan
Prior art keywords
time
circuit
output
signal
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2185798A
Other languages
Japanese (ja)
Inventor
Masanori Oe
Takuji Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP2185798A priority Critical patent/JPH0474380A/en
Publication of JPH0474380A publication Critical patent/JPH0474380A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To improve the processing speed by inserting an address pointer, a comparing circuit, a control circuit, and an output control circuit into a data output circuit.
CONSTITUTION: This circuit is provided with a comparing circuit 13 for inputting a write pointer signal for showing an address at the time of write and a read pointer signal for showing an address at the time of read and outputting a coincidence output signal only at the time of the same address, a control circuit 6 for inputting the coincidence output signal and a data input signal at the time of write and outputting a control output signal which becomes an output only at the time when an inversion signal of the data input signal at the time of this write and the coincidence output signal both exist, and an output control circuit 14 for inputting a control output signal inserted into a data line of an output circuit and turning off an outut from a memory cell 10 at the time when this control output signal exists. In such a way, a waiting time of a pre scribed time becomes unnecessary, and the processing speed can be increased.
COPYRIGHT: (C)1992,JPO&Japio
JP2185798A 1990-07-13 1990-07-13 Semiconductor integrated circuit Pending JPH0474380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2185798A JPH0474380A (en) 1990-07-13 1990-07-13 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2185798A JPH0474380A (en) 1990-07-13 1990-07-13 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPH0474380A true JPH0474380A (en) 1992-03-09

Family

ID=16177077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2185798A Pending JPH0474380A (en) 1990-07-13 1990-07-13 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPH0474380A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63222392A (en) * 1987-03-11 1988-09-16 Texas Instr Japan Ltd Memory operation instruction control circuit
JPS63255747A (en) * 1987-04-13 1988-10-24 Mitsubishi Electric Corp Picture memory device
JPH0273591A (en) * 1988-09-08 1990-03-13 Hitachi Ltd Semiconductor memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63222392A (en) * 1987-03-11 1988-09-16 Texas Instr Japan Ltd Memory operation instruction control circuit
JPS63255747A (en) * 1987-04-13 1988-10-24 Mitsubishi Electric Corp Picture memory device
JPH0273591A (en) * 1988-09-08 1990-03-13 Hitachi Ltd Semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

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