JPS6379140A - Digital integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the abnormal operation of a system by restoring the data on an output circuit to its correct state after a fixed time even in such a case the data is changed owing to the external noises, etc. CONSTITUTION:When a write instruction is executed, a signal line 14 is validated and gates 7 and 8 are opened. Then the data on a data line 10 are written to a spare circuit 1 and an output circuit 2 by a write signal 11. When this writing action is through, both gates 7 and 8 are closed and gates 6 and 9 are opened respectively. Thus the data are immediately restored to a correct state by the next write signal 12 even though the output of the circuit 2 is inverted by the influence of the external noises, etc.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to data retention in a digital integrated circuit, and particularly to data retention in an output circuit that outputs data to the outside.

[Conventional technology]

As a conventional technique, there is a digital integrated circuit having an output circuit as shown in FIG. When data is folded into the output circuit by a program (hereinafter referred to as a write instruction), the output circuit holds the same data until the next write instruction is executed.

[Problem that the invention seeks to solve]

The above-mentioned conventional output circuit has the disadvantage that when the output terminal is affected by external noise, the data of the output circuit may change, which hinders the normal operation of the system.

An object of the present invention is to provide a digital integrated circuit having a function of correctly returning the data of the output circuit to the data before the change without executing the write command even if the data of the output circuit changes independently of the write command. Our goal is to provide the following.

In contrast to the conventional output circuit described above, the present invention uses a circuit that generates a convolution signal to the output circuit at regular intervals.
It has an original content in that it is written repeatedly without using convolution instructions.

[Means for solving problems]

In addition to an output circuit that outputs data to the outside, the digital integrated circuit of the present invention has a spare circuit that holds the same data as the data written to the multi-output circuit by a write command, and a spare circuit that holds the same data as the data written to the multi-output circuit by a write command. In order to read data from the circuit, the circuit includes a circuit that generates a write-in signal at regular intervals independently of the execution of a write command.

Therefore, even if the data in the output circuit changes due to noise or the like, the original correct data is written by this spare circuit and write signal generation circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit block diagram of the present invention. When the write command is executed, the signal line 14 becomes valid and the gates 7 and 8 are opened accordingly. Then, the data on the data line 10 is transmitted to the preliminary circuit 1 and the output circuit 2 by the write signal 11.
written to. After the write command is executed, gates 7 and 8 are closed, and gates 6 and 9 are opened. Therefore, the output data of the preliminary circuit 1 is repeatedly written to the output circuit 2 by the write signal 12 outputted from the write signal generating circuit 4 at constant intervals t. In the worst case, the data wall of the output circuit 2 is restored to the original correct data in time.

Figure 3 shows the timing diagram of the valley. Since the gates 6 and 9 are closed during execution of the subtraction command, the output data and write signal 12 of the preliminary circuit 1 are not valid for the output circuit 2.

〔Effect of the invention〕

As explained above, in the digital integrated circuit of the present invention, even if the data in the output circuit changes due to the influence of foreign noise, etc., the data written in by the write command will be transferred to the output circuit after a certain period of time. The data is restored regardless of the execution of the convolution instruction. Therefore, by setting a shorter time until data is restored, abnormal system operation can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram showing one embodiment of the present invention.
FIG. 2 is a block diagram of a conventional output circuit. FIG. 3 is a timing diagram of a circuit block diagram showing one embodiment of the present invention. l...Spare circuit, 2,1'...Output circuit, 3,2'...Output buffer 7, 4...
・Soaking signal generation circuit, inverter, 6~
9...Gate, 10.4'...Data line! 1.12.5'... Every issue of Sogo, 1
3.3'...Output terminal, 14...Signal line. Agent Patent Attorney Susumu Uchihara 1 Hone Hachi. Enno Z diagram

Claims (1)

[Claims] In a digital integrated circuit having an output circuit that writes data by executing a program and outputs the data to the outside, a spare circuit that holds the same data as the data written to the output circuit, and a spare circuit that holds the same data as the data written to the output circuit, and a spare circuit that holds the same data as the data written to the output circuit; 1. A digital integrated circuit comprising: a circuit for generating a write signal at regular intervals, independent of program execution, in order to write data from the circuit.