JPH047135B2 - - Google Patents
Info
- Publication number
- JPH047135B2 JPH047135B2 JP847686A JP847686A JPH047135B2 JP H047135 B2 JPH047135 B2 JP H047135B2 JP 847686 A JP847686 A JP 847686A JP 847686 A JP847686 A JP 847686A JP H047135 B2 JPH047135 B2 JP H047135B2
- Authority
- JP
- Japan
- Prior art keywords
- flip
- flop
- input
- counter
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP847686A JPS62166617A (ja) | 1986-01-17 | 1986-01-17 | アップダウンカウンタ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP847686A JPS62166617A (ja) | 1986-01-17 | 1986-01-17 | アップダウンカウンタ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62166617A JPS62166617A (ja) | 1987-07-23 |
| JPH047135B2 true JPH047135B2 (enExample) | 1992-02-10 |
Family
ID=11694167
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP847686A Granted JPS62166617A (ja) | 1986-01-17 | 1986-01-17 | アップダウンカウンタ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62166617A (enExample) |
-
1986
- 1986-01-17 JP JP847686A patent/JPS62166617A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62166617A (ja) | 1987-07-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4117476A (en) | Digital-to-analog converter | |
| US4331926A (en) | Programmable frequency divider | |
| JPH047135B2 (enExample) | ||
| US4581751A (en) | Reversible shift register | |
| WO1991011726A1 (en) | Binary counter with resolution doubling | |
| JPH0653818A (ja) | 多数ビットグレイコードカウンタ | |
| JPS61144122A (ja) | 高速プログラマブルカウンタ | |
| JPH01280924A (ja) | テスト機能を有する計数回路 | |
| JPS6037657B2 (ja) | Dpcm装置 | |
| US3862401A (en) | Multi-phase pulse counter | |
| JPH0227401A (ja) | オフセット制御回路 | |
| JPS60232716A (ja) | カウンタ回路 | |
| JPS6128423Y2 (enExample) | ||
| JPS594336Y2 (ja) | デジタル積分回路 | |
| JPS6235709A (ja) | デジタル回路 | |
| SU1171986A2 (ru) | Устройство дискретной регулировки уровн сигнала | |
| JPS62110323A (ja) | 周波数−ディジタル変換回路 | |
| KR920008048B1 (ko) | 복합로직게이트와 디플립플롭을 이용한 바이너리 업/다운 카운터 | |
| JPS6040041Y2 (ja) | 計数回路 | |
| JPS59210728A (ja) | パルス列発生回路 | |
| JPS61263319A (ja) | 計数回路 | |
| JPS5943013B2 (ja) | 非同期式可逆計数器 | |
| JPH04302528A (ja) | 半導体集積回路 | |
| JPS62152227A (ja) | コ−ド変換装置 | |
| JPS60127819A (ja) | バイナリ−カウンタ |