JPH0462851A - Manufacture of thin film semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an impurity retention film and a fused thin film semiconductor layer from being mixed in the state of fusion with each other on the interface between them, by projecting an optical energy on the surface of the impurity retention film formed on a thin film semiconductor layer, and by diffusing thermally an impurity from the impurity retention film to the thin film semiconductor layer, and further, by forming the region of introducing the impurity in a low concentration. CONSTITUTION:On the surface of a glass substrate 1, an amorphous silicon film layer 2 is formed, and a PSG of 5% in phosphorus concentration is applied thereto. Thereafter, performing a burning treatment, an impurity retention film 3 is laminated. Then, an excimer laser beam is projected on the surface of the impurity retention film 3, and the amorphous silicon layer 2 is fused instantaneously, and further, phosphorus atoms are diffused thermally from the impurity retention film 3 into the amorphous silicon layer 2. In this case, the impurity retention film 3 is not fused, so that the impurity retention film 3 and the fused amorphous silicon layer 2 are not mixed in the state of fusion with each other on the interface between them.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to thin film semiconductor devices used for driving various devices such as electroluminescent displays and liquid crystal displays, and particularly relates to thin film semiconductor devices used for driving various devices such as electroluminescent displays and liquid crystal displays. This relates to a method for manufacturing a thin film semiconductor device in which a thin film semiconductor layer into which a certain degree of impurity is introduced is used as an active layer.[Prior art] This type of thin film semiconductor device is shown in FIGS. 5 and 6. As shown, the crow substrate (a) and this crow substrate (a)
A gate electrode (G) provided above, a gate insulating film (+) covering each gate electrode (G), and a thin polysilicon layer (b) provided on this gate insulating film (b). C
), the source electrode (S) and the train electrode (D) connected to both ends of this polysilicon layer (C) constitute the main part of the "reverse staggered resin" or as shown in Figs. As shown in Figure 8, there is a glass substrate (a), a polycone layer (c) with a number of edges on the substrate (a), and a polycone layer (c) connected to both ends of the polycone layer (c). Source electrode CS) ・1・l,=I7 Electrode (D) and polysilicon layer (
C) A so-called "stacker type" in which the main part is constituted by a gate electrode (G) provided above is known.

In these thin film semiconductor devices, a 1.1 twin voltage (Vl) is applied between the source electrode (S) and the train electrode (D), and a predetermined gate voltage is applied to the gate electrode (G). By applying voltage (V6), a channel is formed in the polysilicon layer (C), which becomes an ON state and a train current (■,) flows, while the gate voltage (V6) is applied.
6) to below the threshold voltage Vroj, no channel will be formed in the polysilicon layer (C), the semiconductor device will be in the OFF state, and the train current (
This device prevents the flow of ID) and is used for driving the various devices mentioned above.

By the way, in this type of thin film semiconductor device, one of the factors that determines the threshold voltage V T 1.j mentioned above is the conductivity of the polysilicon layer (C) in the channel formation region, and this conductivity is This is due to the concentration of conductivity type impurities introduced into the polysilicon layer (c). By setting the impurity concentration as low as about 10" to 101017 ato/cnr, the above-mentioned "threshold voltage THj is controlled to a predetermined value.

Conventionally, an ion implantation method as described below has been used as a method for forming the above-mentioned region into which impurities are introduced at a low concentration in the polysilicon layer (C).

That is, as shown in FIG. 9(A), the glass substrate (a)
After forming a thin polysilicon layer (C) on top and implanting conductivity type impurities such as phosphorus, arsenic, and poron into this polysilicon layer (C) using an ion implantation device (Fig. 9). B), the conductive type impurity implanted by heat activation treatment is thermally diffused into a predetermined part of the polysilicon layer (C), and the polysilicon broken by the ion implantation is crystallized, and the polysilicon is broken down by the ion implantation. Low concentration introduction area as shown in C) (
d).

However, when trying to form a low concentration region (d) of approximately 1015 to 10" atoms/c in the polysilicon layer (c) using this ion implantation method, the areal density of ions during ion implantation must be 1010 to 1012 ions. /c
Secondly, it is necessary to set the ion implantation energy to a low condition of 30 KeV or less, which has the drawback that setting the latter implantation energy is difficult.

Therefore, in practice, as shown in FIG. 10, a thin film (e) of SiL called "screen oxide layer" is laminated on the polysilicon layer (C), and this thin film (e) is used as an interference film. A method of relaxing the above-mentioned implantation energy conditions was adopted.

[Problem to be solved by the invention]

However, when the low concentration implantation region is formed by such a method, the amount of implantation varies due to variations in the thickness of the thin film (e) stacked on the polysilicon layer (C).
Along with this, the concentration in the low concentration introduction area also varies, so
There was a problem that the threshold voltage VTHj could not be controlled reliably.

Note that instead of the above ion implantation method, it is also possible to apply, for example, the ``dopant film method'' used in semiconductor devices using single-crystal silicon substrates.

In other words, this method of forming a low concentration introduction region using a dopant film x?1 is as shown in FIG. , or B 2 H1, etc., on the polysilicon layer (c) by plasma irradiation.
To form a dopant film layer (f) such as (see Figure B), a furnace annealing process is performed to thermally diffuse phosphorus ions, etc., as shown in Figure 11 (C), and a polysilicon layer (
C) is a method of forming a low concentration introduction region.

However, in this formation method, 900°C-1000°C
Since a long time furnace annealing treatment is required at a high temperature of approximately 10°C, a large amount of ions are thermally diffused into the polysilicon layer (C), resulting in a reduction of 10" to 10" atoms/cn.
There was a disadvantage that the concentration could not be set as low as about r, and the above heating temperature condition far exceeded the heat resistance temperature of the glass substrate (a).

Therefore, the above heating conditions were changed to the heat resistant temperature of the glass substrate (a) (
There is a way to avoid this by setting the temperature below 600°C, but when setting the temperature below 600'C, the diffusion constant of the dopant film is more than 6 orders of magnitude smaller than that at 900°C to 1000°C. Therefore, there was a problem in that the heating time required for thermal diffusion became significantly longer.

Furthermore, from the viewpoint of preventing thermal deterioration of the glass substrate (a) described in -, it is possible to consider a method of using laser annealing treatment suitable for local heating instead of furnace annealing treatment, and if this method is adopted, dopant film and polysilicon layer (
Since C) dissolves into each other, there is a problem that the concentration cannot be controlled, and in any case, the above-mentioned "dopant film method" cannot be practically applied.

[Means to solve the problem]

The present invention has been made in view of the above-mentioned problems, and its object is to form a low-concentration introduced region with a uniform concentration in a thin film semiconductor layer such as a polysilicon layer. ``An object of this invention is to provide a method for manufacturing a thin film semiconductor device in which threshold voltage VTHII etc. can be set reliably.

That is, the present invention provides a thin film semiconductor comprising: an insulating substrate; a thin film semiconductor layer provided on the substrate and forming an active layer; and a low concentration region formed by a conductivity type impurity introduced into the thin film semiconductor layer. The method for manufacturing the device is based on a lamination process in which a heat-resistant impurity-retaining film that retains conductive type impurities is laminated on the formed thin film semiconductor layer, and the surface of this impurity-retaining film is irradiated with light energy to retain the impurities. A light energy irradiation step of thermally diffusing impurities from the film to the thin film semiconductor layer to form the low concentration introduction region.

In such technical means, glass plates, quartz plates, etc. can be used as materials constituting the insulating substrate, and
As the thin film semiconductor layer provided on this insulating substrate, 3
Amorphous silicon or polysilicon having a thickness of several thousand holes into which valent or pentavalent atoms are introduced can be used.

Furthermore, when the present invention is applied to an n-type thin film semiconductor device, a heat-resistant material that retains pentavalent atoms such as phosphorus, antimony, and arsenic is used as the heat-resistant impurity retaining film that retains the conductive impurities. However, when applied to p-type thin film semiconductor devices, aluminum, gallium,
Heat-resistant materials that retain trivalent atoms such as boron and indium can be used.

By appropriately adjusting the impurity concentration in the impurity retaining film, the amount of impurity thermally diffused into the thin film semiconductor layer can be controlled, and the concentration of the low concentration introduction region can be adjusted. Furthermore, when the surface of this impurity-retaining film is irradiated with light energy,
Since the impurity retention film is made of a heat-resistant material, they do not melt into each other at the interface with a thin film semiconductor layer such as a melted polysilicon layer, and moreover, thermal energy is transferred to conductive impurities through the impurity retention film. is supplied, it is also possible to control the level of thermal diffusion compared to the case where thermal energy is directly supplied to the conductive impurity.

After thermally diffusing the conductive impurities, the impurity retaining film is removed from the thin film semiconductor layer by appropriate etching means.

Hereinafter, specific materials and their lamination method will be explained.

"N-type thin film semiconductor device" Silicon film containing 05 valent atoms ■Si:P...+V CVD method or low pressure CVD method using a mixed gas of SiH+ and PH, PH3 and Ar
Sputter link method of silicon in atmosphere.

■Si:Sb, Si:As -3b or As 1.
- Sputtering method of sputtered Si, 5iHi and AsH
+ or plasma CVD method using a mixed gas of S+H+ and SbH3.

◎S+L film containing phosphorus (PSG)・Normal pressure CV using a mixed gas of S+H+, PH, and 02
D method, low pressure CVD method, or plasma CVD method, and O・
, 5OG (coating and firing oxide film) coating method.

◎Silicon nitride film (SiN) containing phosphorus Sill+
Plasma CVD using a mixed gas of NH3 and Pll
Law.

◎Plasma CVD method using a mixture of silicon carbide (SiC)/S iH+ containing phosphorus, C114, and PH.

``P-type thin film semiconductor device A 0 Plasma CVD method using a mixed gas of silicon film containing trivalent atoms ■Si・AI...S+Ht and trimethylaluminum (TMA), which is an organometallic gas.

■Si・B...5iHt, B, and plasma CVD method using a mixed gas of H5.

■Si: A plasma CVD method using a mixed gas of Ga...S+H+ and trimethylpotassium (TMG), an organometallic gas.

■Si: In... A plasma CVD method using a mixed gas of S + t(+ and trimethylindium (TMI), an organometallic gas.

◎5102 film containing boron (BSG)・SiH+ and B
Plasma CVD method using a mixed gas of r 05 and 02, plasma CVD method using a mixed gas of 5iHi, B 2H, N, and O.

◎Silicon nitride film (SiN) containing holons
A plasma CVD method using a mixed gas of *, NH+, and B2H.

◎Silicon carbide film (SiC) containing holons: S+Hi
Plasma CV using mixed scum of , CH, and B2Hi
D method.

Next, as a light source in the above light energy irradiation step,
The thin film semiconductor layer is melted by thermal energy irradiated from these light sources without melting the impurity retaining film,
Any device can be used as long as it can thermally diffuse impurities from the impurity holding film into the melted thin film semiconductor layer, such as ion lasers such as Ar+ and Kr+, gas lasers such as CD2, ArF, XeC1, etc. An excimer laser such as KrF can be used.

By applying a light energy method suitable for local heating compared to furnace annealing, thermal deterioration of insulating substrates such as glass plates can be prevented.Furthermore, by appropriately adjusting the power and irradiation time of the light source, thin film The amount and diffusion distance of impurities thermally diffused into the semiconductor layer can be controlled, and the concentration of the low concentration introduction region can be adjusted.

Incidentally, to explain the case where a 1000-layer polysilicon layer is used as a thin film semiconductor layer, a PSG film is used as a heat-resistant impurity retaining film, and a XeCl excimer laser is applied as a light source, the above laser will be irradiated. The polysilicon layer melts and P flows into the polysilicon layer.
Phosphorus is thermally diffused from the SG film. At this time, the diffusion constant of phosphorus, which is an impurity, is D = 10-'ci/sec
heating time (τ) - several tens of ns (10
When the molten state of the polysilicon layer is maintained under the condition of "5ec), the amount of phosphorus diffused S(α) is determined by (CD・τ), and a = f (10'XIO') = ((10 ”
') cl=IQ-6cm=1.00 people.

Therefore, phosphorus, which is an impurity, can be thermally diffused to a desired region within the polysilicon layer by several pulse irradiations, and the concentration of the low concentration introduction region can be adjusted with high precision.

In addition to the above-mentioned channel formation region, the region of the low concentration introduction region formed in the thin film semiconductor layer is LDD (L
There is a low concentration region in a thin film semiconductor device having an extremely doped drain structure.

[Effect]

According to the above-mentioned technical means, a lamination process of laminating a heat-resistant impurity retention film that retains conductive type impurities on the formed thin film semiconductor layer, and irradiation of light energy to the surface of this impurity retention film are performed. , a light energy irradiation step of thermally diffusing impurities from the impurity retention film to the thin film semiconductor layer to form the low concentration introduced region, and when the light energy is irradiated onto the surface of the heat-resistant impurity retention film. , the impurity retention film and the melted thin film semiconductor layer do not melt into each other at the interface, and moreover, thermal energy is supplied to the conductive impurities via the impurity retention film, so heat is directly applied to the conductive impurities. Compared to the case where energy is supplied, it is possible to control the level of heat diffusion, and by applying a light energy means suitable for local heating, it is possible to prevent thermal deterioration of the insulating substrate. While it is possible to control the amount of thermal diffusion of impurities into the thin film semiconductor layer by appropriately adjusting the conductivity type impurity concentration in the holding film, it is also possible to control the amount of impurities thermally diffused into the thin film semiconductor layer by appropriately adjusting the power and irradiation time of the light source. It is possible to control the diffusion amount and diffusion distance of the impurity to be thermally diffused, and it becomes possible to adjust the concentration of the low concentration introduction region formed in the thin film semiconductor layer with high precision.

〔Example〕

Hereinafter, the present invention will be explained using the "stacker type A" shown in FIGS. 1 and 2.
An embodiment applied to a MOS l-run transistor will be described in detail with reference to the drawings.

First, as shown in Fig. 3 (A), the glass substrate (product name Corning 7059) (], ) surface was heated at 550°C.
An amorphous silicon layer (2) with a thickness of 1000 μm was formed by low-pressure CVD using mono SiH under conditions of 10.3 Torr, and the phosphorus concentration was increased on this surface by 5OG (coating and firing oxide film) method. After coating 5% PSG, it was fired at 350°C and the resulting material was shown in Figure 3 (B).
An impurity retaining film (3) with a thickness of 1000 ml is laminated as shown in FIG.

Next, as shown in FIG. 3(C), the surface of the impurity retaining film (3) is exposed to an energy density of 100 to too much in the atmosphere using a XeC excimer laser with a wavelength of 308 nm.

1 at a repetition frequency of 50 Hz under the conditions of mJ/c
The amorphous silicon layer (
2) is instantly melted, and the impurity retaining film (3)
The phosphorus atoms are then thermally diffused into the amorphous silicon layer (2).

In this case, a heat-resistant PSG impurity retention film (
3) does not melt, so the impurity retaining film (3) and the melted amorphous silicon layer (2) do not melt into each other at the interface, and the impurity retaining film (3)
Since thermal energy is supplied to the phosphorus atoms, which are impurities, through 5102 within the pores, there is an advantage that the level of thermal diffusion can be adjusted since excessive energy is not supplied.

Therefore, the above excimer laser irradiation treatment creates a concentration of 10 in the channel formation region in the amorphous silicon layer (2).
A low concentration region (21) of about 15 to 10" atoms/c can be formed with high precision (see Fig. 3C), and the crystallization of the amorphous silicon layer (2) and phosphorus atoms can be easily formed. Activation can be performed at the same time, and thermal deterioration of the glass substrate (1) can also be prevented by applying an excimer laser suitable for local heating.

Next, the crystallized amorphous silicon layer (2)
That is, after removing the impurity retaining film (3) from the polysilicon layer by etching using buffered hydrofluoric acid (see the third diagram), the amorphous silicon layer (2) is removed.
) A photoresist layer (r) is formed at a predetermined location on the photoresist layer (r) as shown in FIG. 3(E), and the amorphous silicon layer (2) exposed from the photoresist layer (r) is removed by dry etching. 3C), and on this surface, a gate insulating film with a thickness of 1000 mm is formed using low pressure CVD method.
At the same time as forming an I02 film (4), a polysilicon film (5) for forming a gate electrode is subsequently formed on the surface of the SiO3 film (4) using the same low-pressure CVD method, and then this polysilicon film ( 5) A photoresist layer (r) is formed at the gate electrode formation site (see FIG. 3C).

Then, the polysilicon film (5) exposed from the photoresist layer (r) is removed by dry etching to form a gate electrode (G), and the lower 5
The I02 film (4) is also removed by dry etching (
(See Figure 3C).

Next, as shown in FIG. 3(1), the second gate electrode (
By implanting p+ ions using G) as a mask, the source electrode (S) and drain electrode (D) are self-aligned to the gate electrode (G) as shown in Figure 3 (J). An amorphous silicon layer (2
) was subjected to activation treatment with p' ions implanted into the inside. still,
This laser irradiation condition is 500 to 1.000 m, 1
1 to 10 pulses at an energy density of /ci were sufficient.

Furthermore, 7000 nitride (SiN) was deposited on the surface where the source electrode (S) and drain electrode (D) were formed by plasma CVD to form a film as shown in Figure 3 (K). Form a passivation film (6) and
The above polysilicon film (
After hydrogenating 5), a contact hole (61
) to (63), and wiring metals (71) to (73) made of Al-3i alloy are installed, as shown in Figures 1 to 2, and Figure 3 (L). An n-type MOS transistor as shown in FIG. 1 was obtained.

According to the manufacturing method according to this embodiment, a concentration of 10'' to 10'' a, toms/ Since the low concentration introduction region (21) of about clT1 can be reliably formed with high precision, it has the advantage of being able to stably manufacture a large number of MOS transistors with uniform operating characteristics such as the threshold voltage V1uj mentioned above. There is.

In this example, the present invention is applied to the channel forming region of the thin film semiconductor layer, but as shown in FIG.
It is also possible to apply the present invention to a low concentration region (22) in a thin film semiconductor device having a DD (1, tightly doped drain) structure.

〔Effect of the invention〕

According to the present invention, when the surface of the heat-resistant impurity-retaining film is irradiated with light energy, the impurity-retaining film and the melted thin film semiconductor layer do not melt into each other at the interface; Since thermal energy is supplied to the conductive impurities via By applying light energy means, it is possible to prevent thermal deterioration of the insulating substrate, and furthermore, by appropriately adjusting the concentration of conductive type impurities in the impurity holding film, the amount of impurities thermally diffused into the thin film semiconductor layer can be controlled. On the other hand, by appropriately adjusting the power and irradiation time of the light source, it is possible to control the amount and diffusion distance of the impurity that is thermally diffused into the thin film semiconductor layer, allowing for low concentration introduction to be formed in the thin film semiconductor layer with high precision. It becomes possible to adjust the density of the area.

Therefore, it is possible to stably manufacture thin film semiconductor devices with uniform operating characteristics such as threshold voltage VTHj.

[Brief explanation of drawings]

1 to 4 show embodiments of the present invention, in which FIG. 1 is a schematic perspective view of a MOS transistor according to the embodiment, FIG. 2 is a sectional view taken along the nn plane of FIG. Figures (A) to (L)
4 is a manufacturing process diagram of the MOS transistor according to the example.
The figures each show a cross-sectional view of the structure of a thin film semiconductor device with an LDD structure, and FIG. VI
7 is a schematic perspective view of a conventional "stagger type J thin film semiconductor device; FIG. 8 is a sectional view taken along the line ■-■ of FIG. 7;
9(A)-(C) and FIG. 10 are process diagrams showing a part of the manufacturing process of a conventional thin film semiconductor device, and FIG. 11(A)
- (C) are process explanatory diagrams assuming the case where the "dopant film J method is applied. [Explanation of symbols] (1)...Glass substrate (2)...Amorphous silicon layer (3)... Impurity retention film (21)...Low concentration introduction area patent Applicant: Fuji Xerox Co., Ltd. Agent
Patent Attorney Tomohiro Nakamura (2 others) Figure 10 Figure 11

Claims (1)

[Claims] A thin film comprising: an insulating substrate; a thin film semiconductor layer provided on the substrate and forming an active layer; and a low concentration region formed by conductivity type impurities introduced into the thin film semiconductor layer. A method for manufacturing a semiconductor device includes a lamination step of laminating a heat-resistant impurity-retaining film that retains conductivity-type impurities on a formed thin film semiconductor layer, and a step of laminating the impurity-retaining film by irradiating the surface of the impurity-retaining film with light energy. A method of manufacturing a thin film semiconductor device, comprising: a light energy irradiation step of thermally diffusing impurities from the thin film semiconductor layer into the thin film semiconductor layer to form the low concentration introduction region.