JPH0449722Y2 - - Google Patents

Info

Publication number
JPH0449722Y2
JPH0449722Y2 JP7335987U JP7335987U JPH0449722Y2 JP H0449722 Y2 JPH0449722 Y2 JP H0449722Y2 JP 7335987 U JP7335987 U JP 7335987U JP 7335987 U JP7335987 U JP 7335987U JP H0449722 Y2 JPH0449722 Y2 JP H0449722Y2
Authority
JP
Japan
Prior art keywords
address
signal
peripheral device
time
address output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7335987U
Other languages
English (en)
Japanese (ja)
Other versions
JPS63181198U (enrdf_load_html_response
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7335987U priority Critical patent/JPH0449722Y2/ja
Publication of JPS63181198U publication Critical patent/JPS63181198U/ja
Application granted granted Critical
Publication of JPH0449722Y2 publication Critical patent/JPH0449722Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Microcomputers (AREA)
JP7335987U 1987-05-15 1987-05-15 Expired JPH0449722Y2 (enrdf_load_html_response)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7335987U JPH0449722Y2 (enrdf_load_html_response) 1987-05-15 1987-05-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7335987U JPH0449722Y2 (enrdf_load_html_response) 1987-05-15 1987-05-15

Publications (2)

Publication Number Publication Date
JPS63181198U JPS63181198U (enrdf_load_html_response) 1988-11-22
JPH0449722Y2 true JPH0449722Y2 (enrdf_load_html_response) 1992-11-24

Family

ID=30917623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7335987U Expired JPH0449722Y2 (enrdf_load_html_response) 1987-05-15 1987-05-15

Country Status (1)

Country Link
JP (1) JPH0449722Y2 (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPS63181198U (enrdf_load_html_response) 1988-11-22

Similar Documents

Publication Publication Date Title
US5317709A (en) Microcomputer including memory controller for DRAM
US5287486A (en) DMA controller using a programmable timer, a transfer counter and an or logic gate to control data transfer interrupts
US5572468A (en) Storage reading apparatus
CA2072046C (en) Semiconductor memory device
US5732284A (en) Direct memory access (DMA) controller utilizing a delayed column address strobe (CAS) signal
JPH0449722Y2 (enrdf_load_html_response)
US6789174B2 (en) Memory access device allowing simultaneous access
US5539916A (en) DMA control for continuing transfer to input/output device in a cycle steal mode
US5297100A (en) Address control system for a RAM in a digital audio set
JPS62174844A (ja) メモリ優先切替方式
JPS58218230A (ja) 遅延時間選定回路
JPH0487096A (ja) ダイナミックｒａｍ制御装置
JPH03122893A (ja) Ｄｒａｍリフレッシュ装置
KR900005452B1 (ko) 마이크로 프로세서의 데이터 처리속도를 개선한 회로
JPS62249263A (ja) ダイレクトメモリアクセスコントロ−ラ
JPH01265351A (ja) Ｍｐｕシステム
JPS61264463A (ja) バス制御方式
JPS63196984A (ja) 画像デ−タ転送回路
JPS61180342U (enrdf_load_html_response)
JPS6341966A (ja) 直接メモリアクセス転送装置
JPH07210496A (ja) データ転送装置
JPS59142658A (ja) 共有メモリ−制御方式
JPS6258000U (enrdf_load_html_response)
JPS62171053A (ja) 高速メモリ装置
JPS6097461A (ja) デ−タバス制御回路