JPH0448641A - Compound semiconductor device - Google Patents

Abstract

PURPOSE:To realize a FET of its thermal characteristic being stable and its source resistance being uniform, by providing sulfide layers comprising gallium sulfide and/or arsenic sulfide on at least partial regions of the surfaces of a compound semiconductor substrate between a source and gate electrode and between the gate and a drain electrode. CONSTITUTION:Sulfide layers 9 comprising gallium sulfide and arsenic sulfide are formed between a source and gate electrode 5, 8 and between the gate and a drain electrode 8, 6. An insulation film 10 (an SiN film for protecting a surface) is formed thereon. These sulfide layers 9 can be formed simply by applying ammonium sulfide to the GaAs substrate 1 or dipping the GaAs substrate 1 into the aqueous solution of ammonium sulfide prior to forming the insulation film 10. Thereafter, by cleaning the GaAs substrate l with flowing water, excessive ammonium sulfide is removable, and the sulfide layers 9 comprising gallium sulfide and arcenic sulfide of monoatomic layer can be formed on the surface of the GaAs substrate 1. These sulfide layers 9 are very stable thermally and are very stable for oxidizing too.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial application field The present invention relates to a compound semiconductor device.
A s field effect type Toratsunostar (MESFET),
GaAs IC, GaAs/AIGaAS type and In
HiEhElec such as G2LAs/AI InAs type
Tron Mobility Transistor
(HE M T ), and even InGaAsMESFE
The present invention relates to the element structure of a compound semiconductor element such as T.

(b) Conventional technology Taking the GaAs MESFET, which has the most established manufacturing technology among compound semiconductor devices, as an example, in order to improve the mutual conductance (Cam), which largely controls the device characteristics, it is necessary to shorten the gate length and The channel layer is being made thinner and more concentrated.

This highly concentrated thin active layer has a thickness of only a few hundred layers, and therefore its transnostar characteristics are extremely unaffected by changes in the surface condition of the GaAs substrate, the orientation of the gate electrode, the stress applied to the GaAs substrate, etc. It's noon.

Normally, an insulating film of Noricon oxide film or NoriFun nitride film with a thickness of several hundred to several thousand layers is used as a surface protection film on the element surface, especially in the vicinity of the gate electrode, to improve stable operation and reliability of the element. These insulating films: Usually, Chemical Vapor Deposit
o-mouth (CVD) or Plasma Enhance
effective Chemical Vapor De
It is formed on a GaAs substrate using an insulating film forming technique such as position (PCVD).

However, as shown in FIG. 4, before these insulating films are formed, the semi-insulating GaAs substrate 1 is exposed to the atmosphere, and the surface of the GaAs substrate 1, including the vicinity of the gate electrode 8, has n-type A G2LAs surface oxide layer 11 having a thickness of at least several dozen layers is formed through the impurity injection layer 2 and the high concentration n-type impurity injection layer 3, and the base plate 1 is covered with a surface protection SiN film 10. There is.

(c) Problem to be solved by the invention The surface oxidized layer of GaAs [l is the main component of GatO]
i, As+O*, and the state of the surface oxidation layer is:
The time and number of times the GaAs substrate 1 is exposed to the atmosphere,
This is determined by the environment, temperature, etc. at that time.

In general, the surface depletion layer thickness of a Gp-As substrate is determined by the thickness of the surface oxide layer, whether the main component of the surface is Ga or Os,
Current GaAs depends greatly on surface conditions such as tO3, and the substrate surface is exposed to the atmosphere many times.
In the MESFET manufacturing process, it is difficult to control the state of such surface oxidized layer 11.

Surface protection S is an insulating film as shown in Figure 4.
Even in the case where it is protected by the iN film 10, the main components of the oxide film are Ga, 0. Even after being covered with an insulating film, the G2LAs substrate is It is difficult to maintain a constant surface condition. Moreover, such changes in the surface state of the GaAs substrate result in changes in the surface depletion layer on the active layer, causing variations in FET characteristics at each step in the manufacturing process and unstable operation before and after heat treatment. .

(d) Means and operation for solving the problem This invention includes:
A north drain electrode, which is formed on a compound semiconductor substrate and faces the semiconductor substrate at an ohmic junction, and a gate electrode, which faces the compound semiconductor substrate at a 7-way junction, In a compound semiconductor device whose operating principle is to control the source/drain current by a voltage applied between the source and gate electrodes, the compound semiconductor substrate is used between the source and gate electrodes and between the gate and train electrodes. A sulfide layer made of gallium sulfide and/or arsenic sulfide is provided on at least a portion of the surface.

In other words, the present invention provides the
By forming a sulfide layer on the G2LAs surface in at least a partial region between the gates, the GaAs surface is protected from oxidation, and an FET with stable thermal characteristics and uniform source resistance can be realized.

Specifically, Fig. 1.2 shows a compound semiconductor device (G
2LAsMESFET) is shown.

In the semiconductor device shown in FIG. 1.2, the source gate is formed by a sulfide layer made of gallium sulfide and arsenic fluid on the surface of the semi-insulating GaAs substrate 1 between the electrodes 5 and 8 and between the gate and drain electrodes 8 and 6. 9 is formed, and an insulating film (SiN film for surface protection) 10 is formed thereon.

GaAs base 1i1 is formed on these sulfide layered insulating film formation areas.
ammonium sulfide (NH,)2S or G
ammonium sulfide (NH4), S
It can be easily formed by immersing it in an aqueous solution.

At that time, a GaAs surface oxide film (G a y O) on the surface of the GaAs substrate, AS! 03) are gallium sulfide and arsenic ml, respectively, due to the strong reducing power of ammonium sulfide.
It will be replaced by a monster. This is the 21
st Conference on 5olid
5tate Devices and Ma
Reals, 1989. pp, 337-340
It is explained in the following.

After that, excess ammonium sulfide (NH4) tS can be removed by washing the GaAs substrate l with running water, and G
It becomes possible to form a monoatomic layer of sulfide layer 9 made of gallium sulfide and arsenic sulfide on the surface of the aAs substrate 1.

These sulfide layers 9 are very stable thermally and also very stable against oxidation. Therefore, G
Characteristic stability of aAsMESF'ET increases. Furthermore, since the series resistance between the source and gate of the transistor is stabilized, the input impedance can be made uniform.

(e) Example As an example of the present invention, as described above, an ion-implanted G2LA with a monoatomic layer of sulfide on the surface of the G1As substrate between the source and gate electrodes and between the gate and drain electrodes is used.
Taking MESFET as an example, its manufacturing process will be explained in detail with reference to FIG.

First, a semi-insulating GaAs substrate 1 is doped with an n-type impurity such as Si using a normal photoetching technique to form an n-type GaAs layer (hereinafter simply referred to as n-layer) 2 and a highly doped n-type GλAs layer ( An injection mask for forming 3 (hereinafter simply referred to as an n layer) is formed, and injection layers as shown in FIG. 3(a), that is, an 0 layer 2 and an n' layer 3 are formed.

The implantation conditions at this time are n-layer, 30KV, 5x l O”
70 m”, n” layer 80 KV, 5 X l O”
/cta'.

At the same time, since the GaAs substrate 1 is exposed to the atmosphere,
Gates are applied to the entire surface through injection layers 2 and 3.
, a GtAs surface oxide film 11 of AstOs is formed.

Thereafter, a SiN film (thickness: 300) 4 for annealing as shown in FIG. 3(b) is placed on the entire surface of the GaAs substrate 11.
Formed through the surface oxide film 11, and heated at 900 degrees in that state.
Perform annealing for 10 seconds.

Thereafter, the SiN film 4 for annealing is removed, and then a third
A source electrode 5 and a drain electrode 6 as shown in Figure (c) are formed.

After that, a resist pattern 7 as shown in FIG.
Ti(to) is formed using this as a mask.

3,000 people) and Au (3,000 people) were deposited using an electron beam evaporator, and lift-off was performed using an organic solvent.
A gate electrode 8 as shown in e) is obtained. In this state,
A surface oxide film 11 having a thickness of several tens of layers is formed on the surface of the substrate 1.

Thereafter, the entire GaAs substrate was immersed in a 5% aqueous solution of (NH,)ts for 3 minutes, and then washed with running water for 10 minutes.
A sulfide layer 9 made of gallium sulfide and arsenic sulfide as shown in Figure (f) is obtained.

Thereafter, a SiN film (thickness 2000mm) 10 was formed as a surface protection film, and a GaAsMESF film as shown in FIG.
Get ET.

Although GaAs MESFET was used in this example, the present invention also uses GaAs HEMT, InGa As H
The same effect can be applied to elements such as EMT.

(F) Effects of the Invention A sulfide layer made of gallium sulfide and/or arsenic sulfide, which is thermally stable and extremely stable against oxidation, as in the present invention, is formed on the surface of a GaAs substrate. This has the effect of making it possible to reduce variations in transistor characteristics as the manufacturing process progresses, and to make the characteristics themselves (particularly the human impedance) uniform.

[Brief explanation of the drawing]

Figures 1 and 2 are a configuration explanatory diagram and a perspective view showing one embodiment of the present invention, Figure 3 is a manufacturing process diagram showing each step of the above embodiment, and Figure 4 is the vicinity of the gate electrode of a conventional GaAs MESFET. FIG. 1. Semi-insulating GaAs substrate, 2 °nGaAs layer, 3-n'GaAs layer, 4. SiN film for annealing, 5. Source electrode, 6. Train electrode, 7.
...Gate electrode formation phase resist pattern, 8.Gate electrode, 9-.Sulfide layer consisting of gallium sulfide and arsenic sulfide, 10..SiN film for surface protection, ! ■...GaAs surface oxide film. Figure 2

Claims (1)

[Claims] 1. Source and drain electrodes formed on a compound semiconductor substrate and facing the semiconductor substrate through an ohmic junction, and a gate electrode facing the compound semiconductor substrate through a Schottky junction. In a compound semiconductor device whose operating principle is to control the source-drain current by a voltage applied between the source and gate electrodes, at least the surface of the compound semiconductor substrate between the source and gate electrodes and between the gate and drain electrodes is A compound semiconductor device characterized by having a sulfide layer made of gallium sulfide and/or arsenic sulfide in some regions.