JPH044786U - - Google Patents
Info
- Publication number
- JPH044786U JPH044786U JP4429290U JP4429290U JPH044786U JP H044786 U JPH044786 U JP H044786U JP 4429290 U JP4429290 U JP 4429290U JP 4429290 U JP4429290 U JP 4429290U JP H044786 U JPH044786 U JP H044786U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- integrated circuit
- hole
- case material
- conductive sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 7
- 239000004020 conductor Substances 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
Landscapes
- Casings For Electric Apparatus (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第1図は本考案の実施例を示す断面図、第2図
は導電性シートを示す斜視図、第3図、第4図お
よび第5図は従来例を示す断面図である。
1は集積回路基板、2は導電路、3は回路素子
、4はケース材、5は孔、6は導電性シート、7
は半導体素子である。
FIG. 1 is a sectional view showing an embodiment of the present invention, FIG. 2 is a perspective view showing a conductive sheet, and FIGS. 3, 4, and 5 are sectional views showing a conventional example. 1 is an integrated circuit board, 2 is a conductive path, 3 is a circuit element, 4 is a case material, 5 is a hole, 6 is a conductive sheet, 7
is a semiconductor element.
Claims (1)
子および樹脂封止型半導体素子と 前記基板と一体化されるケース材とを具備し、 前記ケース材の所望位置に孔を設け、その孔で
露出した前記基板上に導電性シートを介して前記
半導体素子を搭載し、前記孔の一周端辺にその孔
を封止する蓋体の一端部を嵌入させ他端部をケー
ス材にネジ固定したことを特徴とする混成集積回
路。 (2) 前記回路素子は前記基板と前記ケース材と
で形成された封止空間に封止されることを特徴と
する請求項1記載の混成集積回路。 (3) 前記導電性シートが配置される前記基板上
には複数の導電路が延在されたことを特徴とする
請求項1記載の混成集積回路。 (4) 前記導電性シートは絶縁性シートで形成さ
れ、その両面から多数の線状導体が突出されるこ
とを特徴とする請求項1記載の混成集積回路。[Claims for Utility Model Registration] (1) An integrated circuit board, a conductive path of a desired shape formed on the substrate, and a plurality of circuit elements and resin-sealed semiconductor elements connected to the conductive path on the substrate. a case material that is integrated with the substrate, a hole is provided at a desired position in the case material, the semiconductor element is mounted on the substrate exposed through the hole via a conductive sheet, and the semiconductor element is mounted on the substrate exposed through the hole; A hybrid integrated circuit characterized in that one end of a lid for sealing a hole is fitted into one peripheral edge, and the other end is fixed to a case material with screws. (2) The hybrid integrated circuit according to claim 1, wherein the circuit element is sealed in a sealed space formed by the substrate and the case material. (3) The hybrid integrated circuit according to claim 1, wherein a plurality of conductive paths extend on the substrate on which the conductive sheet is disposed. (4) The hybrid integrated circuit according to claim 1, wherein the conductive sheet is formed of an insulating sheet, and a large number of linear conductors protrude from both surfaces of the conductive sheet.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990044292U JPH0717167Y2 (en) | 1990-04-25 | 1990-04-25 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990044292U JPH0717167Y2 (en) | 1990-04-25 | 1990-04-25 | Hybrid integrated circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH044786U true JPH044786U (en) | 1992-01-16 |
JPH0717167Y2 JPH0717167Y2 (en) | 1995-04-19 |
Family
ID=31557459
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990044292U Expired - Lifetime JPH0717167Y2 (en) | 1990-04-25 | 1990-04-25 | Hybrid integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0717167Y2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59186061A (en) * | 1983-04-07 | 1984-10-22 | Casio Comput Co Ltd | Small-sized electronic device |
JPS63100889U (en) * | 1986-12-19 | 1988-06-30 |
-
1990
- 1990-04-25 JP JP1990044292U patent/JPH0717167Y2/en not_active Expired - Lifetime
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59186061A (en) * | 1983-04-07 | 1984-10-22 | Casio Comput Co Ltd | Small-sized electronic device |
JPS63100889U (en) * | 1986-12-19 | 1988-06-30 |
Also Published As
Publication number | Publication date |
---|---|
JPH0717167Y2 (en) | 1995-04-19 |