JPH0447848B2 - - Google Patents
Info
- Publication number
- JPH0447848B2 JPH0447848B2 JP58153289A JP15328983A JPH0447848B2 JP H0447848 B2 JPH0447848 B2 JP H0447848B2 JP 58153289 A JP58153289 A JP 58153289A JP 15328983 A JP15328983 A JP 15328983A JP H0447848 B2 JPH0447848 B2 JP H0447848B2
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- data
- operand
- circuit
- arithmetic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Executing Machine-Instructions (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58153289A JPS6045844A (ja) | 1983-08-24 | 1983-08-24 | 演算装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58153289A JPS6045844A (ja) | 1983-08-24 | 1983-08-24 | 演算装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6045844A JPS6045844A (ja) | 1985-03-12 |
| JPH0447848B2 true JPH0447848B2 (cs) | 1992-08-05 |
Family
ID=15559220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58153289A Granted JPS6045844A (ja) | 1983-08-24 | 1983-08-24 | 演算装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6045844A (cs) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07120266B2 (ja) * | 1987-09-29 | 1995-12-20 | 日本電気株式会社 | 例外処理装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5979350A (ja) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | 浮動小数点演算装置 |
-
1983
- 1983-08-24 JP JP58153289A patent/JPS6045844A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6045844A (ja) | 1985-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4941120A (en) | Floating point normalization and rounding prediction circuit | |
| JP3178746B2 (ja) | 浮動小数点数のためのフォーマット変換装置 | |
| JP3313560B2 (ja) | 浮動小数点演算処理装置 | |
| US6029243A (en) | Floating-point processor with operand-format precision greater than execution precision | |
| JPH09146924A (ja) | 演算方法、演算装置及びマイクロプロセッサ | |
| JPH01302425A (ja) | 浮動小数点加減算回路 | |
| JPH0447848B2 (cs) | ||
| JPH0540605A (ja) | 浮動小数点乗算装置 | |
| JPH0283728A (ja) | 浮動小数点乗算装置 | |
| JPS63158626A (ja) | 演算処理装置 | |
| JPH0251732A (ja) | 浮動小数点演算器 | |
| JP2856792B2 (ja) | 浮動小数点数演算装置 | |
| JPH0361224B2 (cs) | ||
| JPH0383126A (ja) | 浮動小数点乗算器 | |
| JPH0225924A (ja) | 浮動小数点演算処理装置 | |
| JPH04132538U (ja) | 浮動小数点演算回路 | |
| JPH01282633A (ja) | 非正規化数の処理方式 | |
| JP2801472B2 (ja) | 浮動小数点演算装置 | |
| JP3124286B2 (ja) | 浮動小数点数演算装置 | |
| JP4428778B2 (ja) | 演算装置及び演算方法並びに計算装置 | |
| JPH0552532B2 (cs) | ||
| JPH0323937B2 (cs) | ||
| JPS5960637A (ja) | 浮動小数点演算装置 | |
| JPS6149234A (ja) | 浮動小数点乗算回路 | |
| JPH05204606A (ja) | 浮動小数点演算方式および装置 |