JPH0447760U - - Google Patents
Info
- Publication number
- JPH0447760U JPH0447760U JP8993590U JP8993590U JPH0447760U JP H0447760 U JPH0447760 U JP H0447760U JP 8993590 U JP8993590 U JP 8993590U JP 8993590 U JP8993590 U JP 8993590U JP H0447760 U JPH0447760 U JP H0447760U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- control
- circuit
- signal
- dma controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8993590U JPH0447760U (en:Method) | 1990-08-28 | 1990-08-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8993590U JPH0447760U (en:Method) | 1990-08-28 | 1990-08-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0447760U true JPH0447760U (en:Method) | 1992-04-23 |
Family
ID=31824274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8993590U Pending JPH0447760U (en:Method) | 1990-08-28 | 1990-08-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0447760U (en:Method) |
-
1990
- 1990-08-28 JP JP8993590U patent/JPH0447760U/ja active Pending
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