JPH0443302B2 - - Google Patents
Info
- Publication number
- JPH0443302B2 JPH0443302B2 JP59030662A JP3066284A JPH0443302B2 JP H0443302 B2 JPH0443302 B2 JP H0443302B2 JP 59030662 A JP59030662 A JP 59030662A JP 3066284 A JP3066284 A JP 3066284A JP H0443302 B2 JPH0443302 B2 JP H0443302B2
- Authority
- JP
- Japan
- Prior art keywords
- interrupt
- priority
- signal
- logic
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Bus Control (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3066284A JPS60175149A (ja) | 1984-02-21 | 1984-02-21 | 割込み制御装置 |
| DE8484304947T DE3472177D1 (en) | 1983-07-19 | 1984-07-19 | Apparatus for controlling a plurality of interruption processings |
| US06/632,190 US4807117A (en) | 1983-07-19 | 1984-07-19 | Interruption control apparatus |
| EP84304947A EP0132161B1 (en) | 1983-07-19 | 1984-07-19 | Apparatus for controlling a plurality of interruption processings |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3066284A JPS60175149A (ja) | 1984-02-21 | 1984-02-21 | 割込み制御装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60175149A JPS60175149A (ja) | 1985-09-09 |
| JPH0443302B2 true JPH0443302B2 (enrdf_load_html_response) | 1992-07-16 |
Family
ID=12309956
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3066284A Granted JPS60175149A (ja) | 1983-07-19 | 1984-02-21 | 割込み制御装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60175149A (enrdf_load_html_response) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0789323B2 (ja) * | 1985-12-20 | 1995-09-27 | 日本電気株式会社 | 多重割込制御方式 |
| JP2643609B2 (ja) * | 1990-01-29 | 1997-08-20 | 日本電気株式会社 | 割り込み制御装置 |
| JP2900627B2 (ja) * | 1991-03-29 | 1999-06-02 | 日本電気株式会社 | 割り込み制御装置 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55119724A (en) * | 1979-03-09 | 1980-09-13 | Hitachi Ltd | Priority selection circuit |
-
1984
- 1984-02-21 JP JP3066284A patent/JPS60175149A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60175149A (ja) | 1985-09-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4698753A (en) | Multiprocessor interface device | |
| US4675812A (en) | Priority circuit for channel subsystem having components with diverse and changing requirement for system resources | |
| US4788640A (en) | Priority logic system | |
| JP4485574B2 (ja) | アクセス制御装置、アクセス制御集積回路、及びアクセス制御方法 | |
| US6141713A (en) | Bus arbitrator with a hierarchical control structure | |
| EP0443557B1 (en) | Interrupt controller capable of realizing interrupt nesting function | |
| EP0355465A2 (en) | Timer channel with match recognition features | |
| US4807117A (en) | Interruption control apparatus | |
| EP0438538B1 (en) | Priority apparatus having programmable node dwell time | |
| US4604685A (en) | Two stage selection based on time of arrival and predetermined priority in a bus priority resolver | |
| JPH06161952A (ja) | アクセス要求仲裁装置 | |
| JPH0728758A (ja) | ダイナミックタイムループ調停及び装置 | |
| US4788639A (en) | Frequency-coded multi-level interrupt control system for a multiprocessor system | |
| JPH10143467A (ja) | データ処理システムにおいてバス所有権を調停するための方法および装置 | |
| US20030048677A1 (en) | Semiconductor device having a dual bus, dual bus system, shared memory dual bus system, and electronic instrument using the same | |
| JPH0443302B2 (enrdf_load_html_response) | ||
| US5557756A (en) | Chained arbitration | |
| JPS594733B2 (ja) | キヨウツウバスセイギヨカイロ | |
| JP3105554B2 (ja) | 割込みコントローラ | |
| JPS6022248A (ja) | 割込み制御装置 | |
| KR100257071B1 (ko) | 디앰에이 컨트롤러 및 이를 이용한 디앰에이 요구신호 우선순위 변경방법 | |
| JP3611049B2 (ja) | 内部レジスタ回路 | |
| JPH0418337B2 (enrdf_load_html_response) | ||
| JP2635863B2 (ja) | 中央処理装置 | |
| JPH0646394B2 (ja) | 割り込み制御回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |