JPH0442869B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for driving a solid-state imaging device, and particularly to a method for driving a solid-state imaging device with an interlaced circuit.

Conventional configurations and their problems In recent years, the development of solid-state image sensors has progressed, and devices that are comparable to or even superior to image pickup tubes in terms of performance are being put into practical use.

Hereinafter, a conventional method for driving a solid-state imaging device with an interlace circuit will be explained with reference to the drawings.

FIG. 1 is an example of a circuit diagram schematically showing a solid-state imaging device with an interlace circuit. In Figure 1, 1 is a photodiode for photoelectric conversion, 2 is a MOS type FET for a vertical readout switch to read out the optical signal accumulated in the photodiode 1, and 3 is a MOS type FET for a vertical readout switch, whose gates are connected for each row. 4 is a vertical shift register that sequentially shifts pulses in the vertical direction; 5 is an interlace that distributes and applies the pulses generated in the vertical shift register 4 to even or odd columns of the vertical scanning pulse input line 3; In the circuit, 6 is a vertical transmission line in which the drains of MOS type FETs 2 for vertical readout switches are commonly connected for each column, and 7 is a horizontal shift register for horizontal transfer.

FIG. 2 is a circuit diagram showing the interlace circuit 5. As shown in FIG. In the figure, 21 is an input terminal for field switching pulse F1, 22 is an input terminal for field switching pulse F2, 23 is an input terminal for vertical shift register driving pulse V1, and 24 is an input terminal for vertical shift register driving pulse V2. It is a terminal.

The operation of the solid-state imaging device with interlace circuit configured as described above will be described below.

FIG. 3 is a diagram showing the timing of conventional drive pulses for a solid-state imaging device with an interlace circuit.
Normally, an interlace operation is required in the vertical direction to obtain an NTSC signal. Therefore, as shown in FIG. 3, the vertical pulse input lines are interlaced every other row. That is, in the first field, A, C, E, etc. of the vertical scanning pulse input line 3 are input in the order, and in the second field, the third line is input in the order of B, D, F, etc.
Pulses shown at V _A to V _F in the figure are output.

However, with the conventional drive pulse timing as described above, the readout cycle of each photodiode is every other field, and the storage time is two fields. Therefore, afterimage development called equivalent afterimage occurs, and the afterimage becomes noticeable when imaging a moving object, etc., and poses a serious problem in practical use.

OBJECTS OF THE INVENTION In view of the above drawbacks, the present invention provides a method for driving a solid-state imaging device that can eliminate equivalent afterimages.

Composition of the Invention In order to achieve this object, a method for driving a solid-state imaging device according to the present invention includes a two-dimensionally arranged photoelectric conversion section and first and second pulse application terminals for vertical driving. a vertical shift register section that vertically reads out optical signal charges accumulated in the section;
an interlace circuit section having third and fourth pulse application terminals and distributing output pulses generated from the vertical shift register to even or odd columns of the photoelectric conversion element section; and an interlace circuit section that transfers the optical signal charge in the horizontal direction. When driving a solid-state imaging device including a horizontal shift register section, two consecutive phase first and second pulses are applied to the first pulse application terminal during the horizontal retrace period, and the second pulse is applied. A third pulse having a phase leading from the first pulse or a phase behind the second pulse in the first field and having a phase between the first and second pulses in the second field is applied to the terminal. , a fourth pulse having a phase that overlaps with the first pulse is applied to the third pulse application terminal, and a fifth pulse that overlaps with the second pulse is applied to the fourth pulse application terminal. It is. Therefore, according to the present invention, the storage time of the photodiode becomes one field, and the equivalent afterimage can be removed to drive the solid-state imaging device.

DESCRIPTION OF EMBODIMENTS A first embodiment of the present invention will be described below with reference to the drawings. FIG. 4 shows the timing of each pulse of the solid-state imaging device and the timing of the scanning pulse applied to each vertical scanning pulse input line in the first embodiment of the present invention.

First, in the first horizontal retrace period of the first field,
By applying pulse V' ₂ and pulse F' ₁ , pulse V' _B is output to B of vertical scanning pulse input line 3.
In addition, pulse V′ ₂ and pulse
By applying _F'2 , the vertical scanning pulse input line 3 is
A pulse V′ _A is output. At the next timing within the same horizontal retrace period, pulse V' ₁ is applied and the vertical shift register 4 shifts by one stage (the output pulse of the vertical shift register 4 at this time is not connected to the interlacing circuit 5, so , pulse V ₁ is not applied to the vertical scanning input line.) During the next horizontal retrace period, pulses V' _D and V' C are similarly applied to D and _C of the vertical scanning pulse input line 3, and the vertical shift register is activated. The pulses are shifted by one stage and applied to the vertical pulse input lines sequentially. Furthermore, in the next horizontal retrace period, pulses V' _D and V' _E are applied to D and E of the vertical scanning pulse input line 3, and the same applies thereafter. As described above, according to this embodiment, by reading two lines within one horizontal retrace period, the optical signal of each photodiode can be read out for each field, and the storage time of each photodiode becomes one field. Therefore, equivalent afterimages can be removed. Furthermore, the combination of lines read within the same horizontal retrace period is different for each field (B and A, D and C in the first field, B and C, D and E in the second field), and there is little deterioration in vertical resolution. can.

Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 5 is a pulse timing diagram of a solid-state imaging device with an interlaced circuit showing a second embodiment of the present invention. In this figure, the timing of pulse V' ₁ and pulse V' ₂ is the same as in FIG. Fourth
The difference between the diagram and the configuration is the timing of pulse F″ ₁ and pulse F″ ₂ . In the pulse timing shown in FIG. 4, the order in which the pulses are read out to the vertical scanning pulse input line 3 differs depending on the field (from D to C in the first field, and from C to D in the second field), but as shown in FIG. By changing the phase of the F″ ₁ and F″ ₂ pulses for each field, the phases can be made the same. Therefore, as shown in Figure 5, the pulse
V″ _A to V″ _E can be obtained. In addition, the phase of the first field of pulse V′ ₁ shown in Fig. 4 is equal to that of the pulse
Although the phase is behind the pulse V' ₂ , it may be in a phase that is ahead of the pulse V' ₂ .

Effects of the Invention According to the method for driving a solid-state imaging device of the present invention, the problem of equivalent afterimages can be solved, and its practical effects are significant.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an outline of a solid-state imaging device with an interlace circuit, Fig. 2 is a circuit diagram showing an interlace circuit, Fig. 3 is a diagram showing the timing of drive pulses of a conventional device, and Fig. 4 is a diagram of the present invention. FIG. 5 is a diagram showing the timing of each pulse in the first embodiment of the invention, and FIG. 5 is a diagram showing the timing of each pulse in the second embodiment of the invention. 1...Photodiode, 2...For vertical switch
MOS type FET, 3...Vertical signal output line, 4...Vertical scanning circuit, 5...Interlace circuit, 6...Horizontal signal output line, 7...Horizontal transfer circuit.

Claims (1)

[Claims] 1. A photoelectric conversion element section in which photoelectric conversion elements are arranged in a two-dimensional manner, a vertical shift register section that generates a drive signal for reading optical signal charges from the photoelectric conversion elements in the column direction, and a an interlacing circuit section for distributing and applying drive signals to photoelectric conversion elements in even-numbered rows or odd-numbered rows of the photoelectric conversion element section; When driving a solid-state imaging device having a horizontal shift register section for data transfer in the direction, two consecutive phase first and second pulses are sent from the vertical shift register section during the horizontal retrace period for each field. At the same time, the interlacing circuit section is connected to third and fourth pulse train driving signals for distributing, one of which is in phase with the first pulse, and the other with the same phase with the second pulse. By operating with a pulse, a drive signal from the vertical shift register section is applied to the photoelectric conversion element section via the interlace circuit section, and the vertical shift register section is operated in the first field in the first field. A shift operation is performed by a fifth pulse in a phase between the first and second pulses in the second field, which has a phase leading from the first pulse or a phase behind the second pulse. A method for driving a solid-state imaging device, comprising reading optical signal charges from two rows of the photoelectric conversion elements during a retrace period.