JPH0442616A - Ternary output circuit - Google Patents

Abstract

PURPOSE:To suppress current consumption of a resistor, to save power consumption of a circuit and to make the circuit small through the circuit integration by inserting a 3rd switch circuit in series with a 1st resistor, inserting a 4th switch circuit in series with a 2nd resistor, and turning off the switch circuits when an H or an L signal is outputted. CONSTITUTION:A switch circuit is inserted between a resistor R1 and a power supply line VDD and between a resistor R2 and the ground in an output circuit having a voltage division circuit comprising the resistors R1, R2 at its output, and it is devised that no current flows to the resistors R1, R2 by turning off the switch circuits when an H or an L signal is outputted. That is, a switch element TR 3 comprising a P-channel MOSFET is inserted between the resistor R1 and the power supply line VDD and a switch element TR 4 comprising an N-channel MOSFET is inserted between the resistor R2 and the ground. Thus, the ternary output circuit is realized, which is suitable for power saving of the circuit and circuit integration and whose output signal is outputted without deviation from a predetermined level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a three-value output circuit, and more particularly to a three-value output circuit with low power consumption.

[Prior Art] Currently, in digital circuits such as video equipment and ICs with test functions, the signal level is divided into "H" (High level) and "L" (L) due to the demand for device miniaturization.
ow level), the intermediate level “M” (M1ddle
There are devices in practical use that handle signals with three levels (ternary signals), including 3-level signals (3-level signals).

FIG. 5 shows a conventional example of a circuit that outputs a ternary signal (a ternary output circuit). In the figure, a P-type MO8FETTrl and a resistor R are connected between the output terminal 3 and the power supply line VDD.
1 are connected in parallel. An N-type MO8FET Tr2 and a resistor R2 are connected in parallel between the output terminal 3 and the ground line.

The gates of Tri and Tr2 are connected to input terminal 1 and input terminal 2 of this ternary output circuit, respectively.

This circuit is configured as shown in Figure 6 by the combination of "H" and "L" input to input terminals 1 and 2.
A ternary signal of uH"M" or "L" is output.

When input terminal 1 and input terminal 2 both receive "L" signals, transistor Tr1 is "ON" and transistor Tr2 is "OFF". At this time, the potential V of the output terminal 3 has a value close to the potential VDD of the power supply, so the output of this circuit becomes "H".

Furthermore, when input terminal 1 and input terminal 2 both receive "H" signals, Trl is "OFF" and Te3 is "ON".
". At this time, the potential V of the output terminal 3 has a value close to the ground potential Ov, so the output becomes "L".

When input terminal 1 receives an "H" signal and input terminal 2 receives a "L" signal, both Trl and Te3 become "OFF". At this time, if the current flowing through the load connected to the output terminal 3 is sufficiently small and can be ignored, the power supply line VD
The current flowing from D into resistor R flows out to ground through resistor R2.

Therefore, the potential of output terminal 3 is V = VDDX R
2/(R1+R2), and this value is the output level of the "M" signal.

[Problem to be solved] However, in such a conventional three-value output circuit, when a load with large current consumption or multiple loads are connected in parallel to the output terminal 3, the influence of the current flowing through the load becomes could no longer be ignored, and there was a risk that the potential at the output terminal 3 would deviate from the signal level to be output, causing the next stage circuit to malfunction.

For example, when trying to output the % “M” signal, the Tr
Both i and Te3 are "OFF", and the current flowing into the resistor R1 from the power supply line VDD is divided into a current flowing to the ground through the resistor R2 and a current flowing to the load side. Alternatively, current may flow from the load side.

Therefore, a difference occurs in the magnitude of the current flowing through the resistor R1 and the current flowing through the resistor R2, and the potential of the output terminal 3 is changed from the original "
M” signal level.

Conventionally, in order to reduce the deviation of this potential V from the "M" signal level, the resistance values of resistors R1 and R2 are made small so that the current flowing through resistors R1 and R2 is sufficiently large compared to the current flowing to the load side. I was trying to make it happen. However, when the resistance values of the resistors R1 and R2 decrease, the power consumed by these resistors increases, resulting in an increase in the power consumption of the circuit. This not only hinders power saving, but also poses a problem in that the heat generated by the resistor makes it difficult to integrate the circuit.

Furthermore, when the resistance values of R1 and R2 are reduced to the same level as the on-resistance of the transistor, when Tri is turned on and Te3 is turned off to output an "H" signal, the resistor R21 is connected from Tri to the ground. and a current flows,
Moreover, a current comparable to the current flowing through Trl also flows through R1. Therefore, the potential V of the output terminal 3 becomes lower than the level of the "H" signal. Similarly, when Tri is turned OFF and Te3 is turned ON in an attempt to output the ul, signal, a current flows from the power supply line VDD to the resistor Rt, Tr2t and ground, and a current similar to the current flowing to Te3. also flows through R2.Therefore, the potential V of the output terminal 3 becomes higher than the "L" signal level.

The present invention solves the problems of the prior art, and is suitable for power saving and integration of circuits, and is capable of outputting an output signal without deviation from a predetermined level. The purpose is to provide an output circuit.

[Means for Solving the Problem] In order to achieve such an object, the means in the ternary output circuit of the present invention includes a resistor R1 on the output side.

In an output circuit having a voltage divider circuit of R2, when inserting a switch circuit between resistor R1 and power supply line VDD and between resistor R2 and ground to output a taH" signal or an "L" signal, these By turning the switch circuit "OFF", no current flows through the resistors R and R2.

[Function] In this way, when outputting the uH" signal or the "L" signal, by turning the switch circuit "OFF", the resistor side circuit is disconnected, and current no longer flows through the resistors R1 and R2. No power is consumed by these resistors, and the power consumption of the circuit can be reduced.Furthermore, since the heat generated by power consumption in the resistors is small, the circuit can be integrated and made smaller.Furthermore, the resistor R1 Even if the resistance values of R2 and R2 are made small, no current flows through these resistors when outputting the uH" signal and the "L" signal, so no potential difference is generated at the output terminal 3 due to this.

As a result, when outputting the aaH'' signal, the output voltage V can be set to a value close to the power supply voltage VDD, and when outputting the 14L'' signal, V can be set to a value close to Ov.

Therefore, it is possible to prevent malfunctions caused by the deviation of the output voltage V from a predetermined level, which has been a problem in the past, and it is possible to improve the reliability of the circuit.

[Embodiment] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of a ternary output circuit to which the present invention is applied. Here, what is different from the conventional case is that a switch element Tr3 consisting of a P-type MO8FET is placed between the resistor R1 and the power supply line VDD, and a switch element Tr3 consisting of an N-type MO5FET is placed between the resistor R2 and the ground.
A switch element Tr4 consisting of an ET is inserted, and an input terminal B connected to the gate terminal of Tri corresponding to input terminal 1 in FIG. 5 and Tr2 corresponding to input terminal 2 are inserted.
In addition to the input terminal C connected to the gate terminal of Tr3, an input terminal A connected to the gate terminal of Tr3 and an input terminal R connected to the gate terminal of Tr4 are added.

As shown in the truth table in Figure 2, when outputting an "H" level signal to the output terminal Make it. At this time, Tr3 and Tr4 are both “OFF”,
No current flows through resistors R1 and R2. Tri is “ON”
, Tr2 are "OFF", so the potential V of the output terminal X has a value close to the potential VDD of the power supply line.

When outputting an “L” level signal to the output terminal
FF”, and no current flows through resistors R1 and R2.T
Since ri is "OFF" and Tr2 is "ON", the potential V has a value close to the ground potential Ov.

When outputting an “M” level signal to the output terminal “O.F.
F", so these are disconnected from the circuit. Both Tr3 and Tr4 are "ON", so
The current flowing into Tr3 from the power supply line VDD is connected to the resistor R.
After passing through 1, the current is divided into the current flowing to ground through resistor R2 and Tr4, and the current flowing to the load connected to output terminal X. If the current flowing through the load is sufficiently smaller than the current flowing through R2, the voltage ■ at the output terminal X will have a value close to the level of the "M" signal VDDxR2/(R1+R2). Therefore, even if a load with somewhat large current consumption is connected to the output, even if the resistance values of R1 and R2 are reduced to further increase the current flowing through these resistors, the "M" signal will be affected by the current flowing through the load. The deviation in the output level can be made sufficiently small.

Also, unlike the conventional three-value output circuit, the resistors R1 and R2
Current flows through these resistors only when the "M" signal is output, and no current flows through these resistors when the 41H" signal and the "L" signal are output.

Therefore, power consumption can be significantly reduced compared to the conventional one.

FIG. 3 shows another embodiment of the present invention in which a logic circuit is added to the input side of the circuit of the embodiment shown in FIG. 1 and applied to a circuit for generating a three-value output control signal in a video camera. “M” valid/invalid control terminal 7 from video camera control circuit 9
and “H” or “L” input to waveform output control terminal 8
By combining the signals, a ternary signal is outputted to the output terminal X as shown in FIG. Waveform output terminal 8 is “H”
”, “H” or “M” is output to the output terminal X depending on the signal input to the valid/invalid control terminal 7. Here, when terminal 7 is “L”, output terminal
When the terminal 7 is “H”, the output terminal X is “M”.
”. When the waveform output terminal 8 is “L”, the output terminal X becomes “L” regardless of the state of the “M” valid fist terminal.

In addition, in the embodiment, a CMO8FET switch circuit is used, but this may be a bipolar transistor circuit, and in short, any switch circuit may be used. Furthermore, the logic circuit shown in FIG. 3 is not limited to this configuration (it goes without saying that it can be configured with various circuits depending on the application. In the embodiment, Tr3 is connected to the power supply line VDD side). In this case, Tr4 is inserted on the ground side,
Of course, Tr3 and Tr4 may be inserted on the output terminal X side.

[Effects of the Invention] As can be understood from the above explanation, in this invention, when outputting the uH" signal or the "L" signal, the transistors Tr3 and Tr4 are turned off, so the resistors R1 and R2 are turned off. This makes it possible to reduce the current consumption of the circuit and reduce the power consumption of the circuit.Furthermore, since the heat generated by the power consumed by the resistor is small, the circuit can be integrated and made smaller.

Further, since deviations in output voltage levels are less likely to occur, malfunctions can be prevented and reliability of the circuit can be improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram of a truth table showing the operation of the circuit in FIG. 1, and FIG. 3 is a circuit diagram showing another embodiment of the present invention. Figure 4 is an explanatory diagram of a truth table representing the operation of the circuit in Figure 3, Figure 5 is a circuit diagram showing a conventional three-value output circuit, and Figure 6 is a truth table representing its operation. It is an explanatory diagram. 1...Input terminal 1, 2...Input terminal 2.3...Output terminal 3, 41.42...NAND circuit, 5...N
OR circuit, 6... Inverter, 7... "M" valid/invalid control terminal, 8... Waveform output control terminal, 9
...Video camera control circuit.

Claims (1)

[Claims] (1) A first switch circuit and a first resistor are connected in parallel between the output terminal and the power supply line, and a second switch circuit and a second resistor are connected between the output terminal and the reference potential line. are connected in parallel, a third switch circuit is inserted in series with the first resistor, a fourth switch circuit is inserted in series with the second resistor, and a High
When outputting either a level signal or a low level signal, the third switch circuit and the fourth switch circuit are turned off, and either the first switch circuit or the second switch circuit is output. is turned on, and one of the other is turned off, and when outputting a middle level signal, both the first switch circuit and the second switch circuit are turned off, and the third switch circuit and the third switch circuit are turned off. A three-value output circuit characterized by turning on all four switch circuits.