JPH0441533B2 - - Google Patents
Info
- Publication number
- JPH0441533B2 JPH0441533B2 JP21009683A JP21009683A JPH0441533B2 JP H0441533 B2 JPH0441533 B2 JP H0441533B2 JP 21009683 A JP21009683 A JP 21009683A JP 21009683 A JP21009683 A JP 21009683A JP H0441533 B2 JPH0441533 B2 JP H0441533B2
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- differential pair
- signal
- phase
- constant current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 11
- 238000005513 bias potential Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000002457 bidirectional effect Effects 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
- H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
- H03K5/15073—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using a plurality of comparators
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21009683A JPS60102018A (ja) | 1983-11-09 | 1983-11-09 | 四相信号発生回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21009683A JPS60102018A (ja) | 1983-11-09 | 1983-11-09 | 四相信号発生回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60102018A JPS60102018A (ja) | 1985-06-06 |
| JPH0441533B2 true JPH0441533B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-07-08 |
Family
ID=16583744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21009683A Granted JPS60102018A (ja) | 1983-11-09 | 1983-11-09 | 四相信号発生回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60102018A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63280511A (ja) * | 1987-05-13 | 1988-11-17 | Fujitsu Ltd | クロック生成方式 |
-
1983
- 1983-11-09 JP JP21009683A patent/JPS60102018A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60102018A (ja) | 1985-06-06 |