JPH0440904B2 - - Google Patents
Info
- Publication number
- JPH0440904B2 JPH0440904B2 JP61297863A JP29786386A JPH0440904B2 JP H0440904 B2 JPH0440904 B2 JP H0440904B2 JP 61297863 A JP61297863 A JP 61297863A JP 29786386 A JP29786386 A JP 29786386A JP H0440904 B2 JPH0440904 B2 JP H0440904B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- access memory
- random access
- message
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40143—Bus networks involving priority mechanisms
- H04L12/4015—Bus networks involving priority mechanisms by scheduling the transmission of messages at the communication node
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
- H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection [CSMA-CD]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Small-Scale Networks (AREA)
- Communication Control (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Computer And Data Communications (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/809,893 US4858112A (en) | 1985-12-17 | 1985-12-17 | Interface comprising message and protocol processors for interfacing digital data with a bus network |
| US809893 | 2004-03-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62164335A JPS62164335A (ja) | 1987-07-21 |
| JPH0440904B2 true JPH0440904B2 (enExample) | 1992-07-06 |
Family
ID=25202441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61297863A Granted JPS62164335A (ja) | 1985-12-17 | 1986-12-16 | デイジタル・デ−タを母線ネツトワ−クに結合するネツトワ−ク用インタフエ−ス装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4858112A (enExample) |
| EP (1) | EP0226975A3 (enExample) |
| JP (1) | JPS62164335A (enExample) |
| KR (1) | KR950002712B1 (enExample) |
| IL (1) | IL79843A0 (enExample) |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4999771A (en) * | 1987-08-31 | 1991-03-12 | Control Data Corporation | Communications network |
| FR2642246B1 (fr) * | 1988-12-30 | 1991-04-05 | Cit Alcatel | Procede de deblocage d'un systeme multiprocesseurs multibus |
| US5130981A (en) * | 1989-03-22 | 1992-07-14 | Hewlett-Packard Company | Three port random access memory in a network bridge |
| US5249292A (en) * | 1989-03-31 | 1993-09-28 | Chiappa J Noel | Data packet switch using a primary processing unit to designate one of a plurality of data stream control circuits to selectively handle the header processing of incoming packets in one data packet stream |
| US5687314A (en) * | 1989-06-02 | 1997-11-11 | Tele Digital Development, Inc. | Method and apparatus for assisting data bus transfer protocol |
| JPH0795766B2 (ja) * | 1989-06-30 | 1995-10-11 | 株式会社日立製作所 | デジタル・データ通信装置及びそれに使用するデータ通信アダプタ |
| JPH0366241A (ja) * | 1989-08-04 | 1991-03-20 | Matsushita Electric Ind Co Ltd | プロパティ管理方法とその装置 |
| US5214644A (en) * | 1989-10-17 | 1993-05-25 | Matsushita Electric Industrial Co., Ltd. | Electronic device with data transmission function |
| US5151978A (en) * | 1990-03-22 | 1992-09-29 | Square D Company | Lan interface which permits a host computer to obtain data without interrupting a ladder program executing in the interface |
| IL96808A (en) | 1990-04-18 | 1996-03-31 | Rambus Inc | Introductory / Origin Circuit Agreed Using High-Performance Brokerage |
| US6751696B2 (en) | 1990-04-18 | 2004-06-15 | Rambus Inc. | Memory device having a programmable register |
| FR2662523B1 (fr) * | 1990-05-28 | 1994-08-12 | Copernique | Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique. |
| US5134613A (en) * | 1990-06-20 | 1992-07-28 | Standard Microsystems Corporation | Two parety memory access arbitrator |
| FR2668275B1 (fr) * | 1990-10-17 | 1994-12-23 | Bull Sa | Controleur de communication entre un ordinateur et une pluralite de terminaux, appartenant a un reseau de type csma/cd. |
| US5544317A (en) * | 1990-11-20 | 1996-08-06 | Berg; David A. | Method for continuing transmission of commands for interactive graphics presentation in a computer network |
| GB9027249D0 (en) * | 1990-12-17 | 1991-02-06 | Reuters Ltd | Offer matching system |
| JP2566081B2 (ja) * | 1990-12-19 | 1996-12-25 | エイ・ティ・アンド・ティ・コーポレーション | 光パケットのエンコーディング方法及びスイッチングノード |
| JP2501965B2 (ja) * | 1991-02-12 | 1996-05-29 | パイオニア株式会社 | デ―タ転送制御装置 |
| US5276684A (en) * | 1991-07-22 | 1994-01-04 | International Business Machines Corporation | High performance I/O processor |
| US5566301A (en) * | 1992-02-11 | 1996-10-15 | Futuretel, Inc. | ISDN audiovisual teleservices interface subsystem |
| KR100275709B1 (ko) * | 1992-02-11 | 2000-12-15 | 마크시. 코즈 | 시청각 텔레서비스 인터페이스 서브 시스템 |
| IT1254885B (it) * | 1992-04-17 | 1995-10-11 | Metodo per fornire servizi corrispondenti ad un protocollo di comunicazione di livello applicativo utilizzando servizi forniti da una rete on-osi, e rete utilizzante lo stesso. | |
| AU4245493A (en) * | 1992-05-15 | 1993-12-13 | Connective Strategies, Inc. | Isdn-based high speed communication system |
| US6000026A (en) * | 1992-06-22 | 1999-12-07 | Texas Instrument Incorporated | Multiple processor apparatus having a protocol processor intended for the execution of a collection of instructions in a reduced number of operations |
| US5440687A (en) * | 1993-01-29 | 1995-08-08 | International Business Machines Corporation | Communication protocol for handling arbitrarily varying data strides in a distributed processing environment |
| US5692128A (en) * | 1993-06-23 | 1997-11-25 | Microtest, Inc. | Computer network with reliable and efficient removable media services |
| US5533200A (en) * | 1994-03-18 | 1996-07-02 | Intel Corporation | Method and apparatus for transmission of signals over a shared line |
| US5634099A (en) * | 1994-12-09 | 1997-05-27 | International Business Machines Corporation | Direct memory access unit for transferring data between processor memories in multiprocessing systems |
| US5867669A (en) * | 1995-07-03 | 1999-02-02 | General Electric Company | Apparatus and method for upgrading communication functions |
| US5752251A (en) * | 1995-08-07 | 1998-05-12 | Ncr Corporation | Method and apparatus for recovering aborted file (or data) transmission |
| US5761428A (en) * | 1996-07-05 | 1998-06-02 | Ncr Corporation | Method and aparatus for providing agent capability independent from a network node |
| US6145045A (en) * | 1998-01-07 | 2000-11-07 | National Semiconductor Corporation | System for sending and receiving data on a Universal Serial Bus (USB) using a memory shared among a number of end points |
| DE19900245B4 (de) | 1998-01-07 | 2005-09-15 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | Vorrichtung und Verfahren zum Senden von Daten von einem USB-Endpunkt an einen USB-Host |
| US7412654B1 (en) * | 1998-09-24 | 2008-08-12 | Apple, Inc. | Apparatus and method for handling special windows in a display |
| KR100331873B1 (ko) * | 1999-07-02 | 2002-04-09 | 서평원 | 무선 망 연동장치에서의 이더넷 인터페이스 장치 및 이더넷 인터페이스 방법 |
| US6785758B1 (en) * | 2001-06-01 | 2004-08-31 | Advanced Micro Devices, Inc. | System and method for machine specific register addressing in a split transactional unidirectional bus architecture |
| DE10211939A1 (de) * | 2002-03-18 | 2003-10-02 | Sick Ag | Kopplungsvorrichtung zum Ankoppeln von Geräten an ein Bussystem |
| DE10243782A1 (de) * | 2002-09-20 | 2004-03-25 | Sick Ag | Parametrier-/Diagnosesystem für Feldgeräte |
| DE10243781A1 (de) | 2002-09-20 | 2004-03-25 | Sick Ag | Elektronische Vorrichtung für ein Bussystem |
| DE10243783A1 (de) | 2002-09-20 | 2004-03-25 | Sick Ag | Elektronische Vorrichtung für ein Bussystem |
| US7461236B1 (en) * | 2005-03-25 | 2008-12-02 | Tilera Corporation | Transferring data in a parallel processing environment |
| US20070011554A1 (en) * | 2005-06-27 | 2007-01-11 | Intel Corporation | Block acknowledgement request apparatus, systems, and methods |
| JP4870763B2 (ja) * | 2005-07-27 | 2012-02-08 | クゥアルコム・インコーポレイテッド | Forwardlinkonlyプロトコルスイートのシステムおよび方法 |
| US8730826B2 (en) * | 2010-11-17 | 2014-05-20 | Ixia | Testing fragment reassembly |
| US11108675B2 (en) | 2018-10-31 | 2021-08-31 | Keysight Technologies, Inc. | Methods, systems, and computer readable media for testing effects of simulated frame preemption and deterministic fragmentation of preemptable frames in a frame-preemption-capable network |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4016541A (en) * | 1972-10-10 | 1977-04-05 | Digital Equipment Corporation | Memory unit for connection to central processor unit and interconnecting bus |
| US4425664A (en) * | 1975-11-26 | 1984-01-10 | Bell Telephone Laboratories, Incorporated | Multiport programmable digital data set |
| US4161786A (en) * | 1978-02-27 | 1979-07-17 | The Mitre Corporation | Digital bus communications system |
| US4241398A (en) * | 1978-09-29 | 1980-12-23 | United Technologies Corporation | Computer network, line protocol system |
| US4387425A (en) * | 1980-05-19 | 1983-06-07 | Data General Corporation | Masterless and contentionless computer network |
| US4393461A (en) * | 1980-10-06 | 1983-07-12 | Honeywell Information Systems Inc. | Communications subsystem having a self-latching data monitor and storage device |
| US4493021A (en) * | 1981-04-03 | 1985-01-08 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Multicomputer communication system |
| US4516239A (en) * | 1982-03-15 | 1985-05-07 | At&T Bell Laboratories | System, apparatus and method for controlling a multiple access data communications system including variable length data packets and fixed length collision-free voice packets |
| US4510594A (en) * | 1983-03-31 | 1985-04-09 | At&T Bell Laboratories | Loop-around testing facilities for a multiline protocol controller |
| US4593282A (en) * | 1983-04-14 | 1986-06-03 | At&T Information Systems Inc. | Network protocol for integrating synchronous and asynchronous traffic on a common serial data bus |
| US4604683A (en) * | 1984-12-10 | 1986-08-05 | Advanced Computer Communications | Communication controller using multiported random access memory |
| US4692918A (en) * | 1984-12-17 | 1987-09-08 | At&T Bell Laboratories | Reliable local data network arrangement |
| US4675865A (en) * | 1985-10-04 | 1987-06-23 | Northern Telecom Limited | Bus interface |
-
1985
- 1985-12-17 US US06/809,893 patent/US4858112A/en not_active Expired - Fee Related
-
1986
- 1986-08-26 IL IL79843A patent/IL79843A0/xx not_active IP Right Cessation
- 1986-12-05 KR KR1019860010395A patent/KR950002712B1/ko not_active Expired - Lifetime
- 1986-12-12 EP EP86117321A patent/EP0226975A3/en not_active Withdrawn
- 1986-12-16 JP JP61297863A patent/JPS62164335A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| IL79843A0 (en) | 1986-11-30 |
| KR870006478A (ko) | 1987-07-11 |
| EP0226975A3 (en) | 1989-09-27 |
| KR950002712B1 (ko) | 1995-03-24 |
| EP0226975A2 (en) | 1987-07-01 |
| JPS62164335A (ja) | 1987-07-21 |
| US4858112A (en) | 1989-08-15 |
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