FR2662523B1 - Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique. - Google Patents

Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique.

Info

Publication number
FR2662523B1
FR2662523B1 FR9006593A FR9006593A FR2662523B1 FR 2662523 B1 FR2662523 B1 FR 2662523B1 FR 9006593 A FR9006593 A FR 9006593A FR 9006593 A FR9006593 A FR 9006593A FR 2662523 B1 FR2662523 B1 FR 2662523B1
Authority
FR
France
Prior art keywords
memory unit
controller device
unit controller
mass memory
single central
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9006593A
Other languages
English (en)
Other versions
FR2662523A1 (fr
Inventor
Bon Andre
Chichignoud Pierre
Clavelou Alain
Lachieze Didier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
COPERNIQUE
Original Assignee
COPERNIQUE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by COPERNIQUE filed Critical COPERNIQUE
Priority to FR9006593A priority Critical patent/FR2662523B1/fr
Priority to EP91401336A priority patent/EP0459877A1/fr
Publication of FR2662523A1 publication Critical patent/FR2662523A1/fr
Application granted granted Critical
Publication of FR2662523B1 publication Critical patent/FR2662523B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR9006593A 1990-05-28 1990-05-28 Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique. Expired - Fee Related FR2662523B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9006593A FR2662523B1 (fr) 1990-05-28 1990-05-28 Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique.
EP91401336A EP0459877A1 (fr) 1990-05-28 1991-05-23 Dispositif informatique de transfert de données en mode rafale

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9006593A FR2662523B1 (fr) 1990-05-28 1990-05-28 Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique.

Publications (2)

Publication Number Publication Date
FR2662523A1 FR2662523A1 (fr) 1991-11-29
FR2662523B1 true FR2662523B1 (fr) 1994-08-12

Family

ID=9396995

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9006593A Expired - Fee Related FR2662523B1 (fr) 1990-05-28 1990-05-28 Dispositif controleur d'unites de memoire de masse multiprocesseur a bus central unique.

Country Status (1)

Country Link
FR (1) FR2662523B1 (fr)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3820079A (en) * 1971-11-01 1974-06-25 Hewlett Packard Co Bus oriented,modular,multiprocessing computer
US4276594A (en) * 1978-01-27 1981-06-30 Gould Inc. Modicon Division Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same
FR2486291A1 (fr) * 1980-07-04 1982-01-08 Copernique Systeme memoire intercalaire entre calculateur et memoire auxiliaire
US4858112A (en) * 1985-12-17 1989-08-15 General Electric Company Interface comprising message and protocol processors for interfacing digital data with a bus network

Also Published As

Publication number Publication date
FR2662523A1 (fr) 1991-11-29

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20090119