JPH043924A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the increase of resistance and the generation of a defective contact, and to form a shallow high-concentration impurity doped layer by a method wherein a shallow low-concentration impurity doped layer is formed in a silicon substrate, a specified region is remoted, a silicide film is formed on an exposed surface, impurity ions are implanted in high concentration and heat treatment is executed. CONSTITUTION:A polysilicon gate 3 is shaped onto a region surrounded by an element isolation SiO2 layer 2 on a P-type silicon substrate 1, arsenic ions are implanted into source/drain regions to form N-type impurity diffusion layers 4 in low concentration, and gate sidewall SiO2 6 are formed. SiO2 is removed, a Ti film is formed on the whole surface, TiSix 7 is shaped on a silicon surface, residual TiN is taken out, selective TiSix 7 is formed, and a tungsten film 8 is formed onto selective TiSix 7. Silicon ions are implanted, heat treatment is executed, WSi2 films 10/TiSi2 films 9 are formed, and As<+> ions are implanted. An SiO2 film 12a is deposited, a PSG layer 12b is deposited, and shallow high- concentration N-type impurity diffusion layers 11 are formed through annealing. Accordingly, shallow high-concentration impurity doped layers are acquired.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming a shallow low-resistance doped layer on a semiconductor substrate. It is used to fabricate the source/drain of transistors.

(b) Prior Art In recent years, as LSIs have become more highly integrated, transistors have become smaller and require shallower impurity drain layers in their source/drain regions. However, as the impurity doped layer becomes shallower, problems such as an increase in its resistance, deterioration of bonding characteristics due to crystal defects caused by the process, and an increase in contact resistance with the upper wiring layer have become problems.

As a method to solve these problems, a technique of selectively forming a low-resistance silicide film on the source/drain is being considered.

(c) Problems to be Solved by the Invention However, when forming the above silicide film, the silicone component constituting the silicide film is supplied from the base and silicone layer, and after the silicide film is formed, the silicide/silicon Since the interface sinks into the underlying layer, the impurity doped layer becomes deeper. It is being considered to make the silicide film thinner to reduce the amount of penetration into the underlying layer, but if the silicide film becomes less than 1000 z, the subsequent heat treatment at 850°C or higher will cause the silicide film to become discontinuous. This causes problems such as an increase in resistance and poor contact resistance with the upper layer metal.

This invention was made to solve the above problems, and there is no increase in resistance or occurrence of contact failure.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can form a shallow high-concentration impurity doped layer.

(d) Means for Solving the Problems According to the present invention, (a) a step of forming a shallow lightly doped impurity layer by implanting impurities into a silicon substrate having a silicon oxide film formed on its surface; (b)
a step of removing a predetermined region of the silicon oxide film to expose the shallow lightly doped layer and forming a silicide film on the exposed surface; A method for manufacturing a semiconductor device comprising the step of forming a high concentration impurity doped layer in a shallow low concentration impurity doped layer below the silicide film by subsequently performing heat treatment to diffuse impurities from the silicide film. provided.

In this invention, a shallow lightly doped impurity layer is formed by implanting impurities into a silicon substrate on which a silicon oxide film is formed on the (2L) surface.

The above-mentioned silicon substrate is for manufacturing semiconductor devices, and usually includes an element isolation layer formed to partition the silicon surface, a silicon oxide film formed across the partition, and a silicon oxide film on the silicon oxide film. A silicon substrate having one polysilicon or metal electrode layer formed in a predetermined region of the substrate can be used. Specifically, the shallow low concentration impurity doped layer is a source/drain LD.
After f constituting D, it can be formed by implanting impurities shallowly and at a low concentration into both sides of the polysilicon or metal electrode layer. The depth of this doped layer is usually preferably 0.05 to 0.15 μm. The impurity concentration of this doped layer is usually 1016
~10"cm~3 is preferred. After this, sidewalls are usually formed on both end faces of the polysilicon or metal electrode layer by a known method.

In the present invention, (b) a predetermined region of the silicon oxide film is removed to expose the shallowly doped layer, and a silicide film is formed on the exposed surface. The silicide film is intended to form a highly doped silicide film, and is specifically intended to form a source/drain structure adjacent to sidewalls on both sides of the polysilicon or metal electrode tank. The silicon oxide film in the region to be formed is removed to expose the shallow, low-concentration impurity doped layer, a metal film for silicide formation is laminated on the surface from which the silicide is formed, and the metal film for silicide formation and the shallow doping layer are layered by heating the substrate. After reacting with the silicon component of the concentrated impurity-doped layer, the metal film that has not been silicided is selectively removed, and then silicon is ion-implanted from above the reactant to convert it into silicide. It can be formed by As the metal film for forming silicide, for example, Ti, Go, Ta%W, P2, etc. can be used. The above heating is for partially reacting the silicide forming metal and the silicide component of the adjacent low concentration impurity doped layer through their interface, and is usually performed by lamp annealing in an Nt atmosphere. preferable. The above-mentioned silicon ion implantation is to suppress the consumption of silicon in the metal base for silicide formation and to suppress penetration into the base of the silicide film to be formed. The silicide-forming metal (reactant) can be converted into silicide by starting from the side (surface side) that is not adjacent to the lightly doped impurity layer of the metal (reactant).

Regarding another method for forming a silicide film, a metal film for forming a first silicide is laminated on a silicon substrate with a shallow, low concentration impurity doped layer exposed, and the first silicide is formed by heating the substrate. After the forming metal and the silicon component of the shallow low concentration impurity doped layer are reacted, the first silicide forming metal film that has not been selectively silicided is removed, and a second silicide forming metal film is formed on the reactant. is selectively laminated on the first silicide film, and silicon is ion-implanted from above the second silicide forming metal film, thereby converting the above reactant and the second silicide forming metal film into silicide, which has a lower resistance. A silicide film can be formed on the source/drain.

In this invention, (c) impurity is ion-implanted into the silicide film at a high concentration, and then heat treatment is performed to diffuse the impurity from the silicide film to form a shallow, lightly doped layer under the silicide film. A highly concentrated impurity doped layer is formed.

The above impurities are for forming a highly doped silicide layer, and are ion-implanted into the region containing the silicide layer at a high concentration, usually 1020 to 10" cm. The above heat treatment is , for diffusing impurities from the heavily doped silicide layer into the shallow lightly doped layer below, and usually includes a Stow and glass layer on the heavily doped silicide layer. Form, 850-950℃
By heating the substrate to a temperature of 10.degree., it is possible to suppress upward diffusion of impurities and diffuse the impurities into the shallow low concentration impurity doping layer below, thereby forming a high concentration doping layer.

This high concentration impurity doped layer can constitute, for example, the source/drain of a transistor, and can be used for manufacturing semiconductor devices.

(e) Impurities are implanted at a high concentration into the silicide film formed on the silicon surface of the working silicon substrate, and heat treatment is performed to diffuse the impurities from the silicide film into the silicon below at a high concentration.

(f) Example The present invention will be described below based on embodiments shown in the drawings.

Note that this invention is not limited by this.

As shown in FIG. 1(a), a polysilicon gate 3 doped with Sin, 5 and P for a gate insulating film is formed on a region surrounded by an element isolation layer 2 on a P-type silicon substrate 1. After that, arsenic was added to the source/drain region.
X 1013cm-' ion implantation, low concentration N
After forming the type impurity diffusion Fi4, gate sidewalls 5iot6 are formed.

Next, as shown in FIG. 1(b), after removing the Sin on the source/drain, the entire surface is sputtered and T
After about 400 I films are transformed, TiSix 7 is formed on the silicon surface by lamp annealing at 600 to 700° C. for 30 seconds in a N gas atmosphere. Note that a TiN film is formed on areas other than the silicon surface.

After that, remove the remaining T with HtSO, /H,0, etching solution.
Remove iN and selective T on source/drain and gate
iSix7 is formed. This TiSix7 has a base S
It is formed by consuming about 500 people. Furthermore, a tungsten film 8 is selectively formed on the TiSix 7 by the CVD method.
Form 00 people.

Next, as shown in FIG. 1(C), silicon is ion-implanted into the tungsten film 8 at a concentration of about I x 1017 am-'' and heat treated at 800°C or higher to form a WSi* film 10/T.
An i5it film 9 is formed on the source/drain and gate.

After forming silicide (WSi* film 10/Ti5it film 9), As" was heated to 50KeV 5 X 10 "am-"
Ion implantation is performed into the silicide under the following conditions.

Next, as shown in FIG. 1(d), a film with a thickness of 1
After depositing 000-3000 Sin, layer 12a,
3000-6000 BPSG or PSG layer 12
b is devoted and annealed at about 900°C to form a shallow high-concentration N-type impurity diffusion layer 11. Thereafter, a contact hole 13 is formed in the same manner as the conventional method, and an upper layer wiring 14 is formed.
form.

As mentioned above, the depth of the source/drain impurity diffusion layer is determined by one LDDN layer formed in FIG. 1(a), and is determined by the silicon ion implantation shown in FIG. 1(b). Penetration into the underlying silicon due to silicidation is also prevented, and the silicide film on the source/drain and gate is formed sufficiently thick, and the resistance increases even after annealing the interlayer insulating film as shown in Figure 1(d). do not.

According to this method, a transistor with a source/drain breakdown voltage of 10 V or more can be realized.

FIGS. 2(a) and 2(b) show examples of simulations of impurity diffusion distribution using this method. Figure 2(a) shows the distribution of impurities in the depth direction after forming silicide and implanting arsenic into the silicide on a low concentration N-type diffusion layer. A junction is formed. Figure 2(b) shows the distribution after heat treatment at 900°C. Silicon diffuses from the silicide to form a shallow high-concentration N-type impurity layer, but the junction depth is the same as before the heat treatment. The impurity concentration at the silicide/silicon interface is determined by a low-concentration N-type diffusion layer, which hardly changes with heat treatment, and a shallow diffusion layer of about 0.1 μm is formed, and the impurity concentration at the silicide/silicon interface is 1
0 "am-", which is sufficiently high, and it is considered that good contact can be obtained.

(G) Effects of the Invention According to the present invention, it is possible to provide a method for manufacturing a semiconductor device that can form a shallow, heavily doped layer with impurities without increasing resistance or causing contact failure.

By using the method of this invention, fine transistors can be formed.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are explanatory diagrams of the manufacturing process of an embodiment of the present invention, and FIG. 2 is a simulation result of the impurity distribution in the depth direction in the shallow impurity diffusion layer according to the present invention. shows the impurity concentration distribution before heat treatment and (b) shows the impurity concentration distribution after heat treatment. l...P-type silicon substrate, 2...element isolation 5iOy layer, 3...phosphorus doped polysilicon gate, 4...
・N-diffusion layer (phosphorus diffusion layer), 5...5i02.6 for gate insulating film...gate side wall 5iOz, 7...TiSix
Film, 8...Tungsten film, 9...T I
S1! Film, lO...W Si 2 film, 11...N diffusion layer (arsenic diffusion layer), 12 a
-3i02 layer, 12b...BPSG or PSG layer, 13.
...Contact hole, 14...Al-5i wiring. Confucian map of the sentry (a) ″, paulownia in the direction of the tower (b)

Claims (1)

[Claims] 1. (a) forming a shallow, lightly doped layer with impurities by implanting impurities into a silicon substrate on which a silicon oxide film is formed; (b) forming a predetermined layer of the silicon oxide film; removing the region to expose the shallow lightly doped layer and forming a silicide film on the exposed surface; (c) ion-implanting impurities into the silicide film at a high concentration, and then performing heat treatment to form silicide. 1. A method of manufacturing a semiconductor device, comprising the step of forming a highly doped impurity layer in a shallow lightly doped layer below the silicide film by diffusing impurities from the film. 2. A silicon substrate has an element isolation layer formed to partition the silicon surface, a silicon oxide film formed across the partition, and a polysilicon or metal electrode layer formed in a predetermined region on the silicon oxide film. 2. The method of claim 1, comprising: 3. The silicide film is formed by stacking a silicide-forming metal film on a silicon substrate with a shallow low-concentration impurity doping layer exposed, and heating the substrate to form a silicide-forming metal and the silicon of the shallow low-concentration impurity doping layer. 2. The method of claim 1, further comprising converting the reactant to a silicide by reacting the reactant with the reactant and then implanting silicon from above the reactant. 4. Formation of the silicide film is carried out by stacking the first silicide forming metal film on the silicon substrate exposing the shallow low concentration impurity doping layer, and heating the substrate to form the first silicide forming metal and the shallow low concentration impurity doping layer. The reactant and the second silicide are reacted with the silicon component of the doping layer, a second silicide-forming metal film is laminated on the reactant, and silicon ions are implanted from above the second silicide-forming metal film. 2. The method of claim 1, wherein the forming metal film is converted to silicide. 5. The method according to claim 1, wherein the impurity diffusion is performed by heat treatment after successively stacking the SiO_2 layer and the glass layer on the silicide film into which impurities are implanted at a high concentration.