JPH04371928A - Active matrix type liquid crystal display device - Google Patents

Active matrix type liquid crystal display device

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Publication number
JPH04371928A
JPH04371928A JP3148247A JP14824791A JPH04371928A JP H04371928 A JPH04371928 A JP H04371928A JP 3148247 A JP3148247 A JP 3148247A JP 14824791 A JP14824791 A JP 14824791A JP H04371928 A JPH04371928 A JP H04371928A
Authority
JP
Japan
Prior art keywords
substrate
liquid crystal
electrode
crystal display
display device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3148247A
Other languages
Japanese (ja)
Inventor
Isao Fukui
功 福井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3148247A priority Critical patent/JPH04371928A/en
Publication of JPH04371928A publication Critical patent/JPH04371928A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To provide the active matrix type liquid crystal display device having a good display grade having no crosstalks without changing production stages by substantially entirely eliminating the capacity coupling between data lines and transparent picture element electrodes. CONSTITUTION:This active matrix type liquid crystal display device has a 1st substrate 11 which has plural pieces of the gate lines on a transparent insulating substrate 12, thin-film transistors(TFTRs) 24 provided at the respective intersected points with plural pieces of the data lines intersecting therewith and the transparent picture element electrodes 18 connected to source electrodes 21 of these TFTRs 24. Further, this device is provided with a 1st substrate 11 formed with picture element accumulation capacitors constituted by laminating electrodes for forming the accumulation capacitors and the transparent picture element electrodes 18 via a insulation film, a 2nd substrate 31 formed with a transparent counter electrode, and a liquid crystal 41 which is clamped between the 1st substrate 11 and the 2nd substrate 31. The electrodes for forming the accumulation capacitors are constituted by extending to the regions formed of the pattern ends of the transparent picture element electrodes adjacent to the pattern ends of the data lines. The above-mentioned purposes are thus attained.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、スイッチ素子として
薄膜トランジスタ(以下、TFTと略称)を用いたアク
ティブマトリックス型液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix liquid crystal display device using thin film transistors (hereinafter abbreviated as TFTs) as switching elements.

【0002】0002

【従来の技術】一般に、液晶表示装置はテレビジョン表
示やグラフィックディスプレイ等に用いられ、大容量で
高精細のアクティブマトリックス型液晶表示装置の開発
、実用化が盛んになっている。そして、この種の液晶表
示装置では、クロスト−クのない高コントラストの表示
が行なえるように、各画素の駆動・制御を行なう手段と
して半導体スイッチが用いられている。
2. Description of the Related Art Generally, liquid crystal display devices are used for television displays, graphic displays, etc., and active matrix type liquid crystal display devices with large capacity and high definition are being actively developed and put into practical use. In this type of liquid crystal display device, semiconductor switches are used as means for driving and controlling each pixel so that high contrast display without crosstalk can be achieved.

【0003】この半導体スイッチとしては、透過型の表
示が可能で大面積化も容易なTFTが多く用いられ、図
4はTFTのアレイを用いた従来のアクティブマトリク
ス型液晶表示装置の断面図であり、図5のIII −I
II 部に相当する断面を示しており、図5は図4にお
ける第1の基板の一部の平面図である。
[0003] TFTs are often used as semiconductor switches because they are capable of transmissive display and are easy to increase in area. FIG. 4 is a cross-sectional view of a conventional active matrix liquid crystal display device using an array of TFTs. , III-I in Fig. 5
A cross section corresponding to part II is shown, and FIG. 5 is a plan view of a part of the first substrate in FIG. 4.

【0004】図中の符号11は第1の基板であり、この
第1の基板11は例えば透明ガラスからなる絶縁性基板
12上にゲ−ト線13、このゲ−ト線13と一体のゲ−
ト電極14および補助蓄積容量形成用電極(以下、コン
デンサ電極という)15が形成され、これらゲ−ト線1
3、ゲ−ト電極14およびコンデンサ電極15を覆うよ
うに絶縁膜16が形成されている。更に、この絶縁膜1
6上の所定位置に、例えばアモルファス・シリコンによ
る半導体層17が形成されると共に、他の所定位置に、
コンデンサ電極15上に透明画素電極18が形成されて
いる。
Reference numeral 11 in the figure is a first substrate, and this first substrate 11 has a gate line 13 on an insulating substrate 12 made of, for example, transparent glass, and a gate integrated with the gate line 13. −
A gate electrode 14 and an auxiliary storage capacitor forming electrode (hereinafter referred to as a capacitor electrode) 15 are formed, and these gate lines 1
3. An insulating film 16 is formed to cover the gate electrode 14 and the capacitor electrode 15. Furthermore, this insulating film 1
A semiconductor layer 17 made of, for example, amorphous silicon is formed at a predetermined position on 6, and at another predetermined position,
A transparent pixel electrode 18 is formed on the capacitor electrode 15.

【0005】又、絶縁膜16上にゲ−ト線13およびコ
ンデンサ電極15と交差する例えばアルミニウムからな
るデ−タ線19、このデ−タ線19と一体で半導体層1
7上に位置するドレイン電極20、このドレイン電極2
0と対向して半導体層17と透明画素電極18とを接続
する例えばアルミニウムからなるソ−ス電極21が形成
されている。
A data line 19 made of aluminum, for example, intersects with the gate line 13 and the capacitor electrode 15 on the insulating film 16, and integrally with this data line 19, a semiconductor layer 1 is formed.
Drain electrode 20 located on 7, this drain electrode 2
A source electrode 21 made of, for example, aluminum is formed to connect the semiconductor layer 17 and the transparent pixel electrode 18 facing each other.

【0006】上記のように各素子を配置した絶縁性基板
12上の所定の位置に、絶縁性の保護膜22が形成され
、更にこの上面の全領域に液晶配向膜23が形成されて
いる。
[0006] An insulating protective film 22 is formed at a predetermined position on the insulating substrate 12 on which each element is arranged as described above, and a liquid crystal alignment film 23 is further formed over the entire upper surface of this film.

【0007】このようにして、第1の基板11が形成さ
れていると共に、この第1の基板11にゲ−ト電極14
、半導体層17、ドレイン電極20、ソ−ス電極21か
らなるTFT24が形成されている。
In this way, the first substrate 11 is formed, and the gate electrode 14 is formed on the first substrate 11.
, a semiconductor layer 17, a drain electrode 20, and a source electrode 21.

【0008】一方、第2の基板31は、例えばガラスか
らなる絶縁性基板32上に透明対向電極33および液晶
配向膜34が順次形成されている。そして、第1の基板
11と第2の基板31とは6μm程度の間隙を保って周
辺部が封着され、更にこの間隙内に液晶41が封入挾持
されている。
On the other hand, the second substrate 31 includes a transparent counter electrode 33 and a liquid crystal alignment film 34 formed in this order on an insulating substrate 32 made of glass, for example. The peripheral portions of the first substrate 11 and the second substrate 31 are sealed with a gap of about 6 μm maintained, and a liquid crystal 41 is sealed and held in this gap.

【0009】図6は上記液晶表示装置の等価回路を示し
ている。即ち、互いに平行な複数本のゲ−ト線13と、
これと直交して互いに平行な複数本のデ−タ線19との
各交点にTFT24が配置され、このTFT24の各ゲ
−ト電極14が行毎にゲ−ト線13に接続されると共に
、各ドレイン電極20が列毎にデ−タ線19に接続され
、且つ各ソ−ス電極21が各透明画素電極18に接続さ
れ、この透明画素電極18と透明対向電極33との間に
液晶41が挾持されている。そして、各透明画素電極1
8とこれに対向するコンデンサ電極15とで絶縁膜16
を挾持することにより、補助蓄積容量Cを形成している
FIG. 6 shows an equivalent circuit of the above liquid crystal display device. That is, a plurality of gate lines 13 parallel to each other,
A TFT 24 is arranged at each intersection with a plurality of data lines 19 that are perpendicular to this and parallel to each other, and each gate electrode 14 of this TFT 24 is connected to the gate line 13 for each row. Each drain electrode 20 is connected to the data line 19 for each column, and each source electrode 21 is connected to each transparent pixel electrode 18, and a liquid crystal 41 is connected between the transparent pixel electrode 18 and the transparent counter electrode 33. is being held. Then, each transparent pixel electrode 1
8 and the capacitor electrode 15 facing thereto form an insulating film 16.
By sandwiching them, an auxiliary storage capacitor C is formed.

【0010】又、各コンデンサ電極15は、図6に示す
ように接地されているか、透明対向電極33と接続され
ているかして、全ての画素について同じ電位になってい
る。動作時には、ゲ−ト線13がアドレス信号により順
次走査駆動され、TFT24が行毎に順次導通状態とな
る。一方、このゲ−ト線13の走査と同期して、デ−タ
線19には選択された数列に並列に画素信号が供給され
る。これにより、信号電圧は行毎に順次透明画素電極1
8に導かれ、透明対向電極33との間に挾持された液晶
41が励起され、画像信号となって画像表示がなされる
Furthermore, each capacitor electrode 15 is either grounded as shown in FIG. 6 or connected to the transparent counter electrode 33, so that all pixels have the same potential. During operation, the gate lines 13 are sequentially scanned and driven by address signals, and the TFTs 24 are sequentially rendered conductive row by row. On the other hand, in synchronization with the scanning of the gate line 13, pixel signals are supplied to the data line 19 in parallel to the selected number columns. As a result, the signal voltage is applied to the transparent pixel electrode 1 row by row.
8, the liquid crystal 41 held between the transparent counter electrode 33 is excited, and an image signal is generated to display an image.

【0011】[0011]

【発明が解決しようとする課題】上記のような従来のア
クティブマトリクス型液晶表示装置は、ゲ−ト線13に
印加されるアドレス信号電圧の立ち下がり時に、デバイ
スの容量結合に起因する画素電位のレベルシフトを生じ
る。このレベルシフトは、表示品位(例えば、フリッカ
−)や液晶材料の信頼性等の面から小さい方が望ましく
、その意味から補助蓄積容量Cが必要になってくる。
[Problems to be Solved by the Invention] In the conventional active matrix liquid crystal display device as described above, when the address signal voltage applied to the gate line 13 falls, the pixel potential decreases due to capacitive coupling of the device. Causes a level shift. It is desirable that this level shift be small from the viewpoint of display quality (for example, flicker) and reliability of the liquid crystal material, and for this reason, the auxiliary storage capacitor C is required.

【0012】ところで、デ−タ線19と透明画素電極1
8との間には、容量結合Cxが存在する。当該箇所は、
図4B部であり、付近の拡大図を図7に示す。図中の番
号は図4、図5と同一であり、矢線はデ−タ線19、透
明画素電極18に関する容量結合を表わす。このうち、
透明画素電極18とデ−タ線19とが直接結合している
分が容量結合Cxである。この容量結合Cxの存在によ
り、デ−タ信号電圧の変動分△Vsig が、画素電位
を下記式のように△Vp だけ変動させることになる。
By the way, the data line 19 and the transparent pixel electrode 1
8, there is a capacitive coupling Cx. The relevant part is
This is the part in FIG. 4B, and an enlarged view of the vicinity is shown in FIG. The numbers in the figure are the same as those in FIGS. 4 and 5, and the arrows represent capacitive coupling with respect to the data line 19 and the transparent pixel electrode 18. this house,
The direct coupling between the transparent pixel electrode 18 and the data line 19 is capacitive coupling Cx. Due to the existence of this capacitive coupling Cx, a variation ΔVsig in the data signal voltage causes the pixel potential to vary by ΔVp as shown in the following equation.

【0013】[0013]

【数1】 ここに、CLCは液晶容量である。[Math 1] Here, CLC is liquid crystal capacitance.

【0014】この現象は、信号電圧の変動に画素電位が
追随することを意味し、表示画像上クロスト−クとなる
。特に、画素形状が縦長で透明画素電極とデ−タ線とが
長い距離に亘って面している場合や、画素が小さく上式
の分母の値が小さい時に著しいものになる。
This phenomenon means that the pixel potential follows fluctuations in the signal voltage, resulting in crosstalk on the displayed image. This is particularly noticeable when the pixel is vertically long and the transparent pixel electrode and the data line face each other over a long distance, or when the pixel is small and the value of the denominator in the above equation is small.

【0015】この発明は、上記事情に鑑みなされたもの
で、製造工程を増加させることなく、クロスト−クのな
い表示品位の良好なアクティブマトリクス型液晶表示装
置を提供することを目的とする。
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an active matrix liquid crystal display device with no crosstalk and good display quality without increasing the number of manufacturing steps.

【0016】[0016]

【課題を解決するための手段】この発明は、絶縁性基板
上に複数本のデ−タ線と複数本のゲ−ト線とが交差して
形成され、各交点に配置された薄膜トランジスタと、こ
の薄膜トランジスタのソ−ス電極に接続された透明画素
電極とを有し、且つ蓄積容量形成用電極と上記透明画素
電極とを絶縁膜を介して積層して画素蓄積容量が形成さ
れた第1の基板と、透明対向電極が形成された第2の基
板と、上記第1の基板と上記第2の基板との間に挾持さ
れた液晶と、を具備してなるアクティブマトリクス型液
晶表示装置において、上記蓄積容量形成用電極が上記デ
−タ線のパタ−ン端と隣接する上記透明画素電極のパタ
−ン端で形成する領域に延在するアクティブマトリクス
型液晶表示装置である。
[Means for Solving the Problems] The present invention provides a thin film transistor formed on an insulating substrate by a plurality of data lines and a plurality of gate lines intersecting with each other, and arranged at each intersection. a transparent pixel electrode connected to the source electrode of the thin film transistor, and a pixel storage capacitor is formed by laminating the storage capacitor forming electrode and the transparent pixel electrode with an insulating film interposed therebetween; An active matrix liquid crystal display device comprising a substrate, a second substrate on which a transparent counter electrode is formed, and a liquid crystal sandwiched between the first substrate and the second substrate, The storage capacitor forming electrode extends in a region formed by a pattern end of the transparent pixel electrode adjacent to a pattern end of the data line.

【0017】[0017]

【作用】この発明によれば、デ−タ線パタ−ン端と隣接
する透明画素電極パタ−ン端で形成する領域に蓄積容量
形成用電極を延在させているので、デ−タ線と透明画素
電極との容量結合を極めて小さく実質的に皆無にするこ
とが出来る。この結果、製造工程を変更することなく、
クロスト−クのない表示品位の良好なアクティブマトリ
クス型液晶表示装置が得られる。
[Operation] According to the present invention, since the storage capacitor forming electrode is extended in the area formed by the end of the data line pattern and the end of the transparent pixel electrode pattern adjacent to the end of the data line, Capacitive coupling with the transparent pixel electrode can be extremely small and virtually eliminated. As a result, without changing the manufacturing process,
An active matrix liquid crystal display device with good display quality and no crosstalk can be obtained.

【0018】[0018]

【実施例】以下、図面を参照して、この発明の一実施例
を詳細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

【0019】図1はこの発明のアクティブマトリクス型
液晶表示装置の断面図で、図2I−I部に相当する断面
を示しており、図2は図1における第1の基板の一部の
平面図である。
FIG. 1 is a cross-sectional view of an active matrix liquid crystal display device of the present invention, showing a cross section corresponding to the section I-I in FIG. 2, and FIG. 2 is a plan view of a part of the first substrate in FIG. It is.

【0020】尚、この液晶表示装置は基本的には図4〜
図7に示した従来の液晶表示装置の構成と同一の構成を
備えており、対応する部分に同一符号を付し、製造工程
に従って説明することにする。
[0020] This liquid crystal display device is basically as shown in Figs.
It has the same configuration as the conventional liquid crystal display device shown in FIG. 7, and corresponding parts are given the same reference numerals and will be explained according to the manufacturing process.

【0021】先ず、第1の基板11は例えば透明ガラス
からなる絶縁性基板12上にモリブデンをスパッタリン
グ法により厚さ150nmに堆積した後、ゲ−ト線13
、このゲ−ト線13と一体のゲ−ト電極14および補助
蓄積容量形成用電極(以下、コンデンサ電極という)1
5Aをパタ−ン形成する。このコンデンサ電極15Aは
、透明電極でも不透明電極であっても機能上同一である
。この時、コンデンサ電極15Bの部分にまで延在する
ようにパタ−ンを形成する。
First, the first substrate 11 is formed by depositing molybdenum to a thickness of 150 nm on an insulating substrate 12 made of, for example, transparent glass by sputtering.
, a gate electrode 14 integrated with this gate line 13 and an auxiliary storage capacitor forming electrode (hereinafter referred to as a capacitor electrode) 1
Form a pattern of 5A. This capacitor electrode 15A is functionally the same whether it is a transparent electrode or an opaque electrode. At this time, a pattern is formed so as to extend to the capacitor electrode 15B.

【0022】次に、絶縁性基板12上にゲ−ト線13、
ゲ−ト電極14およびコンデンサ電極15A、15Bを
覆うように、例えば二酸化シリコンからなる絶縁膜16
をプラズマCVD法により厚さ300nmに堆積する。 更に、この絶縁膜16上の所定位置に、例えばアモルフ
ァス・シリコンをプラズマCVD法により厚さ300n
mに堆積して半導体層17をパタ−ン形成する。次に、
絶縁膜16上の他の所定位置に、例えばITOをスパッ
タリング法により厚さ150nmに堆積して透明画素電
極18を形成する。
Next, the gate wire 13 is placed on the insulating substrate 12.
An insulating film 16 made of silicon dioxide, for example, is formed to cover the gate electrode 14 and the capacitor electrodes 15A and 15B.
is deposited to a thickness of 300 nm by plasma CVD. Furthermore, amorphous silicon, for example, is deposited at a predetermined position on this insulating film 16 to a thickness of 300 nm by plasma CVD.
The semiconductor layer 17 is patterned by depositing the semiconductor layer 17 on the substrate. next,
At another predetermined position on the insulating film 16, a transparent pixel electrode 18 is formed by depositing, for example, ITO to a thickness of 150 nm by sputtering.

【0023】更に、絶縁膜16上にゲ−ト線13および
コンデンサ電極15A、15Bと交差する例えばアルミ
ニウムからなるデ−タ線19、このデ−タ線19と一体
で半導体層17上の一方側上に位置するドレイン電極2
0、このドレイン電極20と対向して半導体層17の他
方側と透明画素電極18とを接続する例えばアルミニウ
ムからなるソ−ス電極21を形成する。
Further, on the insulating film 16, a data line 19 made of aluminum, for example, intersects with the gate line 13 and the capacitor electrodes 15A, 15B, and is integrated with the data line 19 on one side of the semiconductor layer 17. Drain electrode 2 located above
0. A source electrode 21 made of aluminum, for example, is formed to face the drain electrode 20 and connect the other side of the semiconductor layer 17 to the transparent pixel electrode 18.

【0024】次に、上記のように各素子を配置した絶縁
性基板12上の全面に、ポリミイドからなる絶縁性の保
護膜22を厚さ1μmに塗布した後に、透明画素電極1
8の所定位置の上面のポリミイドを除去し、更に、この
上面の全領域にポリミイドからなる液晶配向膜23を塗
布形成する。
Next, after applying an insulating protective film 22 made of polyimide to a thickness of 1 μm over the entire surface of the insulating substrate 12 on which each element is arranged as described above, the transparent pixel electrode 1
The polymide on the upper surface at a predetermined position of 8 is removed, and a liquid crystal alignment film 23 made of polymide is further coated over the entire region of this upper surface.

【0025】このようにして、第1の基板11を形成す
ると共に、この第1の基板11にゲ−ト電極14、半導
体層17、ドレイン電極20、ソ−ス電極21からなる
TFT24を形成する。
In this manner, the first substrate 11 is formed, and the TFT 24 consisting of the gate electrode 14, the semiconductor layer 17, the drain electrode 20, and the source electrode 21 is formed on the first substrate 11. .

【0026】一方、第2の基板31は、例えばガラスか
らなる絶縁性基板32上に、厚さ100nmのITOか
らなる透明対向電極33および液晶配向膜34を順次形
成する。そして、第1の基板11と第2の基板31とを
6μm程度の間隙を保って周辺部を封着し、更にこの間
隙内に液晶41を封入挾持する。
On the other hand, for the second substrate 31, a transparent counter electrode 33 made of ITO having a thickness of 100 nm and a liquid crystal alignment film 34 are sequentially formed on an insulating substrate 32 made of glass, for example. Then, the first substrate 11 and the second substrate 31 are sealed at their peripheries with a gap of about 6 μm maintained, and furthermore, the liquid crystal 41 is enclosed and held in this gap.

【0027】そして、図6のように互いに平行な複数本
のゲ−ト線13と、これと直交して互いに平行な複数本
のデ−タ線19との各交点にTFT24を配置し、この
TFT24の各ゲ−ト電極14を行毎にゲ−ト線13に
接続する共に、各ドレイン電極20を列毎にデ−タ線1
9に接続し、且つ各ソ−ス電極21を各透明画素電極1
8に接続し、この透明画素電極18とこれに対向するコ
ンデンサ電極15Aとで絶縁膜16を挾持することによ
り、補助蓄積容量Cを形成する。
As shown in FIG. 6, a TFT 24 is placed at each intersection between a plurality of gate lines 13 parallel to each other and a plurality of data lines 19 perpendicular to these and parallel to each other. Each gate electrode 14 of the TFT 24 is connected to the gate line 13 for each row, and each drain electrode 20 is connected to the data line 1 for each column.
9 and connect each source electrode 21 to each transparent pixel electrode 1.
8, and the insulating film 16 is sandwiched between the transparent pixel electrode 18 and the capacitor electrode 15A facing the transparent pixel electrode 18, thereby forming an auxiliary storage capacitor C.

【0028】図3は、上記のような構成である図1のA
部を拡大して示したものである。図中の符号は図1、図
2と同一であり、矢線はデ−タ線19、透明画素電極1
8に関する容量結合を示す。デ−タ線19と透明画素電
極18とが直接接合することを延在させたコンデンサ電
極15Bで阻止することが出来、図6のCx がなくな
る。即ち、延在部であるコンデンサ電極15Bにより、
デ−タ線19と透明画素電極18との容量結合が実質的
になくなることで、表示画面上にクロスト−クのない良
好な画像を得ることが出来る。
FIG. 3 shows A of FIG. 1 having the above-mentioned configuration.
This is an enlarged view of the section. The symbols in the figure are the same as those in FIGS. 1 and 2, and the arrows indicate the data line 19 and the transparent pixel electrode 1.
8 shows the capacitive coupling for 8. Direct contact between the data line 19 and the transparent pixel electrode 18 can be prevented by the extended capacitor electrode 15B, eliminating Cx in FIG. That is, due to the capacitor electrode 15B which is the extension part,
Since capacitive coupling between the data line 19 and the transparent pixel electrode 18 is substantially eliminated, a good image without crosstalk can be obtained on the display screen.

【0029】[0029]

【発明の効果】この発明によれば、デ−タ線パタ−ン端
と隣接する透明画素電極パタ−ン端で形成する領域に蓄
積容量形成用電極を延在させているので、デ−タ線と透
明画素電極との容量結合を極めて小さく実質的に皆無に
することが出来る。この結果、製造工程を変更すること
なく、クロスト−クのない表示品位の良好なアクティブ
マトリクス型液晶表示装置が得られる。
According to the present invention, since the storage capacitor forming electrode is extended in the area formed by the data line pattern end and the adjacent transparent pixel electrode pattern end, the data Capacitive coupling between the line and the transparent pixel electrode can be extremely small and virtually eliminated. As a result, an active matrix liquid crystal display device with no crosstalk and good display quality can be obtained without changing the manufacturing process.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】この発明の一実施例に係るアクティブマトリク
ス型液晶表示装置を示す図2I−I部の断面図。
FIG. 1 is a sectional view taken along line I-I in FIG. 2 showing an active matrix liquid crystal display device according to an embodiment of the present invention.

【図2】図1の一部を示す平面図。FIG. 2 is a plan view showing a part of FIG. 1;

【図3】この発明の効果を示す図1の拡大断面図。FIG. 3 is an enlarged sectional view of FIG. 1 showing the effects of the present invention.

【図4】従来のアクティブマトリクス型液晶表示装置を
示す図5III −III 部の断面図。
FIG. 4 is a sectional view taken along line III-III in FIG. 5 showing a conventional active matrix liquid crystal display device.

【図5】図4の一部を示す平面図。FIG. 5 is a plan view showing a part of FIG. 4;

【図6】図4および図5の液晶表示装置の等価回路図。FIG. 6 is an equivalent circuit diagram of the liquid crystal display device of FIGS. 4 and 5. FIG.

【図7】従来のアクティブマトリクス型液晶表示装置の
欠点を示す図4の拡大断面図。
FIG. 7 is an enlarged cross-sectional view of FIG. 4 showing the drawbacks of the conventional active matrix liquid crystal display device.

【符号の説明】[Explanation of symbols]

11…第1の基板、13…ゲ−ト電極、15A…コンデ
ンサ電極、15B…コンデンサ電極の延在部、17…半
導体層、18…透明画素電極、19…デ−タ線、20…
ドレイン電極、21…ソ−ス電極、24…TFT、31
…第2の基板、33…透明対向電極、41…液晶、C…
補助蓄積容量。
DESCRIPTION OF SYMBOLS 11... First substrate, 13... Gate electrode, 15A... Capacitor electrode, 15B... Extended portion of capacitor electrode, 17... Semiconductor layer, 18... Transparent pixel electrode, 19... Data line, 20...
Drain electrode, 21... Source electrode, 24... TFT, 31
...Second substrate, 33...Transparent counter electrode, 41...Liquid crystal, C...
Auxiliary storage capacity.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  絶縁性基板上に複数本のデ−タ線と複
数本のゲ−ト線とが交差して形成され、各交点に配置さ
れた薄膜トランジスタと、この薄膜トランジスタのソ−
ス電極に接続された透明画素電極とを有し、且つ蓄積容
量形成用電極と上記透明画素電極とを絶縁膜を介して積
層して画素蓄積容量が形成された第1の基板と、透明対
向電極が形成された第2の基板と、上記第1の基板と上
記第2の基板との間に挾持された液晶と、を具備してな
るアクティブマトリクス型液晶表示装置において、上記
蓄積容量形成用電極が上記デ−タ線のパタ−ン端と隣接
する上記透明画素電極のパタ−ン端で形成する領域に延
在することを特徴とするアクティブマトリクス型液晶表
示装置。
1. A plurality of data lines and a plurality of gate lines are formed on an insulating substrate to intersect with each other, and a thin film transistor is arranged at each intersection, and a sort of the thin film transistor is formed.
a first substrate having a transparent pixel electrode connected to the base electrode, and on which a pixel storage capacitor is formed by laminating a storage capacitor forming electrode and the transparent pixel electrode with an insulating film interposed therebetween; In an active matrix liquid crystal display device comprising: a second substrate on which electrodes are formed; and a liquid crystal sandwiched between the first substrate and the second substrate, An active matrix liquid crystal display device characterized in that the electrode extends in a region formed by a pattern end of the transparent pixel electrode adjacent to a pattern end of the data line.
JP3148247A 1991-06-20 1991-06-20 Active matrix type liquid crystal display device Pending JPH04371928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3148247A JPH04371928A (en) 1991-06-20 1991-06-20 Active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3148247A JPH04371928A (en) 1991-06-20 1991-06-20 Active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH04371928A true JPH04371928A (en) 1992-12-24

Family

ID=15448528

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3148247A Pending JPH04371928A (en) 1991-06-20 1991-06-20 Active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH04371928A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100344844B1 (en) * 1998-07-07 2002-11-18 엘지.필립스 엘시디 주식회사 A Liquid Crystal Display Device And The Method For Manufacturing The Same
KR100488924B1 (en) * 1997-06-27 2005-10-25 비오이 하이디스 테크놀로지 주식회사 Manufacturing method of liquid crystal display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100488924B1 (en) * 1997-06-27 2005-10-25 비오이 하이디스 테크놀로지 주식회사 Manufacturing method of liquid crystal display device
KR100344844B1 (en) * 1998-07-07 2002-11-18 엘지.필립스 엘시디 주식회사 A Liquid Crystal Display Device And The Method For Manufacturing The Same
US6509939B1 (en) 1998-07-07 2003-01-21 Lg. Philips Lcd Co., Ltd Hybrid switching mode liquid crystal display device and method of manufacturing thereof
US7145627B2 (en) 1998-07-07 2006-12-05 Lg.Philips Lcd. Co., Ltd. Liquid crystal display device and method of manufacturing thereof

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