JPH0436425B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a memory copy method, and particularly to a copy method between duplicated storage devices in a storage program control method.

(Prior art) Conventionally, in the storage program control method, two
Copying between duplicated memories (storage devices) is performed by a central control unit reading from one memory and writing the contents to the other memory, which is repeated for all addresses in the memory.

(Problems to be Solved by the Invention) In the conventional copying method as described above, all data is copied, including all zero data that does not need to be copied, which takes a long time to copy. There are drawbacks.

The present invention solves the above drawbacks by clearing all areas of the copy destination memory to 0 in advance and transferring only data other than all 0 from the copy source, and provides a copy method that can perform high-speed memory copy. It is about providing.

(Means for Solving the Problems) The memory copy method according to the present invention includes a clear circuit that can clear all areas at once in a memory device, and an all-clear circuit that displays whether or not the data at the address is all 0 in response to an address. A determination circuit is installed that skips the data transmission of the address if the 0 display bit and the all 0 display bit are 0 when memory copy is specified, and the copy source memory receives address information of an address whose all 0 display bit is not 0 according to the copy instruction. The data at the address is sent to the central processing unit, and the central processing unit writes the address information and data to the copy destination memory, thereby copying the entire area.

(Example) Hereinafter, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a memory copy system according to an embodiment of the present invention. A central control unit (central processing unit) 1 has a function of receiving address information and data from a copy source memory and writing them to the copy source. 2 is a copy source memory device, and 3 is a copy destination memory device. The memory device will hereinafter be simply referred to as memory. 2
0 and 30 indicate the memory portions of copy source memory 2 and copy destination memory 3, respectively, and D ₁ , D ₂ , D _o , D _o+1 ,
D _o+2 are memory addresses 0, 1, n, n+ respectively
The data at addresses 1 and n+2 (other than all 0) is shown. Addresses l, l+1, l+2 0~
0 indicates that the data at the address is all 0. 21 and 31 are copy source memory 2,
All 0 judgment circuit of copy destination memory 3, 22,3
2 are control circuits for the copy source memory 2 and the copy destination memory 3, respectively. The determination circuits 21 and 31 have a function of causing the memory control circuits 22 and 32 to skip to the next address upon determination of 0. 23, 33
is a memory all area clearing circuit, and when this circuit is activated, it has a function of clearing all areas in the memory at the same time. 24 and 34 are the copy source, respectively.
These are all 0 display bits corresponding to the addresses of memories 2 and 3 as copy destinations. In the figure, the signal line COPY is a copy instruction signal, ADD is an address information signal,
DATA is the data signal, CLR is the clear signal,
The arrow on the signal line indicates the direction of the signal.

Next, the copy operation in this embodiment will be explained step by step. First, when the central control unit 1 sends a CLR signal to the copy destination memory 3, the memory clear circuit 33 clears all areas to zero. Thereafter, the central control unit 1 sends a COPY signal to the copy source memory 2. Control circuit 22 of copy source memory 2
When it receives the COPY signal, it extracts data in order from address 0 and sends the address information data to the central control unit 1. At this time, it receives the judgment result of the all 0 judgment bit installed corresponding to the address from the judgment circuit 21, and If the result is 0, add 1 to the address.
Update and repeat retrieving data at the next address. If all values are other than 0, the address information and data are sent to the central control unit 1.

The central control unit 1 directly transfers the address information and data sent from the copy source to the copy destination memory 3.
send to Therefore, in the memory unit 30 in the copy destination memory 3, only the address sent from the central control unit 1 is set from 0 to the sent data. Copy destination memory 3 starts from address 0
Memory copying is performed by repeating the operation until the END address is reached. Therefore, in this embodiment, the data of m words, all 0's, from address l to address l _n-1 containing all 0's can be copied without going through the central controller 1.

(Effect of the invention) As explained above, according to the present invention, all 0
data can be copied without going through the central control unit (central processing unit), so this is a faster memory copy method than the conventional method of copying all areas unconditionally through the central control unit. There are benefits to be gained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a memory copy system according to an embodiment of the present invention. 1...Central control unit, 2...Copy source memory,
3... Copy destination memory, 20, 30... Memory section, 21, 31... All 0 judgment circuit, 22, 3
2...Memory control circuit, 23, 33...Memory all 0 clear circuit, 24, 34...All 0 display bits corresponding to addresses.

Claims (1)

[Claims] 1 An information bit is provided in the memory to indicate whether the contents of each word are all 0 or not, and when copying from one side of the memory to the other, all areas of the copy destination memory are cleared in advance, and the copy source The memory determines whether the information bits are all 0 or not when transmitting the address information and the data of the address,
A memory copy method characterized in that only the data other than all zeros and the address information are sent, and the data other than all zeros is written to a copy destination memory using the address information via a central processing unit that manages execution of copying.