JPH04354178A - Method of mounting semiconductor component on printed wiring board - Google Patents
Method of mounting semiconductor component on printed wiring boardInfo
- Publication number
- JPH04354178A JPH04354178A JP15570691A JP15570691A JPH04354178A JP H04354178 A JPH04354178 A JP H04354178A JP 15570691 A JP15570691 A JP 15570691A JP 15570691 A JP15570691 A JP 15570691A JP H04354178 A JPH04354178 A JP H04354178A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- solder
- semiconductor component
- mounting semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000000034 method Methods 0.000 title claims abstract description 14
- 230000005496 eutectics Effects 0.000 claims abstract description 10
- 238000007747 plating Methods 0.000 claims abstract description 6
- 229910000679 solder Inorganic materials 0.000 claims description 29
- 238000005476 soldering Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 5
- 238000005219 brazing Methods 0.000 abstract 2
- 239000013078 crystal Substances 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 4
- 230000004907 flux Effects 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【０００１】0001
【産業上の利用分野】本発明は、プリント配線板への半
導体部品の搭載方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for mounting semiconductor components onto a printed wiring board.
【０００２】0002
【従来の技術】従来、プリント配線板へ半導体部品を搭
載するには、図４に示すプリント配線板１の半導体部品
を搭載する部分の回路２に、図５に示すようにはんだ（
共晶組成）３をめっきした後、このはんだ３のピンホー
ルからの回路（Ｃｕ）の腐食による半導体部品搭載時の
はんだ濡れ性低下を防止する為にヒュージング（溶融処
理）し、然る後このはんだ３上に図６に示すように半導
体部品４のリード５を載せてはんだ付けしている。とこ
ろで、上記のプリント配線板への半導体部品の搭載方法
では、回路２上にめっきしたはんだ３をヒュージング（
溶融処理）しているので、液相時に表面張力により図６
に示されるように丸く盛り上がる。その為、半導体部品
４のリード５を載せた際、及び載せた後はんだ付け時の
熱や炉の振動等により図７に示すように位置ずれ或いは
脱落が起こり、半導体部品４の搭載位置精度が悪かった
。一方近時半導体部品４の小型、高密度が進み、リード
５が極細となってきた為、上記のように丸く盛り上がっ
たはんだ３に載せてはんだ付けすることは極めて困難な
ものとなっている。2. Description of the Related Art Conventionally, in order to mount semiconductor components on a printed wiring board, a circuit 2 of a printed wiring board 1 shown in FIG.
After plating eutectic composition 3, fusing (melting treatment) is performed to prevent deterioration of solder wettability when mounting semiconductor components due to corrosion of the circuit (Cu) from the pinholes of this solder 3, and then As shown in FIG. 6, the leads 5 of the semiconductor component 4 are placed on the solder 3 and soldered. By the way, in the above-mentioned method of mounting semiconductor components on a printed wiring board, the solder 3 plated on the circuit 2 is applied by fusing (
Figure 6: Due to surface tension during the liquid phase,
It swells up into a round shape as shown in . Therefore, when the lead 5 of the semiconductor component 4 is placed, and after being placed, due to the heat during soldering, the vibration of the furnace, etc., the position may shift or fall off as shown in FIG. It was bad. On the other hand, in recent years, semiconductor components 4 have become smaller and more dense, and the leads 5 have become extremely thin, making it extremely difficult to place them on the rounded solder 3 as described above.
【０００３】0003
【発明が解決しようとする課題】そこで本発明は、小型
、高密度の半導体部品でも位置ずれ、脱落することなく
プリント配線板へ精度良く搭載することのできる方法を
提供しようとするものである。SUMMARY OF THE INVENTION An object of the present invention is to provide a method that allows even small, high-density semiconductor components to be mounted on a printed wiring board with high precision without shifting or falling off.
【０００４】0004
【課題を解決するための手段】上記課題を解決するため
の本発明のプリント配線板への半導体部品の搭載方法は
、プリント配線板の半導体部品を搭載する部分の回路に
、共晶以外の組成のはんだをめっきした後、このはんだ
を半溶融状態でヒュージングし、然る後このはんだ上に
半導体部品のリードを載せてはんだ付けすることを特徴
とするものである。[Means for Solving the Problems] In order to solve the above-mentioned problems, the method of mounting semiconductor components on a printed wiring board of the present invention includes a method for mounting semiconductor components on a printed wiring board in which a circuit of a portion of the printed wiring board on which a semiconductor component is mounted is made of a material other than eutectic. After plating the solder, the solder is fused in a semi-molten state, and then the leads of the semiconductor component are placed on the solder and soldered.
【０００５】[0005]
【作用】上記のように本発明によるプリント配線板への
半導体部品の搭載方法では、回路上に共晶以外の組成の
はんだを半溶融状態でヒュージングしているので、はん
だの未溶融部が溶融部の表面張力による球面になろうと
する働きを抑制し回路の表面に均一な厚さで接合される
。従って、半導体部品のリードを載せた際、安定し、は
んだ付け時の熱や炉の振動等により位置ずれ、脱落を起
こすことがなく、精度良く半導体部品が搭載される。[Operation] As described above, in the method of mounting semiconductor components on a printed wiring board according to the present invention, solder having a composition other than eutectic is fused on the circuit in a semi-molten state, so that the unmelted portions of the solder are It suppresses the tendency of the molten part to become spherical due to surface tension, and is bonded to the surface of the circuit with a uniform thickness. Therefore, when the lead of the semiconductor component is mounted, it is stable, and the semiconductor component is mounted with high precision without being displaced or falling off due to heat during soldering, furnace vibration, etc.
【０００６】[0006]
【実施例】本発明によるプリント配線板への半導体部品
の搭載方法の一実施例を図によって説明すると、図１に
示す厚さ １．６ｍｍのプリント配線板１の半導体部品
を搭載する部分の幅８０μｍ、厚さ２０μｍのＣｕ回路
２が １００μｍの間隔で２本設けられたそのＣｕ回路
２の外表面に、図２に示すように共晶以外の組成のはん
だ（Ｓｎ２０％−Ｐｂ８０％）３をめっきした後、この
はんだ３をフラックス塗布の上、大気中で ２００℃、
６０秒間加熱して半溶融状態でヒュージングし、然る後
このはんだ３上に図３に示すようにＬＳＩ４のリード５
を載せて加熱し、リード５をＣｕ回路２に接合した。一
方、図４に示すように上記実施例と同じプリント配線板
１の半導体部品を搭載する部分の２本のＣｕ回路２の外
表面に、図５に示すように従来法の通り共晶組成のはん
だ（Ｓｎ６３％−Ｐｂ３７％）３をめっきした後、この
はんだ３をフラックス塗布の上、大気中で ２００℃、
６０秒間加熱して完全溶融の状態でヒュージングし、然
る後このはんだ３上に図６に示すようにＬＳＩ４のリー
ド５を載せて加熱し、リード５をＣｕ回路２に接合した
。[Embodiment] An embodiment of the method of mounting semiconductor components on a printed wiring board according to the present invention will be explained with reference to the drawings.The width of the portion of a printed wiring board 1 having a thickness of 1.6 mm on which semiconductor components are mounted shown in FIG. Two Cu circuits 2 of 80 μm and 20 μm thick are provided at an interval of 100 μm.Solder 3 having a composition other than eutectic (Sn20%-Pb80%) 3 is applied to the outer surface of the Cu circuit 2, as shown in FIG. After plating, this solder 3 was coated with flux and heated at 200℃ in the atmosphere.
The solder 3 is heated for 60 seconds to fuse in a semi-molten state, and then the leads 5 of the LSI 4 are placed on the solder 3 as shown in FIG.
was placed and heated, and the lead 5 was joined to the Cu circuit 2. On the other hand, as shown in FIG. 4, as shown in FIG. 5, a eutectic composition of After plating solder (Sn63%-Pb37%) 3, this solder 3 was coated with flux and heated at 200°C in the atmosphere.
The solder 3 was heated for 60 seconds to fuse in a completely melted state, and then the leads 5 of the LSI 4 were placed on the solder 3 as shown in FIG. 6 and heated, and the leads 5 were joined to the Cu circuit 2.
【０００７】このようにして実施例及び従来例共にプリ
ント配線板１へ搭載した５０個のＬＳＩ４の位置精度を
検査した処、従来例のものは５個の位置ずれ不良があっ
たのに対し、実施例のものは位置ずれ不良が皆無であっ
た。これはひとえに従来例のＣｕ回路２の表面のはんだ
３がヒュージングにより丸く盛り上がって、その上に載
せたＬＳＩ４のリード５が不安定となるのに対し、実施
例のＣｕ回路２の表面のはんだがヒュージングにより均
一な厚さでフラットとなって、その上に載せたＬＳＩ４
のリード５が安定するからに他ならない。When the positional accuracy of the 50 LSIs 4 mounted on the printed wiring board 1 in both the embodiment and the conventional example was inspected in this way, the conventional example had 5 misalignment defects; In the example, there was no misalignment at all. This is simply because the solder 3 on the surface of the Cu circuit 2 of the conventional example bulges out due to fusing, making the leads 5 of the LSI 4 placed on it unstable, whereas the solder 3 on the surface of the Cu circuit 2 of the embodiment is made flat with a uniform thickness by fusing, and the LSI4 placed on top of it becomes flat.
This is because the lead 5 is stable.
【０００８】尚、上記実施例では共晶以外の組成のはん
だとして、はんだの場合について述べたが、これに限る
ものではなく、共晶以外の組成ならばどのようなはんだ
でも良い。勿論接合する対象物の材料に応じて適宜選択
されるものである。[0008] In the above embodiment, the solder is used as the solder having a composition other than eutectic, but the present invention is not limited to this, and any solder having a composition other than eutectic may be used. Of course, it is selected appropriately depending on the material of the objects to be joined.
【０００９】[0009]
【発明の効果】以上の通り本発明によるプリント配線板
への半導体部品の搭載方法では、半導体部品を搭載する
部分の回路の表面に、共晶以外の組成のはんだを半溶融
状でヒュージングして均一な厚さのフラットなはんだ層
を形成するので、半導体部品のリードを載せた際、安定
し、位置ずれ、脱落を起こすことなく、精度良く半導体
部品をプリント配線板へ搭載できる。[Effects of the Invention] As described above, in the method of mounting semiconductor components on a printed wiring board according to the present invention, solder having a composition other than eutectic is fused in a semi-molten state on the surface of the circuit where the semiconductor component is mounted. Since it forms a flat solder layer with a uniform thickness, when semiconductor component leads are placed on it, it is stable, and the semiconductor component can be mounted on the printed wiring board with high precision without shifting or falling off.
【図１】本発明によるプリント配線板への半導体部品の
搭載方法の一実施例の工程を示す図である。FIG. 1 is a diagram showing steps of an embodiment of a method for mounting semiconductor components on a printed wiring board according to the present invention.
【図２】本発明によるプリント配線板への半導体部品の
搭載方法の一実施例の工程を示す図である。FIG. 2 is a diagram showing steps of an embodiment of a method for mounting semiconductor components on a printed wiring board according to the present invention.
【図３】本発明によるプリント配線板への半導体部品の
搭載方法の一実施例の工程を示す図である。FIG. 3 is a diagram showing steps of an embodiment of a method for mounting semiconductor components on a printed wiring board according to the present invention.
【図４】従来のプリント配線板への半導体部品の搭載方
法の工程を示す図である。FIG. 4 is a diagram showing steps of a conventional method for mounting semiconductor components on a printed wiring board.
【図５】従来のプリント配線板への半導体部品の搭載方
法の工程を示す図である。FIG. 5 is a diagram showing steps of a conventional method for mounting semiconductor components on a printed wiring board.
【図６】従来のプリント配線板への半導体部品の搭載方
法の工程を示す図である。FIG. 6 is a diagram showing steps of a conventional method for mounting semiconductor components on a printed wiring board.
【図７】従来のプリント配線板への半導体部品の搭載方
法による欠陥品を示す図である。FIG. 7 is a diagram showing a defective product obtained by a conventional method of mounting semiconductor components on a printed wiring board.
１ プリント配線板 ２ Ｃｕ回路 ３ はんだ ４ 半導体部品（ＬＳＩ） ５ リード 1 Printed wiring board 2 Cu circuit 3 Solder 4 Semiconductor parts (LSI) 5 Lead
Claims (1)
る部分の回路に、共晶以外の組成のはんだをめっきした
後、このはんだを半溶融状態でヒュージングし、然る後
このはんだ上に半導体部品のリードを載せてはんだ付け
することを特徴とするプリント配線板への半導体部品の
搭載方法。[Claim 1] After plating a solder with a composition other than eutectic on the circuit on the part of the printed wiring board on which the semiconductor components are mounted, this solder is fused in a semi-molten state, and then the semiconductor is placed on the solder. A method for mounting semiconductor components on a printed wiring board, which is characterized by mounting and soldering the leads of the components.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570691A JPH04354178A (en) | 1991-05-30 | 1991-05-30 | Method of mounting semiconductor component on printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15570691A JPH04354178A (en) | 1991-05-30 | 1991-05-30 | Method of mounting semiconductor component on printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04354178A true JPH04354178A (en) | 1992-12-08 |
Family
ID=15611737
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15570691A Pending JPH04354178A (en) | 1991-05-30 | 1991-05-30 | Method of mounting semiconductor component on printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04354178A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100456470C (en) * | 2003-07-02 | 2009-01-28 | 阿纳洛格装置公司 | Semi-fusible link system for a multi-layer integrated circuit and method of making same |
-
1991
- 1991-05-30 JP JP15570691A patent/JPH04354178A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100456470C (en) * | 2003-07-02 | 2009-01-28 | 阿纳洛格装置公司 | Semi-fusible link system for a multi-layer integrated circuit and method of making same |
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