JPH04343264A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method of forming a self-aligned P well.N well in a CMOS circuit device. CONSTITUTION:A photoresist 3 is formed through a photolithography process, and phosphorus ions 4 are implanted for the formation of an N well. In succession, a silicon oxide film is selectively grown to the photoresist 3 through a liquid phase growth method. After the photoresist 3 is removed, boron ions 7 are implanted for the formation of a P well using the selectively grown silicon oxide film 5 as a mask. A substrate 1 is thermally treated to diffuse impurities for the formation of a P well 9 and an N well 8. The well of a CMOS circuit can be sharply shortened in forming process.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a complementary MOS circuit device.

0002

2. Description of the Related Art In a complementary MOS circuit device, an N-channel MOS transistor and a P-channel MOS transistor are provided on the same semiconductor substrate. Particularly in recent complementary MOS circuit devices using minute MOS transistors, it is necessary to form a P well and an N well at the same time in order to control short channel effects and parasitic bipolar operations. In a conventional method for manufacturing a complementary MOS circuit device, in order to form the P-well and N-well, ion implantation is performed by repeating the photolithography process twice as shown in FIGS. 3(a) to 3(c), for example. ing. Also,
In another conventional example, as shown in FIGS. 4(a) to 4(d), the etched area of the silicon nitride film is
Ion implantation 7 is performed using the oxide film 18, which is oxidized to a thickness of angstroms, as a mask.

0003

The former conventional example has the disadvantage that the manufacturing period is long because the lithography process is required twice. Another drawback is that product yield is reduced due to pattern defects that are inevitably introduced due to dust during the lithography process.

In the latter conventional example, a thick oxide film 18
In order to form a well, a step is generated as shown in FIG. 4(d) after the well is formed. The photolithography process of the gate electrode is MO
Although the highest precision is required in the S-type circuit device, the above-mentioned step has a detrimental effect on the lithography process. That is, if the best focus condition for exposure is set at point A in FIG. 4, the focus at point B in the figure shifts as shown in the figure, resulting in deterioration of lithography accuracy. Furthermore, a thick oxidation process causes redistribution of impurities, resulting in increased manufacturing variations.

[0005]

[Means for Solving the Problems] A method for manufacturing a semiconductor device of the present invention includes the steps of forming a photoresist mask on one main surface of a semiconductor substrate by a photolithography process, and ion-implanting impurities of a first conductivity type. a step of selectively growing an insulating film with respect to the opening of the photoresist mask; a step of removing the photoresist mask; and a step of growing an insulating film of the opposite conductivity type using the selectively grown insulating film as a mask. and a step of ion-implanting impurities.

In a preferred embodiment of the present invention, the step of selectively growing an insulating film in the openings of the photoresist mask is performed using silicofluoric acid (H2SiF).
6) is a step in which a supersaturated state is created by adding a boric acid (H3 BO3) aqueous solution to a saturated aqueous solution in which silicon dioxide (SiO2) is dissolved, and SiO2 is precipitated and deposited.

Further, in a preferred embodiment of the present invention, the step of ion-implanting the impurity of the first conductivity type ion-implants the impurity forming the well of the first conductivity type of the complementary MOS circuit device. In this step, the step of ion-implanting an impurity of a reverse conductivity type is a step of ion-implanting an impurity that forms a well of a reverse conductivity type.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are process cross-sectional views of an embodiment of the present invention. A silicon oxide film 2 is formed on a silicon substrate 1, a photoresist 3 is formed by a lithography process, and phosphorus ion implantation 4 is performed using this as a mask. [Figure 1(a)]. As a result, a phosphorus injection layer 6 is formed. Next, silicon dioxide (SiO2) was dissolved in fluorosilicic acid (H2SiF6) and then boric acid (H2SiF6) was dissolved.
3BO3) When the silicon substrate 1 is exposed to a supersaturated solution by adding an aqueous solution (liquid phase growth method), selective growth of a silicon oxide film occurs, and a silicon oxide film is formed only on the openings of the photoresist 3. [Figure 1(b)]. Subsequently, the photoresist 3 is removed and boron ion implantation 7 is performed using the selectively grown silicon oxide film 5 as a mask. Next, heat treatment is performed at, for example, 1200°C for 4 hours to remove the silicon oxide film, and the N well 8 and P well 8 are formed as shown in FIG.
Well 9 is obtained.

FIGS. 2(a) to 2(d) are process sectional views illustrating a second embodiment of the present invention. In the second embodiment, the n+ diffusion layer under the epitaxial growth layer constituting the bipolar transistor and the P-type diffusion layer electrically separating it are
formed using the method of the present invention. Arsenic and boron are ion-implanted into a silicon substrate in sequence to form an arsenic buried layer 13 and a boron buried layer 14 using the same process procedure as in the first embodiment [FIGS. 2(a) to 2(c)]. After that, n-type silicon epitaxial growth is performed, and a P-type diffusion layer 16 is formed by a lithography process and an ion implantation process [FIG. 2(d)]
. As described above, the n+ buried layer and the isolation region constituting the bipolar transistor were formed by the method of the present invention.

[0011]

As explained above, the present invention enables ion implantation for forming wells to be self-aligned by selectively growing an oxide film on a photoresist. It has the effect that the well self-alignment process can be shortened or that the well self-alignment process can be realized without forming a step on the surface of the semiconductor substrate that causes deterioration of pattern accuracy.

[Brief explanation of the drawing]

FIG. 1 is a process sectional view of a first embodiment of the present invention.

FIG. 2 is a process sectional view of a second embodiment of the present invention.

FIG. 3 is a process sectional view showing a conventional technique.

FIG. 4 is a process sectional view showing another conventional example.

Claims (3)

[Claims] 1. A step of forming a photoresist mask on one main surface of a semiconductor substrate by a photolithography process, a step of ion-implanting an impurity of a first conductivity type, and a step of ion-implanting an impurity of a first conductivity type into an opening of the photoresist mask. The method is characterized by comprising a step of selectively growing an insulating film, a step of removing the photoresist mask, and a step of ion-implanting an impurity of an opposite conductivity type using the selectively grown insulating film as a mask. A method for manufacturing a semiconductor device. 2. In the method of manufacturing a semiconductor device according to claim 1, the step of selectively growing the insulating film in the openings of the photoresist mask is performed using hydrofluorosilicic acid (H
A supersaturated state is created by adding boric acid (H3 BO3) aqueous solution to a saturated aqueous solution of silicon dioxide (SiO2) dissolved in SiF6).
1. A method for manufacturing a semiconductor device, comprising a step of precipitating and depositing. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the step of ion-implanting an impurity of a first conductivity type includes implanting an impurity that forms a well of a first conductivity type of a complementary MOS circuit device. 1. A method of manufacturing a semiconductor device, wherein the step of ion-implanting an impurity of a reverse conductivity type is a step of ion-implanting an impurity that forms a well of a reverse conductivity type.