JPH04337871A - Logical simulation method and logical simulator - Google Patents

Abstract

PURPOSE:To shorten logical simulation time by preventing an event processing from being executed when there is no event on a logical simulator. CONSTITUTION:When the internal time of an internal time storage part 1 coincides with the change time of an external signal input time storage part 2, an external signal input circuit part 3 inputs the signal change of external signal data. An event processing circuit part 4 inputs logical circuit data and a signal change, calculates the internal signal change of LSI, which occurs after internal time at that time, and registers the occurred internal signal change as a new event. An event counter 5 counts the number of remaining events. An internal time alteration circuit part 6 updates internal time to next change time stored in the external signal input time storage part 2 or to time obtained by adding prescribed time to internal time at that time whether the event counter 5 is zero or not when the event processing of all the events which are to be processed at internal time at that time is terminated.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic simulation method and a logic simulator for performing logic verification when designing a semiconductor logic integrated circuit. In the design of semiconductor logic integrated circuits, logic simulations are performed to verify the logic design work and to know the states of signals inside the circuit.

However, as the scale of semiconductor logic integrated circuits increases in recent years, the time required for logic simulation continues to increase. Therefore, it is necessary to reduce the logic simulation time.

0003

2. Description of the Related Art FIG. 4 shows the processing of a conventional logic simulator at one time. First, in step 11, event processing shown in FIG. 5 is executed, and in step 12, strobe processing is executed to compare the expected value with the simulation result. In the next step 13, a trace process is performed to notify the outside of the device of the detection of a signal change, and in a step 14, a current time update process is performed to update the internal time to a time obtained by adding a certain amount of time to the internal time at that time, When the updated internal time is not the end time, steps 11 to 14 are repeatedly executed.

As shown in FIG. 5, in event processing, it is determined in step 21 whether there is a signal change in the input signal, that is, external signal data, and if there is an input signal, the input signal is treated as an event in step 22. register. In step 23, it is determined whether there is an event to be processed at the current time, ie, a change in the input signal or internal signal of the LSI. If it is determined in step 23 that there is an event to be processed, then in step 24 signal change calculations due to each event are performed to calculate the internal signal changes of the LSI that occur after the current time, and also calculate the internal signal changes that have occurred. It is now registered as a new event.

[0005]

[Problem to be Solved by the Invention] Therefore, in the conventional logic simulator, in the current time update process in step 14, the internal time is updated to a time obtained by adding a certain amount of time to the internal time at that time, and this updated internal time is Event processing is performed even when there is no event at the time, that is, there is no signal change in external signal data or internal signal change in the LSI, and strobe processing and trace processing are also performed. Moreover, since this is done at all times, there is a problem that the time required for event processing when there is no event increases to a non-negligible extent, and when the circuit state has settled down at an early time, these processes will slow down the logic simulation. There was a problem that the processing speed decreased.

The present invention has been made to solve the above-mentioned problems, and it is possible to reduce the time required for logic simulation by preventing event processing from being executed when there is no event in the logic simulator. It is an object of the present invention to reduce the logic design period for semiconductor logic integrated circuits.

[0007]

[Means for Solving the Problems] In order to achieve the above object, the first invention provides a method for inputting logic circuit data of an LSI and external signal data for inputting to this LSI and examining its operation, and A signal change in external signal data or an internal signal change in the LSI at a time is defined as an event, and based on each event at the internal time at that time, the internal signal change in the LSI that occurs after the internal time is calculated, and the change in the internal signal of the LSI that occurs after that internal time is calculated. In a logic simulation method that registers an internal signal change as a new event and then sequentially updates the internal time at that time, events that occur are sequentially added based on the start time of the logic simulation, and processed events are When the number of events at any internal time is zero, the internal time is updated to the next signal change time in the external signal data, and when the number of events at any internal time is other than zero, the internal time is updated to the internal time at that time. It is now updated at a time when a certain amount of time is added to the time.

[0008] The second invention also provides a logic simulator that executes logic simulation based on logic circuit data of an LSI and external signal data input to the LSI to check its operation. an internal time storage section for storing, an external signal input time storage section for sequentially storing change times of each signal change in external signal data, and an internal time and external signal input time storage section for storing the current internal time and external signal input time stored in the internal time storage section. an external signal input circuit section that inputs a signal change of the external signal data when change times of the external signal stored in the external signal input circuit section match, and inputs the logic circuit data and the external signal data from the external signal input circuit section; A signal change in external signal data or an internal signal change of the LSI at the current internal time stored in the internal time storage unit is defined as an event, and an LSI signal that occurs after that internal time based on each event at the current internal time. The event processing circuit calculates internal signal changes and registers the generated internal signal changes as new events.The event processing circuit calculates internal signal changes and registers the internal signal changes as new events. An event counter that sequentially subtracts processed events, and when the event processing circuit unit completes processing for all events to be processed at the current internal time stored in the internal time storage unit, the count value of the event counter is When it is zero, the internal time in the internal time storage section is updated to the next change time stored in the external signal input time storage section, and when the count value of the event counter is other than zero, the internal time in the internal time storage section is updated at that time. and an internal time changing circuit unit that updates the internal time to a time obtained by adding a certain amount of time to the internal time.

[0009]

[Operation] According to the first and second inventions, the number of events in a circuit at one time is monitored by sequentially adding events that have occurred based on the start time of a logic simulation and subtracting processed events; When the number of events at one time is zero, the internal time is updated to the next signal change time in the external signal data, so that the internal time jumps to the next signal change time instead of advancing by a fixed time. Therefore, not only is there no need to perform event processing until the next signal change time, there is also no need to perform strobe processing and trace processing following event processing, which speeds up logic simulation when there are no events inside the circuit. becomes possible.

0010

[Example] Hereinafter, an example embodying the present invention is shown in Figs.
This will be explained according to FIG. As shown in FIG. 1, the logic simulator 10 includes an internal time storage section 1, an external signal input time storage section 2, an external signal input circuit section 3, and an event processing circuit section 4.
, an event counter 5, an internal time change circuit section 6, and a signal change output circuit section 7. It is configured to include an event counter 5, an internal time change circuit section 6, and a signal change output circuit section 7. It is designed to perform logical simulations based on

That is, the internal time storage section 1 stores the internal time at that time in the logic simulation (hereinafter referred to as the current time), and outputs the current time to the external signal input circuit section 3 and the event processing circuit section 4. . The external signal input time storage section 2 is configured to sequentially store the times of each signal change, that is, the rising or falling edge, in the external signal data inputted via the external signal input circuit section 3. The stored signal change time is output to the circuit section 3 and the internal time change circuit section 6.

The external signal input circuit section 3 receives the current time stored in the internal time storage section 1 and the external signal input time storage section 2.
When the signal change time stored in the external signal data coincides with the signal change time, the signal change of the external signal data, that is, the rising or falling edge is inputted and output to the event processing circuit section 4. The event processing circuit section 4 inputs logic circuit data as well as signal changes from the external signal input circuit section 3,
A signal change in external signal data or an internal signal change in the LSI at the current time stored in the internal time storage unit 1 is defined as an event, and an internal signal change in the LSI that occurs after the current time is determined based on each event at the current time. At the same time, the internal signal change that occurs is registered as a new event.

The event counter 5 provided in the event processing circuit section 4 sequentially adds the events that have occurred based on the start time of the logic simulation, and sequentially subtracts the events processed by the event processing circuit section 4. ing. The event counter 5 outputs the number of events at any given time to the internal time change circuit section 6.

The signal change output circuit section 7 outputs the processing results of the event processing circuit section 4 when the event processing circuit section 4 has finished processing all the events to be processed at the current time stored in the internal time storage section 1. In addition to executing a strobe process to compare the value and an expected value, a trace process is executed and a trace list 8 is output.

When the signal change output circuit section 7 completes processing at the current time stored in the internal time storage section 1, the internal time change circuit section 6 changes the internal time when the count value of the event counter 5 is zero. The current time in the storage unit 1 is updated to the next change time stored in the external signal input time storage unit 2, and when the count value of the event counter 5 is other than zero, the current time in the internal time storage unit 1 is updated to the current time in the internal time storage unit 1. It is updated to a time that is a certain amount of time added to the current time.

Next, the process performed at one time by the logic simulator 10 configured as described above will be explained with reference to FIG. Accordingly, the strobe process in step 12 and the trace process in step 13 are executed. Thereafter, the internal time change circuit unit 6 determines in step 32 whether or not the count value of the event counter 5 is zero. If this count value is zero, the internal time is updated to the next external signal change time in step 33, and if the count value is other than zero, the internal time is updated to the time added by a certain amount of time in step 34. be done.

Further, FIG. 3 shows event processing by the event processing circuit section 4. First, in step 41, the input signal,
That is, it is determined whether or not there is a signal change in the external signal data, and if there is an input signal, the input signal is registered as an event in step 42, and "1" is added to the count value of the event counter 5 in step 43. do. Steps 41 to 43 are repeatedly executed by the number of input signals.

Then, in step 44, it is determined whether there is an event to be processed at the current time, ie, a change in an input signal or an internal signal of the LSI. If it is determined in step 44 that there is an event to be processed, step 45
At step 46, "1" is subtracted from the count value of the event counter 5, and at step 46, a signal change operation due to the event is performed to calculate the internal signal change of the LSI that occurs after the current time. In step 47, it is determined whether an event has occurred, that is, whether there has been an internal signal change. If it is determined that an event has occurred, the event that has occurred is registered in step 48, and the count value of the event counter 5 is registered in step 49. Add "1" to. Steps 44 to 49 are repeatedly executed as many times as there are events to be processed at the current time.

As described above, in this embodiment, the event counter 5 is provided in the event processing circuit section 4, and when the processing by the signal change output circuit section 7 is completed and the count value of the event counter 5 is zero, the internal time storage section Since the current time of 1 is updated to the next change time stored in the external signal input time storage unit 2, the current time stored in the internal time storage unit 1 does not advance by a fixed amount of time, but rather changes to the next change time stored in the external signal input time storage unit 2. This results in a jump to the signal change time of the external signal data. Therefore, not only is there no need to perform event processing until the next signal change time, but there is also no need to perform strobe processing and trace processing following event processing, which is required for logic simulation when there is no event inside the circuit. It is possible to shorten the time and speed up logic simulation, thereby shortening the logic design period of a semiconductor logic integrated circuit.

[0020]

[Effects of the Invention] As detailed above, according to the present invention, when there is no event in the logic simulator, event processing is prevented from being executed, thereby reducing the time required for logic simulation. This has the excellent effect of shortening the logic design period for semiconductor logic integrated circuits.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a logic simulator of one embodiment.

FIG. 2 is a flowchart showing one-time processing of a logic simulator.

FIG. 3 is a flowchart showing processing of an event processing circuit unit of one embodiment.

FIG. 4 is a flowchart showing one-time processing of a conventional logic simulator.

FIG. 5 is a flowchart showing conventional event processing.

[Explanation of symbols]

1 Internal time storage unit 2 External signal input time storage section 3 External signal input circuit section 4 Event processing circuit section 5 Event counter 6 Internal time change circuit section 7 Signal change output circuit section

Claims (2)

[Claims] [Claim 1] LSI logic circuit data and this LS
Input external signal data to I and check its operation, and set a signal change in the external signal data or an internal signal change of the LSI at the internal time at that time as an event, and set each event at the internal time at that time as an event. In a logic simulation method, the internal signal change of an LSI that occurs after the internal time is calculated based on the internal time, and the internal signal change that occurs is registered as a new event, and then the internal time at that time is sequentially updated. , sequentially adds the events that occurred based on the start time of the logic simulation, subtracts the processed events, and when the number of events at any internal time is zero, updates the internal time to the next signal change time in the external signal data. However, when the number of events at any internal time is other than zero, the internal time is updated to a time obtained by adding a certain amount of time to the internal time at that time. [Claim 2] LSI logic circuit data and this LS
In a logic simulator that executes logic simulation based on external signal data input to I and used to examine its operation, an internal time storage unit (1) stores internal time in logic simulation, and each signal change in external signal data. an external signal input time storage section (2) that sequentially stores the change times of
), an external signal input circuit unit (3) inputs a signal change in external signal data when the external signal change times stored in
3), and a signal change in the external signal data or an internal signal change in the LSI at the internal time stored in the internal time storage unit (1) is respectively treated as an event. An event processing circuit unit (4) that calculates the internal signal change of the LSI that occurs after the internal time based on each event at the time, and registers the generated internal signal change as a new event, and the start of logic simulation. an event counter (5) that sequentially adds events that occur based on the time period and sequentially subtracts events that have been processed by the event processing circuit section (4); and an internal time storage section (1).
When the event processing circuit section (4) has finished processing all the events to be processed at the current internal time stored in the internal time storage section (1), if the count value of the event counter (5) is zero, the internal time storage section (1) The internal time of the event counter (5) is updated to the next change time stored in the external signal input time storage section (2), and when the count value of the event counter (5) is other than zero, the internal time of the internal time storage section (1) is updated. A logic simulator comprising (6) an internal time changing circuit unit that updates the internal time to a time obtained by adding a predetermined time to the internal time at that time.