JPH04332141A - Semiconductor container - Google Patents

Abstract

PURPOSE:To prevent adherence of a brazing material leaked in a recess formed on a surface of a bottom plate to the bottom of the recess for die bonding a semiconductor chip when the palate is brazed to the bottom of a device body. CONSTITUTION:A recess 300 is provided at a corner of a surface in a recess 32 in which a brazing material leaked in the recess 32 is easily stop. The material leaked in the recess 32 is fed to the recess 300 formed at the corner of the surface of the recess 32 in which the material is easily stored, cooled, solidified, and adherence of the material to the bottom in the recess 32 for die bonding a semiconductor chip is prevented.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor storage device for storing semiconductor chips.

0002

2. Description of the Related Art Conventionally, as shown in FIG. 14, a device main body 20 made of ceramic and having a brazing layer 10 formed by nickel plating that is easily wetted by a brazing material on the surface of a metallized layer has a high thermal conductivity. There is a semiconductor storage device in which a bottom plate 30 is brazed to seal the bottom surface of a cavity 40 for accommodating semiconductor chips provided in the device main body 20.

In this semiconductor storage device, as shown in FIG. 14, a recess 32 for inserting the semiconductor chip is provided on the surface of the bottom plate 30 exposed at the bottom of the cavity 40, and the lower part of the semiconductor chip 50 is inserted into the recess 32. There is a type of device in which the semiconductor chip 50 can be die-bonded to the inner bottom surface of the recess 32 in the fitted state.

In this type of semiconductor storage device, even if the semiconductor chip 50 is a tall chip with a highly integrated multilayer structure, the height of the top surface of the semiconductor chip 50 to be die-bonded to the inner bottom surface of the recess 32 is The electrode 52 provided on the top surface of the semiconductor chip is lowered to the same height as or close to the inner end of the connection line 24 provided on the step surface 22 of the device body around the cavity 40 of the semiconductor storage device, and the wire 60 etc. Through this, it is possible to accurately connect to the inner end of the connection line 24 over a short distance with little loss in high frequency characteristics.

[0005]

However, in the semiconductor storage device of the type provided with the recess 32, when the bottom plate 30 is brazed to the bottom surface of the device main body 20 provided with the brazing layer 10, as shown in FIG. As shown, the brazing material 70 enters the recess 32 provided on the surface of the bottom plate 30 and
It became stuck around the corners of the inner bottom surface. When the semiconductor chip 50 is die-bonded to the inner bottom surface of the recess 32 with the lower part of the semiconductor chip 50 fitted into the recess 32, the brazing material 70 attached around the corners of the inner bottom surface of the recess 32 is removed from the semiconductor chip 50. Concave part 32 on the bottom
I let it rise from the inner bottom. Then, a gap 80 is generated between the bottom surface of the semiconductor chip 50 and the inner bottom surface of the recess 32, making it impossible to efficiently dissipate the heat generated by the semiconductor chip 50 to the outside of the semiconductor storage device through the bottom plate 30. The tensile force of the material caused cracks to occur in the fragile semiconductor chip 50.

[0006] When the bottom plate 30 is brazed to the bottom of the device main body 20, the amount of brazing material for brazing the bottom plate 30 is adjusted so that the brazing material 70 does not enter the recess 32 provided on the surface of the bottom plate 30. As a rule of thumb, this is extremely difficult.

[0007] Furthermore, in order to eliminate the above-mentioned difficulties, it is also conceivable to lay a stage plate (not shown) on the inner bottom surface of the recess 32. However, in such a case, the number of parts of the semiconductor storage device increases, making it difficult to manufacture the semiconductor storage device, and the semiconductor chip 50 must be mounted on the surface of the bottom plate 30 via a stage plate. The heat dissipation properties of the

[0008] The same thing can also be said of a semiconductor storage device in which the bottom plate surface exposed at the bottom of the cavity is connected in a planar manner to the bottom plate surface brazed to the bottom of the device main body. Also, when the bottom plate was brazed to the bottom of the device main body, the brazing material leaked out and adhered to the bottom plate surface exposed at the bottom of the cavity, causing the same adverse effect as above on the semiconductor chips die-bonded to the bottom plate surface.

[0009] The present invention solves this problem. When the bottom plate is brazed to the bottom of the device main body provided with the brazing layer, the brazing material leaks to the bottom of the recess where the semiconductor chip is die-bonded and to the surface of the bottom plate. The object of the present invention is to provide a semiconductor storage device that does not come out or stick.

0010

[Means for Solving the Problems] In order to achieve the above object, a first semiconductor storage device of the present invention has a bottom plate brazed to the bottom surface of the device main body provided with a brazing layer, and the bottom plate is used for the semiconductor storage device. A semiconductor storage device in which a bottom surface of a cavity for accommodating a semiconductor chip provided in a main body is sealed, the bottom plate surface exposed at the bottom surface of the cavity being provided with a recess for inserting the semiconductor chip. The present invention is characterized in that a depression for storing the brazing material is provided in the inner surface portion of the recess where the brazing material leaking into the recess tends to accumulate when brazing to the bottom surface of the main body.

[0011] In the first semiconductor storage device of the present invention, a recess is provided at a corner of the inner surface of the recess, or a recess is provided at a corner where the inner surface of the recess intersects with its bottom surface. is preferred.

In a second semiconductor storage device of the present invention, a bottom plate is brazed to the bottom of the device main body provided with a brazing layer, and the bottom of a cavity for accommodating semiconductor chips provided in the device main body is sealed with the bottom plate. In the semiconductor storage device, the bottom plate surface exposed at the bottom of the cavity is connected in a planar manner to the bottom plate surface brazed to the bottom of the device main body, when the bottom plate is brazed to the bottom of the device main body. The present invention is characterized in that a recess for storing brazing material is provided in a surface portion of the bottom plate where leaked brazing material tends to accumulate on the surface of the bottom plate exposed at the bottom of the cavity.

[0013] In the second semiconductor storage device of the present invention, at the corner portion of the bottom plate surface exposed at the bottom of the cavity,
It is preferable to provide a depression, or to provide a depression around the surface of the bottom plate exposed at the bottom of the cavity.

[0014] In the first and second semiconductor storage devices of the present invention, it is preferable that a notch be provided in the corner portion of the inner surface of the cavity of the device body.

[0015]

[Operation] In the first semiconductor storage device having the above configuration,
When the bottom plate is brazed to the bottom surface of the apparatus main body, the brazing material leaking into the recess flows into the recess provided in the inner surface portion of the recess where the brazing material tends to accumulate, and adheres to the recess. Specifically, the brazing filler metal leaking into the recess is subjected to surface tension, etc., and collects at the corners of the inner surface of the recess where the filler metal tends to accumulate, or at the corners where the inner surface of the recess intersects with the bottom surface. It flows into the depression provided in the section, cools and solidifies. This prevents the brazing material from adhering to the inner bottom surface of the recess where other semiconductor chips are die-bonded.

In the second semiconductor storage device having the above configuration, when the bottom plate is brazed to the bottom of the device main body, the brazing material that leaks out onto the bottom plate surface exposed at the bottom of the cavity is deposited on the bottom plate surface where brazing material tends to accumulate. It flows into the depression provided and deposits therein. Specifically, the brazing filler metal that has leaked onto the bottom plate surface exposed at the bottom of the cavity is subjected to surface tension, etc., and collects at the corners and around the bottom plate surface where filler metal tends to accumulate. It flows into the depressions provided around the surface of the bottom plate and the bottom plate, where it cools and solidifies. This prevents the brazing material from adhering to the surface of the bottom plate exposed at the bottom of the cavity to which other semiconductor chips are die-bonded.

Furthermore, in the first and second semiconductor storage devices in which a notch is provided in the corner portion of the inner surface of the cavity of the device body, a rectangular semiconductor chip with an edge-like corner portion is provided. It can be accommodated in the cavity in close proximity to the inner surface of the cavity with less clearance without being obstructed by the curved corners of the inner surface of the cavity. Then, the electrode on the upper surface of the semiconductor chip can be connected to the inner end of the connection line provided on the stepped surface around the cavity via a short wire or the like over a short distance with less loss in high frequency characteristics.

[0018]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings. 1 and 3 and FIGS. 2 and 4 respectively show the first embodiment of the present invention.
1 and 3 are exploded and assembled explanatory views, and FIGS. 2 and 4 are partially enlarged front sectional views thereof. The embodiments shown in these figures will be described below.

In the figure, 20 is the main body of the semiconductor storage device. The device main body 20 is formed by laminating and firing a plurality of ceramic green sheets cut into a predetermined shape.

A rectangular cavity 40 for accommodating a semiconductor chip is transparently provided in the center of the device body 20.

Inside and outside of the device main body 20, there are stair surfaces 22 with one or more steps (indicated as one step in the figure).
23 in series.

[0022] The staircase surfaces 22 and 23 inside and outside the main body of the device include
A connection line 24 made of metallization such as tungsten,
A plurality of them are consecutively arranged and provided inside the device main body 20.

The bottom surface of the device main body 20 is provided with a brazing layer 10 formed by plating the surface of a metallized layer of tungsten or the like with nickel plating or the like which is easily wetted by the brazing material.

On the bottom of the device main body 20 provided with the brazing layer 10 is a bottom plate 30 made of a highly thermally conductive copper-tungsten alloy, the surface of which is plated with nickel plating or the like that is easily wetted by the brazing material. The bottom plate 30 is brazed using a brazing material such as silver solder. The bottom surface of the cavity 40 is sealed with the bottom plate 30.

A rectangular recess 32 is provided on the surface of the bottom plate 30 exposed at the bottom of the cavity 40. and,
The lower part of the rectangular semiconductor chip 50 can be fitted into the recess 32.

The above configuration is similar to the conventional semiconductor storage device, but in the semiconductor storage device shown in the figure, when the bottom plate 30 is brazed to the bottom surface of the device main body 20, the brazing material leaking into the recess 32 accumulates. Recesses 300 and 302 for storing the brazing material are provided on the inner surface of the recess 32 toward the periphery of the bottom plate 30.

Specifically, in the semiconductor storage device shown in FIGS. 1 and 3, a circular depression 300 with a partially broken part when viewed from above is formed at the four corners of the inner surface of the depression 32. It is set up for people around 30.

In the semiconductor storage device shown in FIGS. 2 and 4, a recess 302 having an L-shaped cross section is formed on the bottom plate from the inner surface of the recess 32 to the corner where the inner surface and the inner bottom surface of the recess 32 intersect. It is set up for people around 30.

As shown in FIGS. 3 and 4, the brazing material 70 that leaked into the recesses 32 when the bottom plate 30 was brazed to the bottom of the device main body 20 is removed from the corners of the inner surfaces of those recesses 32 and From the inner surface of the recess 32 to the inner surface of the recess 32
Recess 30 provided over the corner where the inner bottom surface intersects
0,302, and those depressions 300,302
It is cooled and solidified inside.

The semiconductor storage devices shown in FIGS. 1 and 3 and FIGS. 2 and 4 are each constructed as described above.

5 and 7 and FIGS. 6 and 8 respectively show other preferred embodiments of the first semiconductor storage device of the present invention, and FIGS. 5 and 6 are exploded and assembled explanatory views thereof, and FIG. and FIG. 8 shows a partially enlarged front sectional view thereof. below,
The embodiments shown in these figures will be explained.

In the semiconductor storage device shown in the figure, depressions 304 and 306 for storing brazing material are provided on the inner surface of the depression 32 where the brazing material leaking into the depression 32 is likely to accumulate when the bottom plate 30 is brazed to the bottom surface of the device main body 20. , are provided around the bottom plate 30 and below.

Specifically, in the semiconductor storage device shown in FIGS. 5 and 7, a circular depression 304 with a partially broken part when viewed from above is formed in the four corners of the inner surface of the depression 32. It is located around 30 and below.

In the semiconductor storage device shown in FIGS. 6 and 8, a recess 306 having a J-shaped cross section is formed in the bottom plate from the inner surface of the recess 32 to the corner where the inner surface intersects the inner bottom surface of the recess 32. It is located around 30 and below.

As shown in FIGS. 7 and 8, the brazing material 70 that leaked into the recesses 32 when the bottom plate 30 was brazed to the bottom surface of the apparatus main body 20 is removed from the corners of the inner surfaces of the recesses 32 and From the inner surface of the recess 32 to the inner surface of the recess 32
Recess 30 provided over the corner where the inner bottom surface intersects
4,306, and those depressions 304,306
It is cooled and solidified inside.

The rest of the structure is the same as that of the first semiconductor storage device shown in FIGS. 1 and 3, and FIGS. 2 and 4, and the same members are given the same reference numerals and their explanations will be omitted. do.

9 and 11 and FIGS. 10 and 12 respectively show preferred embodiments of the second semiconductor storage device of the present invention, and FIGS. 9 and 10 are exploded and assembled explanatory views thereof, and FIG.
1 and FIG. 12 show partially enlarged front sectional views thereof. The embodiments shown in these figures will be described below.

In the illustrated semiconductor storage device, the cavity 40
Without providing a recess on the surface of the bottom plate 30 exposed on the bottom surface, the surface of the bottom plate 30 exposed on the bottom surface of the cavity 40 is connected to the device main body 20.
They are arranged in a planar manner on the surface of the bottom plate 30 which is brazed to the bottom surface.

When the bottom plate 30 is brazed to the bottom of the device body 20, the solder material that leaks out onto the surface of the bottom plate 30 exposed at the bottom of the cavity 40 tends to accumulate on the surface of the bottom plate 30.
Recesses 308 and 310 are provided for storing brazing filler metal.

Specifically, in the semiconductor storage device shown in FIGS. 9 and 11, the bottom plate 30 exposed at the bottom of the cavity 40 is
Recesses 308 having a circular shape when viewed from above are provided at the four corners of the surface toward the periphery of the bottom plate 30 and its downward direction.

Further, in the semiconductor storage device shown in FIGS. 10 and 12, a depression 310 having a U-shaped cross section is provided around the surface of the bottom plate 30 exposed at the bottom of the cavity 40, facing around and below the bottom plate 30. ing.

[0042] As shown in FIGS. 11 and 12,
The brazing material 70 that leaked onto the surface of the bottom plate 30 exposed at the bottom of the cavity 40 when the bottom plate 30 was brazed to the bottom of the device main body 20 was provided at the corners of the surface of the bottom plate 30 exposed at the bottom of the cavity 40 and around the surface of the bottom plate 30. Hollow 308,
310 and is cooled and solidified within those depressions 308 and 310.

The rest of the structure is the same as that of the first semiconductor storage device shown in FIGS. 1 and 3, and FIGS. 2 and 4, and the same members are designated by the same reference numerals and their explanations will be omitted. do.

Note that in the first and second semiconductor storage devices of these embodiments, the cavity 40 of the device main body 20
Figures 1 and 2, Figures 5 and 6, and Figure 9 are attached to the corners of the inner surface.
As shown in FIG. 10, it is preferable to provide a notch 42 having a shape close to a cylinder. This is because if such a notch 42 is provided, a semiconductor chip 50 having a rectangular shape or the like with edge-like corners can be formed as shown in FIG.
This is because the material can be accommodated in the cavity 40 in close proximity to the inner surface of the cavity 40 without being obstructed by the curved corners of the inner surface of the cavity 40 with a small gap. This is because the electrode 52 on the top surface of the semiconductor chip can be connected to the inner end of the connection line 24 provided on the step surface 22 of the device body around the cavity 40 via a short wire 60 or the like over a short distance with less loss in high frequency characteristics. . However, in such a case, in the first semiconductor storage device, as shown in FIGS. 1 to 8, the inner surface of the recess 32 is positioned directly below the inner surface of the cavity 40 or outwardly from the inner surface of the cavity 40. , the recess 32 is widely opened on the surface of the bottom plate 30, and the recess 32 is
It is necessary to prevent the semiconductor chip 50 from approaching the inner surface of the cavity 40 from the inner surface.

[0045]

[Effects of the Invention] As explained above, according to the first semiconductor storage device of the present invention, when the bottom plate is brazed to the bottom of the device main body, the brazing material leaks into the recess and easily accumulates therein. It is possible to collect it on the inner surface of the recess or the corners of the bottom surface thereof, to flow accurately into the recesses provided at those corners, and to cool and solidify within the recess. Further, it is possible to prevent the brazing material from adhering to the inner bottom surface of the recess where other semiconductor chips are die-bonded.

According to the second semiconductor storage device of the present invention,
When the bottom plate is brazed to the bottom of the device body, the brazing material that leaked out onto the surface of the bottom plate exposed at the bottom of the cavity is collected in the corners of the bottom plate surface and around the surface of the bottom plate, where the solder metal exposed at the bottom of the cavity tends to accumulate. Precisely flow into the recesses provided in those corners and around the bottom plate surface,
It can be cooled and solidified within the depression. and,
It is possible to prevent the brazing material from adhering to the surface of the bottom plate to which other semiconductor chips are die-bonded.

As a result, according to the first and second semiconductor storage devices of the present invention, when semiconductor chips are die-bonded to the surface of the bottom plate exposed on the inner bottom surface of the recess or the bottom surface of the cavity, the entire bottom surface of the semiconductor chips is bonded to the bottom surface of the bottom plate. Die bonding is carried out in close contact with the inner bottom surface of the recess and the surface of the bottom plate without any gaps.
Heat generated by the semiconductor chip can be efficiently dissipated to the outside of the semiconductor storage device through the bottom plate. Along with that,
When a semiconductor chip is die-bonded to the surface of the bottom plate exposed at the inner bottom surface of the recess or the bottom surface of the cavity, it is possible to prevent cracks from occurring in the fragile semiconductor chip due to the tensile force of the bonding material for chip bonding.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of an exploded assembly of a first semiconductor storage device of the present invention.

FIG. 2 is an explanatory diagram of an exploded assembly of the first semiconductor storage device of the present invention.

FIG. 3 is a partially enlarged front sectional view of the first semiconductor storage device of the present invention.

FIG. 4 is a partially enlarged front sectional view of the first semiconductor storage device of the present invention.

FIG. 5 is an explanatory diagram of an exploded assembly of the first semiconductor storage device of the present invention.

FIG. 6 is an explanatory diagram of an exploded assembly of the first semiconductor storage device of the present invention.

FIG. 7 is a partially enlarged front sectional view of the first semiconductor storage device of the present invention.

FIG. 8 is a partially enlarged front sectional view of the first semiconductor storage device of the present invention.

FIG. 9 is an explanatory view of disassembling and assembling the second semiconductor storage device of the present invention.

FIG. 10 is an explanatory diagram of an exploded assembly of a second semiconductor storage device of the present invention.

FIG. 11 is a partially enlarged front sectional view of the second semiconductor storage device of the present invention.

FIG. 12 is a partially enlarged front sectional view of the second semiconductor storage device of the present invention.

FIG. 13 is a partially enlarged plan view of the periphery of the corner portion of the cavity of the first and second semiconductor storage devices of the present invention.

FIG. 14 is a front sectional view of a conventional semiconductor storage device.

[Explanation of symbols]

10 Brazing layer 20　Device body 30 Bottom plate 32 Recess 40 Cavity 50 Semiconductor chip 70 Brazing metal 300 Hollow 302 Hollow 304 Hollow 306 Hollow 308 Hollow 310 Hollow

Claims (7)

[Claims] 1. A semiconductor storage device in which a bottom plate is brazed to the bottom surface of a device main body provided with a brazing layer, and the bottom surface of a cavity for accommodating a semiconductor chip provided in the device main body is sealed with the bottom plate, In a semiconductor storage device in which a recess for inserting a semiconductor chip is provided on a bottom plate surface exposed at the bottom of a cavity, an inner surface portion of the recess where brazing material leaking into the recess when the bottom plate is brazed to the bottom of the device main body tends to accumulate. A semiconductor storage device characterized in that a recess is provided in which a brazing material is stored. 2. The semiconductor storage device according to claim 1, wherein a recess is provided at a corner portion of an inner surface of the recess. 3. The semiconductor storage device according to claim 1, wherein a recess is provided at a corner portion where the inner surface of the recess intersects with the bottom surface thereof. 4. A semiconductor storage device in which a bottom plate is brazed to the bottom surface of the device main body provided with a brazing layer, and the bottom surface of a cavity for accommodating a semiconductor chip provided in the device main body is sealed with the bottom plate, In a semiconductor storage device in which a bottom plate surface exposed at the bottom of a cavity is connected in a planar manner to a bottom plate surface brazed to the bottom of the device main body, the bottom plate surface exposed to the bottom of the cavity when the bottom plate is brazed to the bottom of the device main body. A semiconductor storage device characterized in that a recess is provided in the surface of the bottom plate where leaked brazing material tends to accumulate. 5. The semiconductor storage device according to claim 4, wherein a recess is provided in a corner portion of the surface of the bottom plate exposed at the bottom surface of the cavity. 6. The semiconductor storage device according to claim 4, wherein a depression is provided around the surface of the bottom plate exposed at the bottom of the cavity. 7. The semiconductor storage device according to claim 1, wherein a notch is provided in a corner of an inner surface of the cavity of the device main body.