JPH04328905A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To allow the differential amplifier circuit to be operated at a low voltage and to reduce the current consumption. CONSTITUTION:An unbalanced output voltage eo of a bridge circuit comprising a strain gauge R24 is fed respectively to bases of a couple of transistors(TRs) Q1, Q2. When a difference takes place between base voltages of the TRs Q1, Q2, a voltage between the collectors of the TRs Q1, Q2 is changed corresponding to the difference. A 1st operational amplifier OP1 outputs a difference voltage between the collector of the TR Q2 and a 2nd reference voltage from its output terminal out. The fluctuation of (i1+i2) is suppressed by applying an output of the 1st operational amplifier OP1 to the emitter of the TRQ2.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a differential amplifier circuit.
More specifically, the present invention relates to a differential amplifier circuit that can be driven with a low power supply voltage and consumes extremely little current.

0002

2. Description of the Related Art Generally, as shown in FIG. 3, a conventional differential amplifier 10 is supplied with a positive power supply voltage +V and a negative power supply voltage -V. , one end of each of resistors R1 and R2 is connected to the positive power supply voltage +
V, and the other ends of the resistors R1 and R2 are
It is connected to the respective collectors of transistors Q1 and Q2 having good pair characteristics. The base of this transistor Q1 is connected to the inverting input terminal IN-, and the base of the transistor Q1 is connected to the inverting input terminal IN-.
The base of 2 is connected to the non-inverting input terminal IN+. Further, the emitter of the transistor Q1 is connected to a reference potential (0V) via a resistor R4.

[0003] Also, the collector of transistor Q1 is connected to I
The transistor Q2 is connected to the non-inverting input terminal + of an operational amplifier (hereinafter referred to as "op-amp") OP1, and the collector of the transistor Q2 is connected to the inverting input terminal - of the operational amplifier OP1.

The output terminal of this operational amplifier OP1 is the output terminal OUT of the differential amplifier circuit 10, and the output terminal is
It is connected to the emitter of the transistor Q2 via a resistor R5.

Further, the emitters of each of the transistors Q1 and Q2 are connected to one end of each of resistors R6 and R7, and the other ends of each of the resistors R6 and R7 are connected in common, and this common connection point is , are connected to the negative power supply voltage -V via a resistor R8.

Here, if the current flowing through the resistor R1 is i1 and the current flowing through the resistor R2 is i2, then the operational amplifier O
Since the non-inverting input terminal + and the inverting input terminal - of P1 are virtual ground points, the following formula holds true.

[0007]r1×i1=r2×i2
...(1) (where r1: resistance value of resistor R1, r
2: Resistance value of resistor R2) Also, if the emitter potential of transistor Q1 is V1, the emitter potential of transistor Q2 is V2, and the potential at the common connection point of resistors R6, R7, and R8 is V3, then Become.

V1={r4/(r4+r6)}×V3+{r4×
r6/(r4+r6)}×i1...(2) (However, r4
: resistance value of resistor R4, r6: resistance value of resistor R6) Furthermore, if the potential of the output terminal of operational amplifier OP1 is Vo, then V2={r7/(r5+r7)}×Vo+{r5/
(r5+r7)}×V3+{(r5×r7)/(r5+
r7)}×i2
...(3) (where r5: resistance value of resistor R5, r7:
(Resistance value of resistor R7) Therefore, assuming that the base and emitter potentials of transistors Q1 and Q2 with good pairing properties are respectively equal VBE, when IN+ and IN- are connected to the reference potential (0V), -VBE= V1=V2
...(4) On the other hand, from the positive power supply voltage +V to the differential amplifier circuit 1
If the current i flowing into 0 is the sum of the above-mentioned currents i1 and i2, then i1={r2/(r1+r2)}×i...(5)
i2={r1/(r1+r2)}×i...(6)
Here, if r4=r5, r6=r7, the above (2)
~ (6) {r4×r6/(r4+r6)}×
{r2/(r1+r2)}×i={r6/(r4+r6
)}×Vo+{r4×r6/(r4+r6)}×{r1
/(r1+r2)}×i Therefore, Vo=-{r4×(r1-r2)/(r1+r2)
}×i...(7) Here, r1=r2
Then, Vo=0. A temperature change in the resistors R1 and R2 is a major factor in a temperature change in the offset voltage of the amplifier circuit 10.

If the resistance value r1 of the resistor R1 changes by Δr1 due to temperature change, etc., then r1+Δr1
= r2 (r1≫Δr1), and Vo at this time is
is as follows.

Vo>≒r4×Δr1/2r1}×i=ΔVo
(8) That is, by reducing i, the influence of temperature change of resistor R1 (or R2) on Vo can be reduced.

However, such a conventional differential amplifier circuit 10 has a problem in that the operating power supplies (i1, i2) cannot be made small.

Further, the maximum value of the current iout flowing from the output terminal of the operational amplifier OP1 to the negative power supply voltage -V side via the resistor R5 is i>i>i, assuming that the maximum value of Vo is Vomax.
Must be out. Therefore, ΔVo>{Δ
r1/2r1}×Vomax. That is, the current i1,
When i2 is set small, the potential of IN+ rises and Vo becomes V
When it reaches omax, the collector currents of the transistors Q1 and Q2 will not flow, and there is a possibility that the transistors Q1 and Q2 will not perform amplifying operation.

Furthermore, an inverting input terminal IN- and a non-inverting input terminal I
As the common mode voltage of the input voltage applied between N+ changes,
Since the values of the above-mentioned currents i1 and i2 change, there are problems in that the accuracy deteriorates and the input voltage range is narrowed due to the changes in the above-mentioned currents i1 and i2.

A differential amplifier circuit 20 shown in FIG. 4 has been devised to solve such problems. That is, as shown in FIG. 3, resistors R1, R2, transistors Q1,
The collector of the transistor Q1 is connected to the inverting input terminal of the operational amplifier OP2, and the output terminal of the operational amplifier OP2 is connected to the transistor Q1 via the resistor R16. It is connected to the emitter and connected to the operational amplifier OP via resistor R12.
It is connected to the non-inverting input terminal + of 4.

On the other hand, the collector of the transistor Q2 is connected to the inverting input terminal of the operational amplifier OP3, and the output terminal of the operational amplifier OP3 is connected to the emitter of the transistor Q2 via a resistor R17, and also to the emitter of the transistor Q2 via a resistor R13. It is connected to the inverting input terminal - of the operational amplifier OP4.

A resistor R18 is connected between the emitters of transistors Q1 and Q2. In addition, the non-inverting input terminals + of each operational amplifier OP2 and OP3 are
This common connection point has the above positive power supply voltage +
A voltage obtained by dividing V and the negative power supply voltage -V by resistors R10 and R11 is supplied.

A resistor R14 for setting an amplification factor is connected between the inverting input terminal - of the operational amplifier OP4 and its own output terminal, and the non-inverting input terminal + of the operational amplifier OP4 is connected to the resistor R14.
The output terminal of the operational amplifier OP4 serves as the output terminal OUT of the differential amplifier circuit 20.

In the differential amplifier circuit 20, i1 and i2 can be reduced by increasing the resistances of R1 and R2 or by increasing the voltage divided between the resistors R10 and R11.

That is, it is possible to reduce the voltage change at the output terminal OUT due to a temperature change in the resistances of R1 and R2. However, operational amplifiers OP2 and OP3 must maintain thermal equilibrium and match their characteristics, but this is difficult to achieve in practice, and the thermal imbalance and mismatch in characteristics of operational amplifiers OP2 and OP3 This causes deterioration of noise characteristics and temperature characteristics. When i1 and i2 are made small, the difference in the input bias currents of OP2 and OP3 adversely affects the offset voltage of the differential amplifier circuit 20.

Taking the above-mentioned circumstances into consideration, the present applicant has previously proposed a differential amplifier circuit in which the differential input voltage range is as wide as the limit regulated by the power supply voltage, and changes such as temperature drift are small (Japanese Patent Application Laid-Open No. (Refer to Publication No. 76306/1983).

FIG. 5 is a circuit diagram thereof, and illustration of parts unrelated to the differential amplifier circuit of the present invention, which will be described later, is omitted. Further, the same parts as those in FIG. 3 are given the same reference numerals to avoid redundant explanation, and the configuration of the parts different from those in FIG. 3 will be mainly described.

In FIG. 5, an operational amplifier OP5 and a resistor R0 are newly added to the configuration shown in FIG.

A positive power supply voltage +V is applied to one end of the resistor R0, and the other end of the resistor R0 is connected to one end of each of the resistors R1 and R2, as well as to the inverting input terminal - of the operational amplifier OP5. ing.

At the non-inverting input terminal + of the operational amplifier OP5,
Reference voltage is applied. In addition, in this Figure 5,
The resistor R8 shown in FIG. 3 is no longer necessary.

An output OUT is output from the output terminal of the operational amplifier OP1, that is, the output terminal of the differential amplifier circuit 30.

On the other hand, the input terminal of the differential amplifier circuit 30, ie,
The output end of a strain detection circuit 40 made up of a strain gauge R24 is connected to the bases of each of the transistors Q1 and Q2.

That is, the input terminals of the strain gauge R24 assembled in the Wheatstone bridge are connected to voltages E1 and E2 as bridge power supplies, respectively, and the output terminals are connected to transistors Q1 and E2 through resistors R22 and R23, respectively.
Connected to the base of Q2.

Therefore, the unbalanced output generated in the Wheatstone bridge composed of strain gauge R24 is caused by resistor R2.
2, applied to the bases of transistors Q1 and Q2 via R23, and the differential voltage at this time is applied to the operational amplifier O.
The strain gauge R is detected by P1 and has a Wheatstone bridge configuration at the output of the same operational amplifier OP1.
Differential outputs corresponding to the unbalanced outputs of 24 can be obtained. This output is derived from the output end of the differential amplifier circuit 30.

Here, the differential amplifier circuit 30 includes resistors R0,
Since the potential at the common connection point of R1 and R2 is locked by the action of the operational amplifier OP5, an output with little error is obtained.

That is, the potential at the common connection point is compared in the operational amplifier OP5 with the reference potential applied to the non-inverting input terminal + of the operational amplifier OP5, and the difference in potential is applied to the resistors R6 and R.
7 as a voltage V3. Therefore,
When the potential at the common connection point of the resistors R0, R1, and R2 increases, the voltage V3 is controlled to increase, and when the potential at the common connection point decreases, the voltage V3 is controlled to decrease. Therefore, the current i flowing through the resistor R0 is kept at a constant value, in other words, it is a constant current, and as a result, the resistors R0, R
The potential at the common connection point of R1 and R2 is locked to a predetermined value.

Therefore, changes in current i due to fluctuations in the common mode voltage at the bases of transistors Q1 and Q2 and fluctuations in the output voltage of operational amplifier OP1 are canceled out, and current i is made constant.

Note that the current i1 or i2 fluctuates due to temperature fluctuations in the resistors R1 and R2, and an offset voltage of the operational amplifier OP5 is generated based on this fluctuation. However, the effect of the offset voltage can be significantly reduced compared to the circuit shown in FIG. 3 described above.

That is, unlike the differential amplifier 10 shown in FIG. 3, the conventional example shown in FIG. 5 can reduce the current i. By reducing the current i, the above (8)
As can be seen from the equation, the output fluctuation (offset voltage) ΔVo caused by changes in the resistance values r1 and r2 of the resistors R1 and R2 due to temperature changes can be suppressed to a sufficiently small value.

[0034]

[Problems to be Solved by the Invention] However, since the conventional differential amplifier circuit shown in FIG. 5 uses the resistor R0, a voltage drop occurs due to this resistor R0, and the circuit cannot operate with a low voltage power supply. . Therefore, it is necessary to increase the power supply voltage by the voltage drop caused by this resistor R0.

Furthermore, simply making the current flowing through resistor R0 a constant current will not solve the problem of the common point between resistors R6 and R7, that is, B
It is not possible to prevent the current at the point from fluctuating in accordance with fluctuations in the input voltage input to the bases of the transistors Q1 and Q2 or in the output voltage output from the operational amplifier OP1.

The present invention has been made in view of the above-mentioned circumstances, and its purpose is to be able to operate at low voltage;
Another object of the present invention is to provide a differential amplifier circuit with low current consumption.

[0037]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a pair of first and second transistors that generate an output voltage according to a difference in input voltage, and a pair of first and second transistors that generate an output voltage according to a difference in input voltage. first and second resistors respectively connected between one output terminal of the second transistor and the power supply, one end of which is connected to the other output terminal of each of the first and second transistors, and the other end of each resistor connected to the other output terminal of the first and second transistors; 3rd and 4th commonly connected
a fifth resistor for applying a first reference potential to the other output terminal of the first transistor;
An output voltage corresponding to the output voltage difference between the transistors or the difference between the output voltage of the second transistor and a second reference potential is fed back to the other output terminal of the second transistor via a sixth resistor. A first operational amplifier and an output voltage corresponding to a voltage difference between the output voltage of the first transistor and a third reference potential are transmitted to the first and second transistors through the third and fourth resistors. In addition to the other output terminal of the first transistor, the second operational amplifier controls the output current of the first transistor.

[0038]

[Operation] When a difference occurs between the input voltages input to the first and second transistors in the differential amplifier circuit configured as described above, a difference occurs between the output voltages of the first and second transistors.

The output voltage of the first transistor is compared with the third reference voltage by the second operational amplifier, and the output voltage of the second operational amplifier according to the difference is the output voltage of the other of the first and second transistors. is added to the end side to control the output current of the first transistor.

On the other hand, the output voltage of the first operational amplifier, which corresponds to the difference between the output voltages of the first and second transistors or the difference between the output voltage of the second transistor and the second reference potential, becomes the second operational amplifier. The output currents of the first and second transistors are controlled so that the other output voltage of the first and second transistors corresponds to the input voltage by feeding back to the other output terminal of the transistor.

[0041]

[Embodiment] An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, the same parts as those in FIGS. 3 to 5 will be described with the same reference numerals.

In FIG. 1, strain gauges R24 are connected to the bases of the first and second transistors Q1 and Q2.
The unbalanced output voltage eo generated in the Wheatstone bridge configured with is applied as an input voltage.

A positive power supply voltage +Vcc is applied to the collectors of the first and second transistors Q1 and Q2 via first and second resistors R1 and R2, respectively. , Q2 are commonly connected via third and fourth resistors R6 and R7, respectively.

The emitter of transistor Q1 is connected to resistor R4.
A first reference potential (0V) is applied via the .

Further, the collector as one output terminal of the first transistor Q1 is connected to the inverting input terminal - of the second operational amplifier OP2.
A third reference potential is applied to the non-inverting input terminal of P2. The output voltage of this operational amplifier OP2 is
The voltage is applied to the connection point between resistors R6 and R7.

On the other hand, the collector of the second transistor Q2 is connected to the inverting input terminal of the first operational amplifier OP1, and the second reference potential is connected to the non-inverting input terminal of the first operational amplifier OP1. It is now applied.

The output voltage of the first operational amplifier OP1 is applied to the emitter of the second transistor Q2 via a sixth resistor R5 for feedback.

Next, the operation of the embodiment shown in FIG. 1 will be explained. Now, the unbalanced output voltage eo generated at the output end of the Wheatstone bridge composed of strain gauge R24 is:
It is applied as an input voltage to the bases of transistors Q1 and Q2. At this time, if an unbalanced voltage occurs at the output end of the Wheatstone bridge, transistors Q1 and Q
A difference occurs between the voltages between the bases of transistors Q1 and Q2, and according to the difference, collector currents I1 and I1,
I2 flows.

Furthermore, an output voltage is generated between the collectors of transistors Q1 and Q2 in accordance with the difference in applied voltage (eo) between both bases. The collector voltage of the transistor Q1 is applied to the inverting input terminal - of the second operational amplifier OP2.

[0050] As a result, the second operational amplifier OP2 becomes
After amplifying the difference voltage according to the deviation between the collector voltage of the transistor Q1 and a predetermined reference potential, the output voltage is applied to the common connection point of the third and fourth resistors R6 and R7.

As a result, the collector current of the first transistor Q1 is controlled, and the second operational amplifier O
The collector current of transistor Q1 is controlled by the output voltage of P2. In this case, the gain of transistor Q1 is R
It becomes 1/R6.

On the other hand, the collector voltage of the second transistor Q2 is applied to the inverting input terminal - of the first operational amplifier OP1. The collector voltage of the second transistor Q2 is compared with the second reference potential applied to the non-inverting input terminal + of the first operational amplifier OP1, and the deviation voltage is amplified. An output voltage corresponding to the deviation voltage is applied to the emitter of the transistor Q2 via the sixth resistor R5.

That is, the voltage obtained by dividing the output voltage of the first operational amplifier OP1 by the resistors R5 and R7 is fed back to the emitter of the second transistor Q2, and the collector currents of the transistors Q1 and Q2 are controlled. The voltage between the emitters of Q2 is controlled by the output voltage of the first operational amplifier OP1 so that it corresponds to the voltage between the bases of transistors Q1 and Q2, that is, the input voltage. As a result, if there is no potential difference between the bases of the transistors Q1 and Q2, control is performed so that there is no difference in the voltage between the collectors of the transistors Q1 and Q2.

In this way, transistors Q1 and Q2
When a voltage is applied to the base of the differential amplifier circuit, an output voltage that accurately corresponds to the base-to-base voltage is obtained from the first operational amplifier OP1, which is the output terminal out of the differential amplifier circuit. In this case, the gain of transistor Q2 is R2/R7.

The overall gain of the differential amplifier circuit at this time is (R4+R5+R6+R7)/(R6+R7), and if R4=R5 and R6=R7, this gain is 1.
+(R4/R6).

As described above, according to the embodiment shown in FIG. 1, since the common resistor on the positive power supply voltage +Vcc side is omitted, the corresponding voltage drop is eliminated, operation can be performed at a low voltage, and current consumption is also reduced. The dynamic range becomes wider, and the operating input voltage becomes wider.

In addition, the first operational amplifier OP1 controls the collector currents of the transistors Q1 and Q2 to eliminate the voltage difference between the collectors of the transistors Q1 and Q2 due to temperature changes, power supply voltage fluctuations, etc. Second
Due to the output voltage of operational amplifier OP2, transistor Q
Since the collector current of OP1 is controlled, an operational amplifier OP1 with poor performance can be used, and costs can be reduced.

It should be noted that the present invention is not limited to the above-mentioned embodiments, but can be implemented in various modifications.

For example, as shown in FIG. 2, instead of applying a reference potential to the non-inverting input terminal + of the first operational amplifier OP1 as in FIG. 1, it is connected to the collector of the first transistor Q1. , the collector voltage of transistor Q1 may be applied.

In this case, the first operational amplifier OP1 generates an output voltage corresponding to the difference in voltage between the collectors of the transistors Q1 and Q2, and converts this output voltage into the sixth operational amplifier in the same manner as in the embodiment of FIG. By dividing the voltage between the resistor R5 and the fourth resistor R7 and applying it to the emitter of the second transistor Q2, the voltage between the emitters of the transistors Q1 and Q2 becomes the input voltage in the same manner as in the embodiment of FIG. (voltage between bases) so that a voltage that accurately corresponds to the input voltage is generated between the collectors of transistors Q1 and Q2.

Further, the second reference voltage and the third reference voltage may be the same reference voltage.

[0062]

[Effects of the Invention] As detailed above, according to the present invention,
Provides a differential amplifier circuit that can omit a common resistor on the positive power supply voltage side, thereby avoiding the voltage drop caused by the resistor, allowing operation at a low power supply voltage, and reducing current consumption. can do.

Furthermore, according to the present invention, it is possible to provide a differential amplifier circuit that does not require the use of a first operational amplifier with high performance characteristics, and can reduce costs accordingly.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the overall configuration of an embodiment of a differential amplifier circuit according to the present invention.

FIG. 2 is a circuit diagram showing the configuration of another embodiment of the differential amplifier circuit according to the present invention.

FIG. 3 is a circuit diagram of a differential amplifier circuit according to a conventional example.

FIG. 4 is a circuit diagram of a differential amplifier circuit according to another conventional example.

FIG. 5 is a circuit diagram of a differential amplifier circuit according to still another conventional example.

[Explanation of symbols]

Q1 First transistor Q2 Second transistor OP1 First operational amplifier OP2 Second operational amplifier R1 First resistance R2 Second resistance R4 Fifth resistor R5 6th resistor R6 Third resistor R7 Fourth resistor R24 Strain gauge

Claims (2)

[Claims] Claim 1: A pair of first and second transistors that generate an output voltage according to a difference in input voltage;
and first and second resistors respectively connected between one output terminal of the second transistor and the power supply;
and third and fourth resistors, each of which has one end connected to the other output end of the second transistor and whose other ends are commonly connected, and a first reference potential that is connected to the other output end of the first transistor. A fifth resistor is applied to the other output terminal of the second transistor, and an output voltage corresponding to the difference between the output voltage of the second transistor and a second reference potential is applied to the other output terminal of the second transistor through a sixth resistor. and a first operational amplifier that feeds back an output voltage corresponding to the difference voltage between the output voltage of the first transistor and the third reference potential.
and a second operational amplifier that controls the output current of the first transistor in addition to the other output terminal of the first and second transistors via a fourth resistor. differential amplifier circuit. 2. A pair of first and second transistors that generate an output voltage according to a difference in input voltage;
and first and second resistors respectively connected between one output terminal of the second transistor and the power supply;
and third and fourth resistors, each of which has one end connected to the other output end of the second transistor and whose other ends are commonly connected, and a first reference potential that is connected to the other output end of the first transistor. a fifth resistor applied to the second transistor; and a first transistor that feeds back an output voltage corresponding to the output voltage difference between the first and second transistors to the other output terminal of the second transistor via a sixth resistor. and the third and fourth operational amplifiers output voltage according to the difference voltage between the output voltage of the first transistor and the third reference potential.
a second operational amplifier that controls the output current of the first transistor in addition to the other output terminal of the first and second transistors via the resistor. Amplification circuit.